;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.4.0 Tue Oct 12 01:21:35 2004

;--------------------------------------------------------
	.module powf
	
	.area CSEG
	.area GSINIT
	.area GSFINAL
	.area XINIT
	.area DSEG
	.area OSEG    (OVR)
	.area BSEG
	.area XSEG
	.area XISEG
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _powf_PARM_2
	.globl _powf_PARM_1
	.globl _powf
;--------------------------------------------------------
;  ram data
;--------------------------------------------------------
	.area DSEG
_powf_sloc0_1_0::
	.ds 4
;--------------------------------------------------------
; overlayable items in  ram 
;--------------------------------------------------------
	.area OSEG    (OVR)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
	.area XISEG
;--------------------------------------------------------
; extended address mode data
;--------------------------------------------------------
	.area XSEG
_powf_PARM_1::
	.ds 4
_powf_PARM_2::
	.ds 4
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area GSINIT
	.area GSFINAL
	.area GSINIT
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME
	.area CSEG
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG
;------------------------------------------------------------
;Allocation info for local variables in function 'powf'
;------------------------------------------------------------
;sloc0                     Allocated with name '_powf_sloc0_1_0'
;x                         Allocated with name '_powf_PARM_1'
;y                         Allocated with name '_powf_PARM_2'
;------------------------------------------------------------
;powf.c:25: float powf(const float x, const float y)
;	-----------------------------------------
;	 function powf
;	-----------------------------------------
_powf:
;powf.c:27: if(y == 0.0) return 1.0;
;     genAssign
;     loadRegFromAop (a, EXT(_powf_PARM_2), 0)
	lda	(_powf_PARM_2 + 3)
;     storeRegToAop (a, EXT(___fseq_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fseq_PARM_1 + 3)
;     loadRegFromAop (a, EXT(_powf_PARM_2), 1)
	lda	(_powf_PARM_2 + 2)
;     storeRegToAop (a, EXT(___fseq_PARM_1), 1), stacked=0, isaddr=1
	sta	(___fseq_PARM_1 + 2)
;     loadRegFromAop (a, EXT(_powf_PARM_2), 2)
	lda	(_powf_PARM_2 + 1)
;     storeRegToAop (a, EXT(___fseq_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fseq_PARM_1 + 1)
;     loadRegFromAop (a, EXT(_powf_PARM_2), 3)
	lda	_powf_PARM_2
;     storeRegToAop (a, EXT(___fseq_PARM_1), 3), stacked=0, isaddr=1
	sta	___fseq_PARM_1
;     genAssign
;     loadRegFromAop (a, LIT(#0x00), 0)
	lda	#0x00
;     storeRegToAop (a, EXT(___fseq_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fseq_PARM_2 + 3)
;     loadRegFromAop (a, LIT(#0x00), 1)
	lda	#0x00
;     storeRegToAop (a, EXT(___fseq_PARM_2), 1), stacked=0, isaddr=1
	sta	(___fseq_PARM_2 + 2)
;     loadRegFromAop (a, LIT(#0x00), 2)
	lda	#0x00
;     storeRegToAop (a, EXT(___fseq_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fseq_PARM_2 + 1)
;     loadRegFromAop (a, LIT(#0x00), 3)
	lda	#0x00
;     storeRegToAop (a, EXT(___fseq_PARM_2), 3), stacked=0, isaddr=1
	sta	___fseq_PARM_2
;     genCall
	jsr	___fseq
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, REG(-,-,x,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
;     genIfx
	tsta
;     genIfxJump
; Peephole 2d	- eliminated jmp
	beq	00102$
00112$:
; forgot to free a
;     genRet
	mov	#0x3F,*__ret3
	mov	#0x80,*__ret2
;     loadRegFromAop (x, LIT(#0x00), 1)
	ldx	#0x00
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, LIT(#0x00), 0)
	lda	#0x00
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
	jmp	00107$
00102$:
;powf.c:28: if(y==1.0) return x;
;     genAssign
;     loadRegFromAop (a, EXT(_powf_PARM_2), 0)
	lda	(_powf_PARM_2 + 3)
;     storeRegToAop (a, EXT(___fseq_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fseq_PARM_1 + 3)
;     loadRegFromAop (a, EXT(_powf_PARM_2), 1)
	lda	(_powf_PARM_2 + 2)
;     storeRegToAop (a, EXT(___fseq_PARM_1), 1), stacked=0, isaddr=1
	sta	(___fseq_PARM_1 + 2)
;     loadRegFromAop (a, EXT(_powf_PARM_2), 2)
	lda	(_powf_PARM_2 + 1)
;     storeRegToAop (a, EXT(___fseq_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fseq_PARM_1 + 1)
;     loadRegFromAop (a, EXT(_powf_PARM_2), 3)
	lda	_powf_PARM_2
;     storeRegToAop (a, EXT(___fseq_PARM_1), 3), stacked=0, isaddr=1
	sta	___fseq_PARM_1
;     genAssign
;     loadRegFromAop (a, LIT(#0x00), 0)
	lda	#0x00
;     storeRegToAop (a, EXT(___fseq_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fseq_PARM_2 + 3)
;     loadRegFromAop (a, LIT(#0x00), 1)
	lda	#0x00
;     storeRegToAop (a, EXT(___fseq_PARM_2), 1), stacked=0, isaddr=1
	sta	(___fseq_PARM_2 + 2)
;     loadRegFromAop (a, LIT(#0x00), 2)
	lda	#0x80
;     storeRegToAop (a, EXT(___fseq_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fseq_PARM_2 + 1)
;     loadRegFromAop (a, LIT(#0x00), 3)
	lda	#0x3F
;     storeRegToAop (a, EXT(___fseq_PARM_2), 3), stacked=0, isaddr=1
	sta	___fseq_PARM_2
;     genCall
	jsr	___fseq
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, REG(-,-,x,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
;     genIfx
	tsta
;     genIfxJump
; Peephole 2d	- eliminated jmp
	beq	00104$
00113$:
; forgot to free a
;     genRet
;     loadRegFromAop (a, EXT(_powf_PARM_1), 3)
	lda	_powf_PARM_1
;     storeRegToAop (a, DIR(__ret3), 0), stacked=0, isaddr=0
	sta	*__ret3
;     loadRegFromAop (a, EXT(_powf_PARM_1), 2)
	lda	(_powf_PARM_1 + 1)
;     storeRegToAop (a, DIR(__ret2), 0), stacked=0, isaddr=0
	sta	*__ret2
;     loadRegFromAop (x, EXT(_powf_PARM_1), 1)
	ldx	(_powf_PARM_1 + 2)
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, EXT(_powf_PARM_1), 0)
	lda	(_powf_PARM_1 + 3)
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
	jmp	00107$
00104$:
;powf.c:29: if(x <= 0.0) return 0.0;
;     genAssign
;     loadRegFromAop (a, EXT(_powf_PARM_1), 0)
	lda	(_powf_PARM_1 + 3)
;     storeRegToAop (a, EXT(___fsgt_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fsgt_PARM_1 + 3)
;     loadRegFromAop (a, EXT(_powf_PARM_1), 1)
	lda	(_powf_PARM_1 + 2)
;     storeRegToAop (a, EXT(___fsgt_PARM_1), 1), stacked=0, isaddr=1
	sta	(___fsgt_PARM_1 + 2)
;     loadRegFromAop (a, EXT(_powf_PARM_1), 2)
	lda	(_powf_PARM_1 + 1)
;     storeRegToAop (a, EXT(___fsgt_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fsgt_PARM_1 + 1)
;     loadRegFromAop (a, EXT(_powf_PARM_1), 3)
	lda	_powf_PARM_1
;     storeRegToAop (a, EXT(___fsgt_PARM_1), 3), stacked=0, isaddr=1
	sta	___fsgt_PARM_1
;     genAssign
;     loadRegFromAop (a, LIT(#0x00), 0)
	lda	#0x00
;     storeRegToAop (a, EXT(___fsgt_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fsgt_PARM_2 + 3)
;     loadRegFromAop (a, LIT(#0x00), 1)
	lda	#0x00
;     storeRegToAop (a, EXT(___fsgt_PARM_2), 1), stacked=0, isaddr=1
	sta	(___fsgt_PARM_2 + 2)
;     loadRegFromAop (a, LIT(#0x00), 2)
	lda	#0x00
;     storeRegToAop (a, EXT(___fsgt_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fsgt_PARM_2 + 1)
;     loadRegFromAop (a, LIT(#0x00), 3)
	lda	#0x00
;     storeRegToAop (a, EXT(___fsgt_PARM_2), 3), stacked=0, isaddr=1
	sta	___fsgt_PARM_2
;     genCall
	jsr	___fsgt
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, REG(-,-,x,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
;     genIfx
	tsta
;     genIfxJump
; Peephole 2c	- eliminated jmp
	bne	00106$
00114$:
; forgot to free a
;     genRet
	mov	#0x00,*__ret3
	mov	#0x00,*__ret2
;     loadRegFromAop (x, LIT(#0x00), 1)
	ldx	#0x00
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, LIT(#0x00), 0)
	lda	#0x00
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
; Peephole 3	- shortened jmp to bra
	bra	00107$
00106$:
;powf.c:30: return expf(logf(x) * y);
;     genAssign
;     loadRegFromAop (a, EXT(_powf_PARM_1), 0)
	lda	(_powf_PARM_1 + 3)
;     storeRegToAop (a, EXT(_logf_PARM_1), 0), stacked=0, isaddr=1
	sta	(_logf_PARM_1 + 3)
;     loadRegFromAop (a, EXT(_powf_PARM_1), 1)
	lda	(_powf_PARM_1 + 2)
;     storeRegToAop (a, EXT(_logf_PARM_1), 1), stacked=0, isaddr=1
	sta	(_logf_PARM_1 + 2)
;     loadRegFromAop (a, EXT(_powf_PARM_1), 2)
	lda	(_powf_PARM_1 + 1)
;     storeRegToAop (a, EXT(_logf_PARM_1), 2), stacked=0, isaddr=1
	sta	(_logf_PARM_1 + 1)
;     loadRegFromAop (a, EXT(_powf_PARM_1), 3)
	lda	_powf_PARM_1
;     storeRegToAop (a, EXT(_logf_PARM_1), 3), stacked=0, isaddr=1
	sta	_logf_PARM_1
;     genCall
	jsr	_logf
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, EXT(___fsmul_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fsmul_PARM_1 + 3)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, EXT(___fsmul_PARM_1), 1), stacked=0, isaddr=1
	stx	(___fsmul_PARM_1 + 2)
;     loadRegFromAop (a, DIR(__ret2), 0)
	lda	*__ret2
;     storeRegToAop (a, EXT(___fsmul_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fsmul_PARM_1 + 1)
;     loadRegFromAop (a, DIR(__ret3), 0)
	lda	*__ret3
;     storeRegToAop (a, EXT(___fsmul_PARM_1), 3), stacked=0, isaddr=1
	sta	___fsmul_PARM_1
;     genAssign
;     loadRegFromAop (a, EXT(_powf_PARM_2), 0)
	lda	(_powf_PARM_2 + 3)
;     storeRegToAop (a, EXT(___fsmul_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fsmul_PARM_2 + 3)
;     loadRegFromAop (a, EXT(_powf_PARM_2), 1)
	lda	(_powf_PARM_2 + 2)
;     storeRegToAop (a, EXT(___fsmul_PARM_2), 1), stacked=0, isaddr=1
	sta	(___fsmul_PARM_2 + 2)
;     loadRegFromAop (a, EXT(_powf_PARM_2), 2)
	lda	(_powf_PARM_2 + 1)
;     storeRegToAop (a, EXT(___fsmul_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fsmul_PARM_2 + 1)
;     loadRegFromAop (a, EXT(_powf_PARM_2), 3)
	lda	_powf_PARM_2
;     storeRegToAop (a, EXT(___fsmul_PARM_2), 3), stacked=0, isaddr=1
	sta	___fsmul_PARM_2
;     genCall
	jsr	___fsmul
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, EXT(_expf_PARM_1), 0), stacked=0, isaddr=1
	sta	(_expf_PARM_1 + 3)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, EXT(_expf_PARM_1), 1), stacked=0, isaddr=1
	stx	(_expf_PARM_1 + 2)
;     loadRegFromAop (a, DIR(__ret2), 0)
	lda	*__ret2
;     storeRegToAop (a, EXT(_expf_PARM_1), 2), stacked=0, isaddr=1
	sta	(_expf_PARM_1 + 1)
;     loadRegFromAop (a, DIR(__ret3), 0)
	lda	*__ret3
;     storeRegToAop (a, EXT(_expf_PARM_1), 3), stacked=0, isaddr=1
	sta	_expf_PARM_1
;     genCall
	jsr	_expf
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, DIR(_powf_sloc0_1_0), 0), stacked=0, isaddr=0
	sta	*(_powf_sloc0_1_0 + 3)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, DIR(_powf_sloc0_1_0), 1), stacked=0, isaddr=0
	stx	*(_powf_sloc0_1_0 + 2)
	mov	*__ret2,*(_powf_sloc0_1_0 + 1)
	mov	*__ret3,*_powf_sloc0_1_0
;     genRet
	mov	*_powf_sloc0_1_0,*__ret3
	mov	*(_powf_sloc0_1_0 + 1),*__ret2
;     loadRegFromAop (x, DIR(_powf_sloc0_1_0), 1)
	ldx	*(_powf_sloc0_1_0 + 2)
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, DIR(_powf_sloc0_1_0), 0)
	lda	*(_powf_sloc0_1_0 + 3)
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
00107$:
	rts
	.area CSEG
	.area XINIT
