;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.4.0 Tue Oct 12 01:21:31 2004

;--------------------------------------------------------
	.module _strrchr
	
	.area CSEG
	.area GSINIT
	.area GSFINAL
	.area XINIT
	.area DSEG
	.area OSEG    (OVR)
	.area BSEG
	.area XSEG
	.area XISEG
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _strrchr_PARM_2
	.globl _strrchr
;--------------------------------------------------------
;  ram data
;--------------------------------------------------------
	.area DSEG
;--------------------------------------------------------
; overlayable items in  ram 
;--------------------------------------------------------
	.area	OSEG    (OVR)
_strrchr_sloc0_1_0::
	.ds 2
_strrchr_sloc1_1_0::
	.ds 1
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
	.area XISEG
;--------------------------------------------------------
; extended address mode data
;--------------------------------------------------------
	.area XSEG
_strrchr_PARM_2::
	.ds 1
_strrchr_string_1_1::
	.ds 2
_strrchr_start_1_1::
	.ds 2
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area GSINIT
	.area GSFINAL
	.area GSINIT
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME
	.area CSEG
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG
;------------------------------------------------------------
;Allocation info for local variables in function 'strrchr'
;------------------------------------------------------------
;ch                        Allocated with name '_strrchr_PARM_2'
;string                    Allocated with name '_strrchr_string_1_1'
;start                     Allocated with name '_strrchr_start_1_1'
;sloc0                     Allocated with name '_strrchr_sloc0_1_0'
;sloc1                     Allocated with name '_strrchr_sloc1_1_0'
;------------------------------------------------------------
;_strrchr.c:26: char * strrchr (
;	-----------------------------------------
;	 function strrchr
;	-----------------------------------------
_strrchr:
;     genReceive
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, EXT(_strrchr_string_1_1), 0), stacked=0, isaddr=0
	sta	(_strrchr_string_1_1 + 1)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, EXT(_strrchr_string_1_1), 1), stacked=0, isaddr=0
	stx	_strrchr_string_1_1
;_strrchr.c:31: char * start = string;
;     genAssign
;     loadRegFromAop (a, EXT(_strrchr_string_1_1), 0)
	lda	(_strrchr_string_1_1 + 1)
;     storeRegToAop (a, EXT(_strrchr_start_1_1), 0), stacked=0, isaddr=0
	sta	(_strrchr_start_1_1 + 1)
;     loadRegFromAop (a, EXT(_strrchr_string_1_1), 1)
	lda	_strrchr_string_1_1
;     storeRegToAop (a, EXT(_strrchr_start_1_1), 1), stacked=0, isaddr=0
	sta	_strrchr_start_1_1
;_strrchr.c:33: while (*string++)                       /* find end of string */
;     genAssign
;     loadRegFromAop (a, EXT(_strrchr_string_1_1), 0)
	lda	(_strrchr_string_1_1 + 1)
;     storeRegToAop (a, DIR(_strrchr_sloc0_1_0), 0), stacked=0, isaddr=0
	sta	*(_strrchr_sloc0_1_0 + 1)
;     loadRegFromAop (a, EXT(_strrchr_string_1_1), 1)
	lda	_strrchr_string_1_1
;     storeRegToAop (a, DIR(_strrchr_sloc0_1_0), 1), stacked=0, isaddr=0
	sta	*_strrchr_sloc0_1_0
00101$:
;     genPointerGet
;     genFarPointerGet
;     loadRegFromAop (hx, DIR(_strrchr_sloc0_1_0), 0)
	ldhx	*_strrchr_sloc0_1_0
	lda	,x
	aix	#1
;     storeRegToAop (a, DIR(_strrchr_sloc1_1_0), 0), stacked=0, isaddr=0
	sta	*_strrchr_sloc1_1_0
;     storeRegToAop (hx, DIR(_strrchr_sloc0_1_0), 0), stacked=0, isaddr=0
	sthx	*_strrchr_sloc0_1_0
;     genIfx
	tst	*_strrchr_sloc1_1_0
;     genIfxJump
; Peephole 2c	- eliminated jmp
	bne	00101$
00116$:
;_strrchr.c:36: while (--string != start && *string != ch)
;     genAssign
00105$:
;     genMinus
;     loadRegFromAop (a, DIR(_strrchr_sloc0_1_0), 0)
	lda	*(_strrchr_sloc0_1_0 + 1)
	sub	#0x01
;     storeRegToAop (a, DIR(_strrchr_sloc0_1_0), 0), stacked=0, isaddr=0
	sta	*(_strrchr_sloc0_1_0 + 1)
;     loadRegFromAop (a, DIR(_strrchr_sloc0_1_0), 1)
	lda	*_strrchr_sloc0_1_0
	sbc	#0x00
;     storeRegToAop (a, DIR(_strrchr_sloc0_1_0), 1), stacked=0, isaddr=0
	sta	*_strrchr_sloc0_1_0
;     genCmpEq
;     loadRegFromAop (a, DIR(_strrchr_sloc0_1_0), 0)
	lda	*(_strrchr_sloc0_1_0 + 1)
	cmp	(_strrchr_start_1_1 + 1)
	bne	00117$
;     loadRegFromAop (a, DIR(_strrchr_sloc0_1_0), 1)
	lda	*_strrchr_sloc0_1_0
	cmp	_strrchr_start_1_1
; Peephole 2d	- eliminated jmp
	beq	00107$
00117$:
;     genPointerGet
;     genFarPointerGet
;     loadRegFromAop (hx, DIR(_strrchr_sloc0_1_0), 0)
	ldhx	*_strrchr_sloc0_1_0
	lda	,x
;     storeRegToAop (a, DIR(_strrchr_sloc1_1_0), 0), stacked=0, isaddr=0
	sta	*_strrchr_sloc1_1_0
;     genCmpEq
;     loadRegFromAop (a, DIR(_strrchr_sloc1_1_0), 0)
	lda	*_strrchr_sloc1_1_0
	cmp	_strrchr_PARM_2
	bne	00118$
	bra	00119$
00118$:
; Peephole 3	- shortened jmp to bra
	bra	00105$
00119$:
00107$:
;_strrchr.c:39: if (*string == ch)                /* char found ? */
;     genPointerGet
;     genFarPointerGet
;     loadRegFromAop (hx, DIR(_strrchr_sloc0_1_0), 0)
	ldhx	*_strrchr_sloc0_1_0
	lda	,x
;     storeRegToAop (a, DIR(_strrchr_sloc1_1_0), 0), stacked=0, isaddr=0
	sta	*_strrchr_sloc1_1_0
;     genCmpEq
;     loadRegFromAop (a, DIR(_strrchr_sloc1_1_0), 0)
	lda	*_strrchr_sloc1_1_0
	cmp	_strrchr_PARM_2
	bne	00120$
	bra	00121$
00120$:
; Peephole 3	- shortened jmp to bra
	bra	00109$
00121$:
;_strrchr.c:40: return( (char *)string );
;     genRet
;     loadRegFromAop (x, DIR(_strrchr_sloc0_1_0), 1)
	ldx	*_strrchr_sloc0_1_0
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, DIR(_strrchr_sloc0_1_0), 0)
	lda	*(_strrchr_sloc0_1_0 + 1)
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
; Peephole 3	- shortened jmp to bra
	bra	00110$
00109$:
;_strrchr.c:42: return (NULL) ;
;     genRet
;     loadRegFromAop (x, LIT(#0x00), 1)
	ldx	#0x00
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, LIT(#0x00), 0)
	lda	#0x00
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
00110$:
	rts
	.area CSEG
	.area XINIT
