;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.4.0 Tue Oct 12 01:18:45 2004

;--------------------------------------------------------
	.module tanhf
	.optsdcc -mmcs51 --model-small
	
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _tanhf
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
;--------------------------------------------------------
; special function bits 
;--------------------------------------------------------
;--------------------------------------------------------
; overlayable register banks 
;--------------------------------------------------------
	.area REG_BANK_0	(REL,OVR,DATA)
	.ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
	.area DSEG    (DATA)
;--------------------------------------------------------
; overlayable items in internal ram 
;--------------------------------------------------------
	.area OSEG    (OVR,DATA)
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
	.area ISEG    (DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
	.area BSEG    (BIT)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
	.area XSEG    (XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
	.area XISEG   (XDATA)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area GSINIT  (CODE)
	.area GSFINAL (CODE)
	.area GSINIT  (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME    (CODE)
	.area CSEG    (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG    (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'tanhf'
;------------------------------------------------------------
;x                         Allocated to stack - offset 1
;f                         Allocated to stack - offset 5
;g                         Allocated to stack - offset 9
;r                         Allocated to registers r2 r3 r4 r5 
;sloc0                     Allocated to stack - offset 17
;------------------------------------------------------------
;tanhf.c:40: float tanhf(const float x) reentrant
;	-----------------------------------------
;	 function tanhf
;	-----------------------------------------
_tanhf:
	ar2 = 0x02
	ar3 = 0x03
	ar4 = 0x04
	ar5 = 0x05
	ar6 = 0x06
	ar7 = 0x07
	ar0 = 0x00
	ar1 = 0x01
	push	_bp
	mov	_bp,sp
	mov	r0,a
	mov	a,sp
	add	a,#0x0c
	mov	sp,a
	mov	a,r0
;     genReceive
	push	acc
;       Peephole 212    reduced add sequence to inc
	mov     r0,_bp
	inc     r0
	pop	acc
	mov	@r0,dpl
	inc	r0
	mov	@r0,dph
	inc	r0
	mov	@r0,b
	inc	r0
	mov	@r0,a
;tanhf.c:44: f=fabsf(x);
;     genCall
;       Peephole 212    reduced add sequence to inc
	mov     r0,_bp
	inc     r0
	mov	dpl,@r0
	inc	r0
	mov	dph,@r0
	inc	r0
	mov	b,@r0
	inc	r0
	mov	a,@r0
	lcall	_fabsf
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
;     genAssign
	mov	a,_bp
	add	a,#0x05
	mov	r0,a
	mov	@r0,ar2
	inc	r0
	mov	@r0,ar3
	inc	r0
	mov	@r0,ar4
	inc	r0
	mov	@r0,ar5
;tanhf.c:45: if(f>SBIG) r=1.0;
;     genAssign
	mov	___fsgt_PARM_2,#0xB0
	mov	(___fsgt_PARM_2 + 1),#0x2C
	mov	(___fsgt_PARM_2 + 2),#0x10
	mov	(___fsgt_PARM_2 + 3),#0x41
;     genCall
	mov	a,_bp
	add	a,#0x05
	mov	r0,a
	mov	dpl,@r0
	inc	r0
	mov	dph,@r0
	inc	r0
	mov	b,@r0
	inc	r0
	mov	a,@r0
	lcall	___fsgt
	mov	a,dpl
;     genIfx
;     genIfxJump
;       Peephole 110    removed ljmp by inverse jump logic
	jz      00108$
00118$:
;     genAssign
	mov	r2,#0x00
	mov	r3,#0x00
	mov	r4,#0x80
	mov	r5,#0x3F
	ljmp	00109$
00108$:
;tanhf.c:46: else if(f>K1)
;     genAssign
	mov	___fsgt_PARM_2,#0x54
	mov	(___fsgt_PARM_2 + 1),#0x9F
	mov	(___fsgt_PARM_2 + 2),#0x0C
	mov	(___fsgt_PARM_2 + 3),#0x3F
;     genCall
	mov	a,_bp
	add	a,#0x05
	mov	r0,a
	mov	dpl,@r0
	inc	r0
	mov	dph,@r0
	inc	r0
	mov	b,@r0
	inc	r0
	mov	a,@r0
	lcall	___fsgt
	mov	a,dpl
;     genIfx
;     genIfxJump
	jnz	00119$
	ljmp	00105$
00119$:
;tanhf.c:48: r=0.5-1.0/(expf(f+f)+1.0);
;     genAssign
	mov	a,_bp
	add	a,#0x05
	mov	r0,a
	mov	___fsadd_PARM_2,@r0
	inc	r0
	mov	(___fsadd_PARM_2 + 1),@r0
	inc	r0
	mov	(___fsadd_PARM_2 + 2),@r0
	inc	r0
	mov	(___fsadd_PARM_2 + 3),@r0
;     genCall
	mov	a,_bp
	add	a,#0x05
	mov	r0,a
	mov	dpl,@r0
	inc	r0
	mov	dph,@r0
	inc	r0
	mov	b,@r0
	inc	r0
	mov	a,@r0
	lcall	___fsadd
;     genCall
;       Peephole 191    removed redundant mov
	mov     r2,dpl
	mov     r3,dph
	mov     r4,b
	mov     r5,a
;       Peephole 238.b  removed 3 redundant moves
	lcall	_expf
;     genAssign
;     genCall
	mov     r2,dpl
	mov     r3,dph
	mov     r4,b
	mov     r5,a
	mov     ___fsadd_PARM_2,#0x00
	mov     (___fsadd_PARM_2 + 1),#0x00
	mov     (___fsadd_PARM_2 + 2),#0x80
	mov     (___fsadd_PARM_2 + 3),#0x3F
;       Peephole 238.a  removed 4 redundant moves
	lcall	___fsadd
	mov	___fsdiv_PARM_2,dpl
	mov	(___fsdiv_PARM_2 + 1),dph
	mov	(___fsdiv_PARM_2 + 2),b
	mov	(___fsdiv_PARM_2 + 3),a
;     genCall
;       Peephole 182.b  used 16 bit load of dptr
	mov     dptr,#0x0000
	mov	b,#0x80
	mov	a,#0x3F
	lcall	___fsdiv
	mov	___fssub_PARM_2,dpl
	mov	(___fssub_PARM_2 + 1),dph
	mov	(___fssub_PARM_2 + 2),b
	mov	(___fssub_PARM_2 + 3),a
;     genCall
	mov	dpl,#0x00
;       Peephole 3.c    changed mov to clr
	clr     a
	mov     dph,a
	mov     b,a
	mov     a,#0x3F
	lcall	___fssub
;     genAssign
;tanhf.c:49: r+=r;
;     genAssign
;     genCall
	mov     r2,dpl
	mov     r3,dph
	mov     r4,b
	mov     r5,a
	mov     ___fsadd_PARM_2,r2
	mov     (___fsadd_PARM_2 + 1),r3
	mov     (___fsadd_PARM_2 + 2),r4
	mov     (___fsadd_PARM_2 + 3),r5
;       Peephole 238.a  removed 4 redundant moves
	lcall	___fsadd
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
;     genAssign
	ljmp	00109$
00105$:
;tanhf.c:51: else if(f<EPS) r=f;
;     genAssign
	mov	___fslt_PARM_2,#0x00
	mov	(___fslt_PARM_2 + 1),#0x00
	mov	(___fslt_PARM_2 + 2),#0x80
	mov	(___fslt_PARM_2 + 3),#0x39
;     genCall
	mov	a,_bp
	add	a,#0x05
	mov	r0,a
	mov	dpl,@r0
	inc	r0
	mov	dph,@r0
	inc	r0
	mov	b,@r0
	inc	r0
	mov	a,@r0
	lcall	___fslt
	mov	a,dpl
;     genIfx
;     genIfxJump
;       Peephole 110    removed ljmp by inverse jump logic
	jz      00102$
00120$:
;     genAssign
	mov	a,_bp
	add	a,#0x05
	mov	r0,a
	mov	ar2,@r0
	inc	r0
	mov	ar3,@r0
	inc	r0
	mov	ar4,@r0
	inc	r0
	mov	ar5,@r0
	ljmp	00109$
00102$:
;tanhf.c:54: g=f*f;
;     genAssign
	mov	a,_bp
	add	a,#0x05
	mov	r0,a
	mov	___fsmul_PARM_2,@r0
	inc	r0
	mov	(___fsmul_PARM_2 + 1),@r0
	inc	r0
	mov	(___fsmul_PARM_2 + 2),@r0
	inc	r0
	mov	(___fsmul_PARM_2 + 3),@r0
;     genCall
	mov	a,_bp
	add	a,#0x05
	mov	r0,a
	mov	dpl,@r0
	inc	r0
	mov	dph,@r0
	inc	r0
	mov	b,@r0
	inc	r0
	mov	a,@r0
	lcall	___fsmul
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
;     genAssign
	mov	a,_bp
	add	a,#0x09
	mov	r0,a
	mov	@r0,ar2
	inc	r0
	mov	@r0,ar3
	inc	r0
	mov	@r0,ar4
	inc	r0
	mov	@r0,ar5
;tanhf.c:55: r=f+f*(P(g)/Q(g));
;     genAssign
	mov	___fsmul_PARM_2,#0xB2
	mov	(___fsmul_PARM_2 + 1),#0x11
	mov	(___fsmul_PARM_2 + 2),#0x7B
	mov	(___fsmul_PARM_2 + 3),#0xBB
;     genCall
	mov	a,_bp
	add	a,#0x09
	mov	r0,a
	mov	dpl,@r0
	inc	r0
	mov	dph,@r0
	inc	r0
	mov	b,@r0
	inc	r0
	mov	a,@r0
	lcall	___fsmul
;     genAssign
;     genCall
	mov     r4,dpl
	mov     r5,dph
	mov     r2,b
	mov     r3,a
	mov     ___fsadd_PARM_2,#0xC6
	mov     (___fsadd_PARM_2 + 1),#0xE2
	mov     (___fsadd_PARM_2 + 2),#0x52
	mov     (___fsadd_PARM_2 + 3),#0xBF
;       Peephole 238.a  removed 4 redundant moves
	lcall	___fsadd
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
;     genAssign
	mov	a,_bp
	add	a,#0x09
	mov	r0,a
	mov	___fsmul_PARM_2,@r0
	inc	r0
	mov	(___fsmul_PARM_2 + 1),@r0
	inc	r0
	mov	(___fsmul_PARM_2 + 2),@r0
	inc	r0
	mov	(___fsmul_PARM_2 + 3),@r0
;     genCall
	mov	dpl,r2
	mov	dph,r3
	mov	b,r4
	mov	a,r5
	lcall	___fsmul
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
;     genAssign
	mov	___fsadd_PARM_2,#0x1A
	mov	(___fsadd_PARM_2 + 1),#0x2A
	mov	(___fsadd_PARM_2 + 2),#0x1E
	mov	(___fsadd_PARM_2 + 3),#0x40
;     genCall
	mov	a,_bp
	add	a,#0x09
	mov	r0,a
	mov	dpl,@r0
	inc	r0
	mov	dph,@r0
	inc	r0
	mov	b,@r0
	inc	r0
	mov	a,@r0
	push	ar2
	push	ar3
	push	ar4
	push	ar5
	lcall	___fsadd
	mov	___fsdiv_PARM_2,dpl
	mov	(___fsdiv_PARM_2 + 1),dph
	mov	(___fsdiv_PARM_2 + 2),b
	mov	(___fsdiv_PARM_2 + 3),a
	pop	ar5
	pop	ar4
	pop	ar3
	pop	ar2
;     genCall
	mov	dpl,r2
	mov	dph,r3
	mov	b,r4
	mov	a,r5
	lcall	___fsdiv
	mov	___fsmul_PARM_2,dpl
	mov	(___fsmul_PARM_2 + 1),dph
	mov	(___fsmul_PARM_2 + 2),b
	mov	(___fsmul_PARM_2 + 3),a
;     genCall
	mov	a,_bp
	add	a,#0x05
	mov	r0,a
	mov	dpl,@r0
	inc	r0
	mov	dph,@r0
	inc	r0
	mov	b,@r0
	inc	r0
	mov	a,@r0
	lcall	___fsmul
	mov	___fsadd_PARM_2,dpl
	mov	(___fsadd_PARM_2 + 1),dph
	mov	(___fsadd_PARM_2 + 2),b
	mov	(___fsadd_PARM_2 + 3),a
;     genCall
	mov	a,_bp
	add	a,#0x05
	mov	r0,a
	mov	dpl,@r0
	inc	r0
	mov	dph,@r0
	inc	r0
	mov	b,@r0
	inc	r0
	mov	a,@r0
	lcall	___fsadd
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
;     genAssign
00109$:
;tanhf.c:57: if(x<0.0) r=-r;
;     genAssign
	mov	___fslt_PARM_2,#0x00
	mov	(___fslt_PARM_2 + 1),#0x00
;     genCall
;       Peephole 3.c    changed mov to clr
	clr     a
	mov     (___fslt_PARM_2 + 2),a
	mov     (___fslt_PARM_2 + 3),a
;       Peephole 212    reduced add sequence to inc
	mov     r0,_bp
	inc     r0
	mov	dpl,@r0
	inc	r0
	mov	dph,@r0
	inc	r0
	mov	b,@r0
	inc	r0
	mov	a,@r0
	push	ar2
	push	ar3
	push	ar4
	push	ar5
	lcall	___fslt
	mov	a,dpl
	pop	ar5
	pop	ar4
	pop	ar3
	pop	ar2
;     genIfx
;     genIfxJump
;       Peephole 110    removed ljmp by inverse jump logic
	jz      00111$
00121$:
;     genUminus
;     genUminusFloat
	mov	a,r5
	cpl	acc.7
	mov	r5,a
00111$:
;tanhf.c:58: return r;
;     genRet
	mov	dpl,r2
	mov	dph,r3
	mov	b,r4
	mov	a,r5
00112$:
	mov	sp,_bp
	pop	_bp
	ret
	.area CSEG    (CODE)
	.area XINIT   (CODE)
