;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.4.0 Tue Oct 12 01:21:29 2004

;--------------------------------------------------------
	.module _strcmp
	
	.area CSEG
	.area GSINIT
	.area GSFINAL
	.area XINIT
	.area DSEG
	.area OSEG    (OVR)
	.area BSEG
	.area XSEG
	.area XISEG
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _strcmp_PARM_2
	.globl _strcmp
;--------------------------------------------------------
;  ram data
;--------------------------------------------------------
	.area DSEG
;--------------------------------------------------------
; overlayable items in  ram 
;--------------------------------------------------------
	.area	OSEG    (OVR)
_strcmp_sloc0_1_0::
	.ds 2
_strcmp_sloc1_1_0::
	.ds 2
_strcmp_sloc2_1_0::
	.ds 1
_strcmp_sloc3_1_0::
	.ds 2
_strcmp_sloc4_1_0::
	.ds 2
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
	.area XISEG
;--------------------------------------------------------
; extended address mode data
;--------------------------------------------------------
	.area XSEG
_strcmp_PARM_2::
	.ds 2
_strcmp_asrc_1_1::
	.ds 2
_strcmp_ret_1_1::
	.ds 2
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area GSINIT
	.area GSFINAL
	.area GSINIT
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME
	.area CSEG
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG
;------------------------------------------------------------
;Allocation info for local variables in function 'strcmp'
;------------------------------------------------------------
;adst                      Allocated with name '_strcmp_PARM_2'
;asrc                      Allocated with name '_strcmp_asrc_1_1'
;ret                       Allocated with name '_strcmp_ret_1_1'
;sloc0                     Allocated with name '_strcmp_sloc0_1_0'
;sloc1                     Allocated with name '_strcmp_sloc1_1_0'
;sloc2                     Allocated with name '_strcmp_sloc2_1_0'
;sloc3                     Allocated with name '_strcmp_sloc3_1_0'
;sloc4                     Allocated with name '_strcmp_sloc4_1_0'
;------------------------------------------------------------
;_strcmp.c:29: int strcmp (
;	-----------------------------------------
;	 function strcmp
;	-----------------------------------------
_strcmp:
;     genReceive
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, EXT(_strcmp_asrc_1_1), 0), stacked=0, isaddr=0
	sta	(_strcmp_asrc_1_1 + 1)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, EXT(_strcmp_asrc_1_1), 1), stacked=0, isaddr=0
	stx	_strcmp_asrc_1_1
;_strcmp.c:48: while( ! (ret = *asrc - *adst) && *adst)
;     genAssign
;     loadRegFromAop (a, EXT(_strcmp_asrc_1_1), 0)
	lda	(_strcmp_asrc_1_1 + 1)
;     storeRegToAop (a, DIR(_strcmp_sloc0_1_0), 0), stacked=0, isaddr=0
	sta	*(_strcmp_sloc0_1_0 + 1)
;     loadRegFromAop (a, EXT(_strcmp_asrc_1_1), 1)
	lda	_strcmp_asrc_1_1
;     storeRegToAop (a, DIR(_strcmp_sloc0_1_0), 1), stacked=0, isaddr=0
	sta	*_strcmp_sloc0_1_0
;     genAssign
;     loadRegFromAop (a, EXT(_strcmp_PARM_2), 0)
	lda	(_strcmp_PARM_2 + 1)
;     storeRegToAop (a, DIR(_strcmp_sloc1_1_0), 0), stacked=0, isaddr=0
	sta	*(_strcmp_sloc1_1_0 + 1)
;     loadRegFromAop (a, EXT(_strcmp_PARM_2), 1)
	lda	_strcmp_PARM_2
;     storeRegToAop (a, DIR(_strcmp_sloc1_1_0), 1), stacked=0, isaddr=0
	sta	*_strcmp_sloc1_1_0
00102$:
;     genPointerGet
;     genFarPointerGet
;     loadRegFromAop (hx, DIR(_strcmp_sloc0_1_0), 0)
	ldhx	*_strcmp_sloc0_1_0
	lda	,x
;     storeRegToAop (a, DIR(_strcmp_sloc2_1_0), 0), stacked=0, isaddr=0
	sta	*_strcmp_sloc2_1_0
;     genCast
	mov	*_strcmp_sloc2_1_0,*(_strcmp_sloc3_1_0 + 1)
;     loadRegFromAop (a, DIR(_strcmp_sloc2_1_0), 0)
	lda	*_strcmp_sloc2_1_0
	rola	
	clra	
	sbc	#0x00
;     storeRegToAop (a, DIR(_strcmp_sloc3_1_0), 1), stacked=0, isaddr=0
	sta	*_strcmp_sloc3_1_0
;     genPointerGet
;     genFarPointerGet
;     loadRegFromAop (hx, DIR(_strcmp_sloc1_1_0), 0)
	ldhx	*_strcmp_sloc1_1_0
	lda	,x
;     storeRegToAop (a, DIR(_strcmp_sloc2_1_0), 0), stacked=0, isaddr=0
	sta	*_strcmp_sloc2_1_0
;     genCast
	mov	*_strcmp_sloc2_1_0,*(_strcmp_sloc4_1_0 + 1)
;     loadRegFromAop (a, DIR(_strcmp_sloc2_1_0), 0)
	lda	*_strcmp_sloc2_1_0
	rola	
	clra	
	sbc	#0x00
;     storeRegToAop (a, DIR(_strcmp_sloc4_1_0), 1), stacked=0, isaddr=0
	sta	*_strcmp_sloc4_1_0
;     genMinus
;     loadRegFromAop (a, DIR(_strcmp_sloc3_1_0), 0)
	lda	*(_strcmp_sloc3_1_0 + 1)
	sub	*(_strcmp_sloc4_1_0 + 1)
;     storeRegToAop (a, DIR(_strcmp_sloc4_1_0), 0), stacked=0, isaddr=0
	sta	*(_strcmp_sloc4_1_0 + 1)
;     loadRegFromAop (a, DIR(_strcmp_sloc3_1_0), 1)
	lda	*_strcmp_sloc3_1_0
	sbc	*_strcmp_sloc4_1_0
;     storeRegToAop (a, DIR(_strcmp_sloc4_1_0), 1), stacked=0, isaddr=0
	sta	*_strcmp_sloc4_1_0
;     genAssign
;     loadRegFromAop (a, DIR(_strcmp_sloc4_1_0), 0)
	lda	*(_strcmp_sloc4_1_0 + 1)
;     storeRegToAop (a, EXT(_strcmp_ret_1_1), 0), stacked=0, isaddr=0
	sta	(_strcmp_ret_1_1 + 1)
;     loadRegFromAop (a, DIR(_strcmp_sloc4_1_0), 1)
	lda	*_strcmp_sloc4_1_0
;     storeRegToAop (a, EXT(_strcmp_ret_1_1), 1), stacked=0, isaddr=0
	sta	_strcmp_ret_1_1
;     genIfx
;     loadRegFromAop (a, DIR(_strcmp_sloc4_1_0), 0)
	lda	*(_strcmp_sloc4_1_0 + 1)
	ora	*_strcmp_sloc4_1_0
;     genIfxJump
; Peephole 2c	- eliminated jmp
	bne	00104$
00117$:
;     genPointerGet
;     genFarPointerGet
;     loadRegFromAop (hx, DIR(_strcmp_sloc1_1_0), 0)
	ldhx	*_strcmp_sloc1_1_0
	lda	,x
;     storeRegToAop (a, DIR(_strcmp_sloc4_1_0), 0), stacked=0, isaddr=0
	sta	*_strcmp_sloc4_1_0
;     genIfx
	tst	*_strcmp_sloc4_1_0
;     genIfxJump
; Peephole 2d	- eliminated jmp
	beq	00104$
00118$:
;_strcmp.c:49: ++asrc, ++adst;
; checking lic
; checking IS_ITEMP
; pset=0, pget=0
;     genPlus
; IS_AOP_HX = 0
;     loadRegFromAop (hx, DIR(_strcmp_sloc0_1_0), 0)
	ldhx	*_strcmp_sloc0_1_0
	aix	#1
;     storeRegToAop (hx, DIR(_strcmp_sloc0_1_0), 0), stacked=0, isaddr=0
	sthx	*_strcmp_sloc0_1_0
; checking lic
; checking IS_ITEMP
; pset=0, pget=0
;     genPlus
; IS_AOP_HX = 0
;     loadRegFromAop (hx, DIR(_strcmp_sloc1_1_0), 0)
	ldhx	*_strcmp_sloc1_1_0
	aix	#1
;     storeRegToAop (hx, DIR(_strcmp_sloc1_1_0), 0), stacked=0, isaddr=0
	sthx	*_strcmp_sloc1_1_0
	jmp	00102$
00104$:
;_strcmp.c:51: if ( ret < 0 )
;     genCmpLt
;     genCmp
;     loadRegFromAop (a, EXT(_strcmp_ret_1_1), 1)
	lda	_strcmp_ret_1_1
	rola
;     genIfxJump
; Peephole 2a	- eliminated jmp
	bcc	00108$
00119$:
;_strcmp.c:52: ret = -1 ;
;     genAssign
;     loadRegFromAop (a, LIT(#0xFF), 0)
	lda	#0xFF
;     storeRegToAop (a, EXT(_strcmp_ret_1_1), 0), stacked=0, isaddr=0
	sta	(_strcmp_ret_1_1 + 1)
;     loadRegFromAop (a, LIT(#0xFF), 1)
	lda	#0xFF
;     storeRegToAop (a, EXT(_strcmp_ret_1_1), 1), stacked=0, isaddr=0
	sta	_strcmp_ret_1_1
; Peephole 3	- shortened jmp to bra
	bra	00109$
00108$:
;_strcmp.c:53: else if ( ret > 0 )
;     genCmpGt
;     genCmp
;     loadRegFromAop (a, LIT(#0x00), 0)
	lda	#0x00
	sub	(_strcmp_ret_1_1 + 1)
;     loadRegFromAop (a, LIT(#0x00), 1)
	lda	#0x00
	sbc	_strcmp_ret_1_1
;     genIfxJump
	blt	00120$
; Peephole 3	- shortened jmp to bra
	bra	00109$
00120$:
;_strcmp.c:54: ret = 1 ;
;     genAssign
;     loadRegFromAop (a, LIT(#0x01), 0)
	lda	#0x01
;     storeRegToAop (a, EXT(_strcmp_ret_1_1), 0), stacked=0, isaddr=0
	sta	(_strcmp_ret_1_1 + 1)
;     loadRegFromAop (a, LIT(#0x01), 1)
	lda	#0x00
;     storeRegToAop (a, EXT(_strcmp_ret_1_1), 1), stacked=0, isaddr=0
	sta	_strcmp_ret_1_1
00109$:
;_strcmp.c:56: return( ret );
;     genRet
;     loadRegFromAop (x, EXT(_strcmp_ret_1_1), 1)
	ldx	_strcmp_ret_1_1
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, EXT(_strcmp_ret_1_1), 0)
	lda	(_strcmp_ret_1_1 + 1)
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
00110$:
	rts
	.area CSEG
	.area XINIT
