;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.4.0 Tue Oct 12 01:21:30 2004

;--------------------------------------------------------
	.module _strncat
	
	.area CSEG
	.area GSINIT
	.area GSFINAL
	.area XINIT
	.area DSEG
	.area OSEG    (OVR)
	.area BSEG
	.area XSEG
	.area XISEG
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _strncat_PARM_3
	.globl _strncat_PARM_2
	.globl _strncat
;--------------------------------------------------------
;  ram data
;--------------------------------------------------------
	.area DSEG
;--------------------------------------------------------
; overlayable items in  ram 
;--------------------------------------------------------
	.area	OSEG    (OVR)
_strncat_sloc0_1_0::
	.ds 2
_strncat_sloc1_1_0::
	.ds 1
_strncat_sloc2_1_0::
	.ds 2
_strncat_sloc3_1_0::
	.ds 2
_strncat_sloc4_1_0::
	.ds 2
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
	.area XISEG
;--------------------------------------------------------
; extended address mode data
;--------------------------------------------------------
	.area XSEG
_strncat_PARM_2::
	.ds 2
_strncat_PARM_3::
	.ds 2
_strncat_front_1_1::
	.ds 2
_strncat_start_1_1::
	.ds 2
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area GSINIT
	.area GSFINAL
	.area GSINIT
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME
	.area CSEG
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG
;------------------------------------------------------------
;Allocation info for local variables in function 'strncat'
;------------------------------------------------------------
;back                      Allocated with name '_strncat_PARM_2'
;count                     Allocated with name '_strncat_PARM_3'
;front                     Allocated with name '_strncat_front_1_1'
;start                     Allocated with name '_strncat_start_1_1'
;sloc0                     Allocated with name '_strncat_sloc0_1_0'
;sloc1                     Allocated with name '_strncat_sloc1_1_0'
;sloc2                     Allocated with name '_strncat_sloc2_1_0'
;sloc3                     Allocated with name '_strncat_sloc3_1_0'
;sloc4                     Allocated with name '_strncat_sloc4_1_0'
;------------------------------------------------------------
;_strncat.c:26: char * strncat (
;	-----------------------------------------
;	 function strncat
;	-----------------------------------------
_strncat:
;     genReceive
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, EXT(_strncat_front_1_1), 0), stacked=0, isaddr=0
	sta	(_strncat_front_1_1 + 1)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, EXT(_strncat_front_1_1), 1), stacked=0, isaddr=0
	stx	_strncat_front_1_1
;_strncat.c:32: char *start = front;
;     genAssign
;     loadRegFromAop (a, EXT(_strncat_front_1_1), 0)
	lda	(_strncat_front_1_1 + 1)
;     storeRegToAop (a, EXT(_strncat_start_1_1), 0), stacked=0, isaddr=0
	sta	(_strncat_start_1_1 + 1)
;     loadRegFromAop (a, EXT(_strncat_front_1_1), 1)
	lda	_strncat_front_1_1
;     storeRegToAop (a, EXT(_strncat_start_1_1), 1), stacked=0, isaddr=0
	sta	_strncat_start_1_1
;_strncat.c:34: while (*front++);
;     genAssign
;     loadRegFromAop (a, EXT(_strncat_front_1_1), 0)
	lda	(_strncat_front_1_1 + 1)
;     storeRegToAop (a, DIR(_strncat_sloc0_1_0), 0), stacked=0, isaddr=0
	sta	*(_strncat_sloc0_1_0 + 1)
;     loadRegFromAop (a, EXT(_strncat_front_1_1), 1)
	lda	_strncat_front_1_1
;     storeRegToAop (a, DIR(_strncat_sloc0_1_0), 1), stacked=0, isaddr=0
	sta	*_strncat_sloc0_1_0
00101$:
;     genPointerGet
;     genFarPointerGet
;     loadRegFromAop (hx, DIR(_strncat_sloc0_1_0), 0)
	ldhx	*_strncat_sloc0_1_0
	lda	,x
	aix	#1
;     storeRegToAop (a, DIR(_strncat_sloc1_1_0), 0), stacked=0, isaddr=0
	sta	*_strncat_sloc1_1_0
;     storeRegToAop (hx, DIR(_strncat_sloc0_1_0), 0), stacked=0, isaddr=0
	sthx	*_strncat_sloc0_1_0
;     genIfx
	tst	*_strncat_sloc1_1_0
;     genIfxJump
; Peephole 2c	- eliminated jmp
	bne	00101$
00116$:
;_strncat.c:36: front--;
;     genMinus
;     loadRegFromAop (a, DIR(_strncat_sloc0_1_0), 0)
	lda	*(_strncat_sloc0_1_0 + 1)
	sub	#0x01
;     storeRegToAop (a, EXT(_strncat_front_1_1), 0), stacked=0, isaddr=0
	sta	(_strncat_front_1_1 + 1)
;     loadRegFromAop (a, DIR(_strncat_sloc0_1_0), 1)
	lda	*_strncat_sloc0_1_0
	sbc	#0x00
;     storeRegToAop (a, EXT(_strncat_front_1_1), 1), stacked=0, isaddr=0
	sta	_strncat_front_1_1
;_strncat.c:38: while (count--)
;     genAssign
;     loadRegFromAop (a, EXT(_strncat_PARM_2), 0)
	lda	(_strncat_PARM_2 + 1)
;     storeRegToAop (a, DIR(_strncat_sloc0_1_0), 0), stacked=0, isaddr=0
	sta	*(_strncat_sloc0_1_0 + 1)
;     loadRegFromAop (a, EXT(_strncat_PARM_2), 1)
	lda	_strncat_PARM_2
;     storeRegToAop (a, DIR(_strncat_sloc0_1_0), 1), stacked=0, isaddr=0
	sta	*_strncat_sloc0_1_0
;     genAssign
;     loadRegFromAop (a, EXT(_strncat_front_1_1), 0)
	lda	(_strncat_front_1_1 + 1)
;     storeRegToAop (a, DIR(_strncat_sloc2_1_0), 0), stacked=0, isaddr=0
	sta	*(_strncat_sloc2_1_0 + 1)
;     loadRegFromAop (a, EXT(_strncat_front_1_1), 1)
	lda	_strncat_front_1_1
;     storeRegToAop (a, DIR(_strncat_sloc2_1_0), 1), stacked=0, isaddr=0
	sta	*_strncat_sloc2_1_0
;     genAssign
;     loadRegFromAop (a, EXT(_strncat_PARM_3), 0)
	lda	(_strncat_PARM_3 + 1)
;     storeRegToAop (a, DIR(_strncat_sloc3_1_0), 0), stacked=0, isaddr=0
	sta	*(_strncat_sloc3_1_0 + 1)
;     loadRegFromAop (a, EXT(_strncat_PARM_3), 1)
	lda	_strncat_PARM_3
;     storeRegToAop (a, DIR(_strncat_sloc3_1_0), 1), stacked=0, isaddr=0
	sta	*_strncat_sloc3_1_0
00106$:
;     genAssign
	mov	*(_strncat_sloc3_1_0 + 1),*(_strncat_sloc4_1_0 + 1)
	mov	*_strncat_sloc3_1_0,*_strncat_sloc4_1_0
;     genMinus
;     loadRegFromAop (a, DIR(_strncat_sloc3_1_0), 0)
	lda	*(_strncat_sloc3_1_0 + 1)
	sub	#0x01
;     storeRegToAop (a, DIR(_strncat_sloc3_1_0), 0), stacked=0, isaddr=0
	sta	*(_strncat_sloc3_1_0 + 1)
;     loadRegFromAop (a, DIR(_strncat_sloc3_1_0), 1)
	lda	*_strncat_sloc3_1_0
	sbc	#0x00
;     storeRegToAop (a, DIR(_strncat_sloc3_1_0), 1), stacked=0, isaddr=0
	sta	*_strncat_sloc3_1_0
;     genIfx
;     loadRegFromAop (a, DIR(_strncat_sloc4_1_0), 0)
	lda	*(_strncat_sloc4_1_0 + 1)
	ora	*_strncat_sloc4_1_0
;     genIfxJump
; Peephole 2d	- eliminated jmp
	beq	00108$
00117$:
;_strncat.c:39: if (!(*front++ = *back++))
;     genPointerGet
;     genFarPointerGet
;     loadRegFromAop (hx, DIR(_strncat_sloc0_1_0), 0)
	ldhx	*_strncat_sloc0_1_0
	lda	,x
	aix	#1
;     storeRegToAop (a, DIR(_strncat_sloc4_1_0), 0), stacked=0, isaddr=0
	sta	*_strncat_sloc4_1_0
;     storeRegToAop (hx, DIR(_strncat_sloc0_1_0), 0), stacked=0, isaddr=0
	sthx	*_strncat_sloc0_1_0
;     genPointerSet
;     genFarPointerSet
;     loadRegFromAop (hx, DIR(_strncat_sloc2_1_0), 0)
	ldhx	*_strncat_sloc2_1_0
;     loadRegFromAop (a, DIR(_strncat_sloc4_1_0), 0)
	lda	*_strncat_sloc4_1_0
	sta	,x
	aix	#1
;     storeRegToAop (hx, DIR(_strncat_sloc2_1_0), 0), stacked=0, isaddr=0
	sthx	*_strncat_sloc2_1_0
;     genAssign
;     loadRegFromAop (a, DIR(_strncat_sloc2_1_0), 0)
	lda	*(_strncat_sloc2_1_0 + 1)
;     storeRegToAop (a, EXT(_strncat_front_1_1), 0), stacked=0, isaddr=0
	sta	(_strncat_front_1_1 + 1)
;     loadRegFromAop (a, DIR(_strncat_sloc2_1_0), 1)
	lda	*_strncat_sloc2_1_0
;     storeRegToAop (a, EXT(_strncat_front_1_1), 1), stacked=0, isaddr=0
	sta	_strncat_front_1_1
;     genIfx
	tst	*_strncat_sloc4_1_0
;     genIfxJump
; Peephole 2c	- eliminated jmp
	bne	00106$
00118$:
;_strncat.c:40: return(start);
;     genRet
;     loadRegFromAop (x, EXT(_strncat_start_1_1), 1)
	ldx	_strncat_start_1_1
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, EXT(_strncat_start_1_1), 0)
	lda	(_strncat_start_1_1 + 1)
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
; Peephole 3	- shortened jmp to bra
	bra	00109$
00108$:
;_strncat.c:42: *front = '\0';
;     genPointerSet
;     genFarPointerSet
;     loadRegFromAop (hx, EXT(_strncat_front_1_1), 0)
;     loadRegFromAop (a, EXT(_strncat_front_1_1), 1)
	lda	_strncat_front_1_1
;     loadRegFromAop (x, EXT(_strncat_front_1_1), 0)
	ldx	(_strncat_front_1_1 + 1)
; transferRegReg(a,h)
	psha
	pulh
;     loadRegFromAop (a, LIT(#0x00), 0)
	lda	#0x00
	sta	,x
;_strncat.c:43: return(start);
;     genRet
;     loadRegFromAop (x, EXT(_strncat_start_1_1), 1)
	ldx	_strncat_start_1_1
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, EXT(_strncat_start_1_1), 0)
	lda	(_strncat_start_1_1 + 1)
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
00109$:
	rts
	.area CSEG
	.area XINIT
