;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.4.0 Tue Oct 12 01:21:37 2004

;--------------------------------------------------------
	.module cotf
	
	.area CSEG
	.area GSINIT
	.area GSFINAL
	.area XINIT
	.area DSEG
	.area OSEG    (OVR)
	.area BSEG
	.area XSEG
	.area XISEG
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _cotf
;--------------------------------------------------------
;  ram data
;--------------------------------------------------------
	.area DSEG
;--------------------------------------------------------
; overlayable items in  ram 
;--------------------------------------------------------
	.area OSEG    (OVR)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
	.area XISEG
;--------------------------------------------------------
; extended address mode data
;--------------------------------------------------------
	.area XSEG
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area GSINIT
	.area GSFINAL
	.area GSINIT
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME
	.area CSEG
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG
;------------------------------------------------------------
;Allocation info for local variables in function 'cotf'
;------------------------------------------------------------
;x                         Allocated to stack - offset 2
;y                         Allocated to registers 
;sloc0                     Allocated to stack - offset -4
;------------------------------------------------------------
;cotf.c:26: float cotf(const float x) reentrant
;	-----------------------------------------
;	 function cotf
;	-----------------------------------------
_cotf:
	ais	#-4
;cotf.c:30: y=fabsf(x);
;     genAssign
;     loadRegFromAop (a, SOF(x), 0)
	lda	10,s
;     storeRegToAop (a, EXT(_fabsf_PARM_1), 0), stacked=0, isaddr=1
	sta	(_fabsf_PARM_1 + 3)
;     loadRegFromAop (a, SOF(x), 1)
	lda	9,s
;     storeRegToAop (a, EXT(_fabsf_PARM_1), 1), stacked=0, isaddr=1
	sta	(_fabsf_PARM_1 + 2)
;     loadRegFromAop (a, SOF(x), 2)
	lda	8,s
;     storeRegToAop (a, EXT(_fabsf_PARM_1), 2), stacked=0, isaddr=1
	sta	(_fabsf_PARM_1 + 1)
;     loadRegFromAop (a, SOF(x), 3)
	lda	7,s
;     storeRegToAop (a, EXT(_fabsf_PARM_1), 3), stacked=0, isaddr=1
	sta	_fabsf_PARM_1
;     genCall
	jsr	_fabsf
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, EXT(___fslt_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fslt_PARM_1 + 3)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, EXT(___fslt_PARM_1), 1), stacked=0, isaddr=1
	stx	(___fslt_PARM_1 + 2)
;     loadRegFromAop (a, DIR(__ret2), 0)
	lda	*__ret2
;     storeRegToAop (a, EXT(___fslt_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fslt_PARM_1 + 1)
;     loadRegFromAop (a, DIR(__ret3), 0)
	lda	*__ret3
;     storeRegToAop (a, EXT(___fslt_PARM_1), 3), stacked=0, isaddr=1
	sta	___fslt_PARM_1
;cotf.c:31: if (y<1.0E-30) //This one requires more thinking...
;     genAssign
;     loadRegFromAop (a, LIT(#0x60), 0)
	lda	#0x60
;     storeRegToAop (a, EXT(___fslt_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fslt_PARM_2 + 3)
;     loadRegFromAop (a, LIT(#0x60), 1)
	lda	#0x42
;     storeRegToAop (a, EXT(___fslt_PARM_2), 1), stacked=0, isaddr=1
	sta	(___fslt_PARM_2 + 2)
;     loadRegFromAop (a, LIT(#0x60), 2)
	lda	#0xA2
;     storeRegToAop (a, EXT(___fslt_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fslt_PARM_2 + 1)
;     loadRegFromAop (a, LIT(#0x60), 3)
	lda	#0x0D
;     storeRegToAop (a, EXT(___fslt_PARM_2), 3), stacked=0, isaddr=1
	sta	___fslt_PARM_2
;     genCall
	jsr	___fslt
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, REG(-,-,x,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
;     genIfx
	tsta
;     genIfxJump
; Peephole 2d	- eliminated jmp
	beq	00105$
00110$:
; forgot to free a
;cotf.c:33: errno = ERANGE;
;     genAssign
;     loadRegFromAop (a, LIT(#0x22), 0)
	lda	#0x22
;     storeRegToAop (a, EXT(_errno), 0), stacked=0, isaddr=1
	sta	(_errno + 1)
;     loadRegFromAop (a, LIT(#0x22), 1)
	lda	#0x00
;     storeRegToAop (a, EXT(_errno), 1), stacked=0, isaddr=1
	sta	_errno
;cotf.c:34: if (x<0.0)
;     genAssign
;     loadRegFromAop (a, SOF(x), 0)
	lda	10,s
;     storeRegToAop (a, EXT(___fslt_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fslt_PARM_1 + 3)
;     loadRegFromAop (a, SOF(x), 1)
	lda	9,s
;     storeRegToAop (a, EXT(___fslt_PARM_1), 1), stacked=0, isaddr=1
	sta	(___fslt_PARM_1 + 2)
;     loadRegFromAop (a, SOF(x), 2)
	lda	8,s
;     storeRegToAop (a, EXT(___fslt_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fslt_PARM_1 + 1)
;     loadRegFromAop (a, SOF(x), 3)
	lda	7,s
;     storeRegToAop (a, EXT(___fslt_PARM_1), 3), stacked=0, isaddr=1
	sta	___fslt_PARM_1
;     genAssign
;     loadRegFromAop (a, LIT(#0x00), 0)
	lda	#0x00
;     storeRegToAop (a, EXT(___fslt_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fslt_PARM_2 + 3)
;     loadRegFromAop (a, LIT(#0x00), 1)
	lda	#0x00
;     storeRegToAop (a, EXT(___fslt_PARM_2), 1), stacked=0, isaddr=1
	sta	(___fslt_PARM_2 + 2)
;     loadRegFromAop (a, LIT(#0x00), 2)
	lda	#0x00
;     storeRegToAop (a, EXT(___fslt_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fslt_PARM_2 + 1)
;     loadRegFromAop (a, LIT(#0x00), 3)
	lda	#0x00
;     storeRegToAop (a, EXT(___fslt_PARM_2), 3), stacked=0, isaddr=1
	sta	___fslt_PARM_2
;     genCall
	jsr	___fslt
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, REG(-,-,x,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
;     genIfx
	tsta
;     genIfxJump
; Peephole 2d	- eliminated jmp
	beq	00102$
00111$:
; forgot to free a
;cotf.c:35: return -XMAX;
;     genRet
	mov	#0xFF,*__ret3
	mov	#0x7F,*__ret2
;     loadRegFromAop (x, LIT(#0xFF), 1)
	ldx	#0xFF
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, LIT(#0xFF), 0)
	lda	#0xFF
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
; Peephole 3	- shortened jmp to bra
	bra	00106$
00102$:
;cotf.c:37: return XMAX;
;     genRet
	mov	#0x7F,*__ret3
	mov	#0x7F,*__ret2
;     loadRegFromAop (x, LIT(#0xFF), 1)
	ldx	#0xFF
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, LIT(#0xFF), 0)
	lda	#0xFF
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
; Peephole 3	- shortened jmp to bra
	bra	00106$
00105$:
;cotf.c:39: return tancotf(x, 1);
;     genAssign
;     loadRegFromAop (a, SOF(x), 0)
	lda	10,s
;     storeRegToAop (a, EXT(_tancotf_PARM_1), 0), stacked=0, isaddr=1
	sta	(_tancotf_PARM_1 + 3)
;     loadRegFromAop (a, SOF(x), 1)
	lda	9,s
;     storeRegToAop (a, EXT(_tancotf_PARM_1), 1), stacked=0, isaddr=1
	sta	(_tancotf_PARM_1 + 2)
;     loadRegFromAop (a, SOF(x), 2)
	lda	8,s
;     storeRegToAop (a, EXT(_tancotf_PARM_1), 2), stacked=0, isaddr=1
	sta	(_tancotf_PARM_1 + 1)
;     loadRegFromAop (a, SOF(x), 3)
	lda	7,s
;     storeRegToAop (a, EXT(_tancotf_PARM_1), 3), stacked=0, isaddr=1
	sta	_tancotf_PARM_1
;     genAssign
;     loadRegFromAop (a, LIT(#0x01), 0)
	lda	#0x01
;     storeRegToAop (a, EXT(_tancotf_PARM_2), 0), stacked=0, isaddr=1
	sta	(_tancotf_PARM_2 + 1)
;     loadRegFromAop (a, LIT(#0x01), 1)
	lda	#0x00
;     storeRegToAop (a, EXT(_tancotf_PARM_2), 1), stacked=0, isaddr=1
	sta	_tancotf_PARM_2
;     genCall
	jsr	_tancotf
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, SOF(iTemp5), 0), stacked=0, isaddr=0
	sta	4,s
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, SOF(iTemp5), 1), stacked=0, isaddr=0
	stx	3,s
;     loadRegFromAop (a, DIR(__ret2), 0)
	lda	*__ret2
;     storeRegToAop (a, SOF(iTemp5), 2), stacked=0, isaddr=0
	sta	2,s
;     loadRegFromAop (a, DIR(__ret3), 0)
	lda	*__ret3
;     storeRegToAop (a, SOF(iTemp5), 3), stacked=0, isaddr=0
	sta	1,s
;     genRet
;     loadRegFromAop (a, SOF(iTemp5), 3)
	lda	1,s
;     storeRegToAop (a, DIR(__ret3), 0), stacked=0, isaddr=0
	sta	*__ret3
;     loadRegFromAop (a, SOF(iTemp5), 2)
	lda	2,s
;     storeRegToAop (a, DIR(__ret2), 0), stacked=0, isaddr=0
	sta	*__ret2
;     loadRegFromAop (x, SOF(iTemp5), 1)
	ldx	3,s
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, SOF(iTemp5), 0)
	lda	4,s
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
00106$:
	ais	#4
	rts
	.area CSEG
	.area XINIT
