;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.4.0 Tue Oct 12 01:21:36 2004

;--------------------------------------------------------
	.module sqrtf
	
	.area CSEG
	.area GSINIT
	.area GSFINAL
	.area XINIT
	.area DSEG
	.area OSEG    (OVR)
	.area BSEG
	.area XSEG
	.area XISEG
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _sqrtf
;--------------------------------------------------------
;  ram data
;--------------------------------------------------------
	.area DSEG
;--------------------------------------------------------
; overlayable items in  ram 
;--------------------------------------------------------
	.area OSEG    (OVR)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
	.area XISEG
;--------------------------------------------------------
; extended address mode data
;--------------------------------------------------------
	.area XSEG
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area GSINIT
	.area GSFINAL
	.area GSINIT
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME
	.area CSEG
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG
;------------------------------------------------------------
;Allocation info for local variables in function 'sqrtf'
;------------------------------------------------------------
;x                         Allocated to stack - offset 2
;f                         Allocated to stack - offset -4
;y                         Allocated to stack - offset -8
;n                         Allocated to stack - offset -10
;sloc0                     Allocated to stack - offset -14
;------------------------------------------------------------
;sqrtf.c:27: float sqrtf(const float x) reentrant
;	-----------------------------------------
;	 function sqrtf
;	-----------------------------------------
_sqrtf:
	ais	#-14
;sqrtf.c:32: if (x==0.0) return x;
;     genAssign
;     loadRegFromAop (a, SOF(x), 0)
	lda	20,s
;     storeRegToAop (a, EXT(___fseq_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fseq_PARM_1 + 3)
;     loadRegFromAop (a, SOF(x), 1)
	lda	19,s
;     storeRegToAop (a, EXT(___fseq_PARM_1), 1), stacked=0, isaddr=1
	sta	(___fseq_PARM_1 + 2)
;     loadRegFromAop (a, SOF(x), 2)
	lda	18,s
;     storeRegToAop (a, EXT(___fseq_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fseq_PARM_1 + 1)
;     loadRegFromAop (a, SOF(x), 3)
	lda	17,s
;     storeRegToAop (a, EXT(___fseq_PARM_1), 3), stacked=0, isaddr=1
	sta	___fseq_PARM_1
;     genAssign
;     loadRegFromAop (a, LIT(#0x00), 0)
	lda	#0x00
;     storeRegToAop (a, EXT(___fseq_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fseq_PARM_2 + 3)
;     loadRegFromAop (a, LIT(#0x00), 1)
	lda	#0x00
;     storeRegToAop (a, EXT(___fseq_PARM_2), 1), stacked=0, isaddr=1
	sta	(___fseq_PARM_2 + 2)
;     loadRegFromAop (a, LIT(#0x00), 2)
	lda	#0x00
;     storeRegToAop (a, EXT(___fseq_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fseq_PARM_2 + 1)
;     loadRegFromAop (a, LIT(#0x00), 3)
	lda	#0x00
;     storeRegToAop (a, EXT(___fseq_PARM_2), 3), stacked=0, isaddr=1
	sta	___fseq_PARM_2
;     genCall
	jsr	___fseq
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, REG(-,-,x,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
;     genIfx
	tsta
;     genIfxJump
; Peephole 2d	- eliminated jmp
	beq	00107$
00117$:
; forgot to free a
;     genRet
;     loadRegFromAop (a, SOF(x), 3)
	lda	17,s
;     storeRegToAop (a, DIR(__ret3), 0), stacked=0, isaddr=0
	sta	*__ret3
;     loadRegFromAop (a, SOF(x), 2)
	lda	18,s
;     storeRegToAop (a, DIR(__ret2), 0), stacked=0, isaddr=0
	sta	*__ret2
;     loadRegFromAop (x, SOF(x), 1)
	ldx	19,s
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, SOF(x), 0)
	lda	20,s
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
	jmp	00111$
00107$:
;sqrtf.c:33: else if (x==1.0) return 1.0;
;     genAssign
;     loadRegFromAop (a, SOF(x), 0)
	lda	20,s
;     storeRegToAop (a, EXT(___fseq_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fseq_PARM_1 + 3)
;     loadRegFromAop (a, SOF(x), 1)
	lda	19,s
;     storeRegToAop (a, EXT(___fseq_PARM_1), 1), stacked=0, isaddr=1
	sta	(___fseq_PARM_1 + 2)
;     loadRegFromAop (a, SOF(x), 2)
	lda	18,s
;     storeRegToAop (a, EXT(___fseq_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fseq_PARM_1 + 1)
;     loadRegFromAop (a, SOF(x), 3)
	lda	17,s
;     storeRegToAop (a, EXT(___fseq_PARM_1), 3), stacked=0, isaddr=1
	sta	___fseq_PARM_1
;     genAssign
;     loadRegFromAop (a, LIT(#0x00), 0)
	lda	#0x00
;     storeRegToAop (a, EXT(___fseq_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fseq_PARM_2 + 3)
;     loadRegFromAop (a, LIT(#0x00), 1)
	lda	#0x00
;     storeRegToAop (a, EXT(___fseq_PARM_2), 1), stacked=0, isaddr=1
	sta	(___fseq_PARM_2 + 2)
;     loadRegFromAop (a, LIT(#0x00), 2)
	lda	#0x80
;     storeRegToAop (a, EXT(___fseq_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fseq_PARM_2 + 1)
;     loadRegFromAop (a, LIT(#0x00), 3)
	lda	#0x3F
;     storeRegToAop (a, EXT(___fseq_PARM_2), 3), stacked=0, isaddr=1
	sta	___fseq_PARM_2
;     genCall
	jsr	___fseq
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, REG(-,-,x,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
;     genIfx
	tsta
;     genIfxJump
; Peephole 2d	- eliminated jmp
	beq	00104$
00118$:
; forgot to free a
;     genRet
	mov	#0x3F,*__ret3
	mov	#0x80,*__ret2
;     loadRegFromAop (x, LIT(#0x00), 1)
	ldx	#0x00
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, LIT(#0x00), 0)
	lda	#0x00
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
	jmp	00111$
00104$:
;sqrtf.c:34: else if (x<0.0)
;     genAssign
;     loadRegFromAop (a, SOF(x), 0)
	lda	20,s
;     storeRegToAop (a, EXT(___fslt_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fslt_PARM_1 + 3)
;     loadRegFromAop (a, SOF(x), 1)
	lda	19,s
;     storeRegToAop (a, EXT(___fslt_PARM_1), 1), stacked=0, isaddr=1
	sta	(___fslt_PARM_1 + 2)
;     loadRegFromAop (a, SOF(x), 2)
	lda	18,s
;     storeRegToAop (a, EXT(___fslt_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fslt_PARM_1 + 1)
;     loadRegFromAop (a, SOF(x), 3)
	lda	17,s
;     storeRegToAop (a, EXT(___fslt_PARM_1), 3), stacked=0, isaddr=1
	sta	___fslt_PARM_1
;     genAssign
;     loadRegFromAop (a, LIT(#0x00), 0)
	lda	#0x00
;     storeRegToAop (a, EXT(___fslt_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fslt_PARM_2 + 3)
;     loadRegFromAop (a, LIT(#0x00), 1)
	lda	#0x00
;     storeRegToAop (a, EXT(___fslt_PARM_2), 1), stacked=0, isaddr=1
	sta	(___fslt_PARM_2 + 2)
;     loadRegFromAop (a, LIT(#0x00), 2)
	lda	#0x00
;     storeRegToAop (a, EXT(___fslt_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fslt_PARM_2 + 1)
;     loadRegFromAop (a, LIT(#0x00), 3)
	lda	#0x00
;     storeRegToAop (a, EXT(___fslt_PARM_2), 3), stacked=0, isaddr=1
	sta	___fslt_PARM_2
;     genCall
	jsr	___fslt
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, REG(-,-,x,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
;     genIfx
	tsta
;     genIfxJump
; Peephole 2d	- eliminated jmp
	beq	00108$
00119$:
; forgot to free a
;sqrtf.c:36: errno=EDOM;
;     genAssign
;     loadRegFromAop (a, LIT(#0x21), 0)
	lda	#0x21
;     storeRegToAop (a, EXT(_errno), 0), stacked=0, isaddr=1
	sta	(_errno + 1)
;     loadRegFromAop (a, LIT(#0x21), 1)
	lda	#0x00
;     storeRegToAop (a, EXT(_errno), 1), stacked=0, isaddr=1
	sta	_errno
;sqrtf.c:37: return 0.0;
;     genRet
	mov	#0x00,*__ret3
	mov	#0x00,*__ret2
;     loadRegFromAop (x, LIT(#0x00), 1)
	ldx	#0x00
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, LIT(#0x00), 0)
	lda	#0x00
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
	jmp	00111$
00108$:
;sqrtf.c:39: f=frexpf(x, &n);
;     genAddrOf
	tsx
	aix	#4
;     storeRegToAop (hx, EXT(_frexpf_PARM_2), 0), stacked=0, isaddr=1
; transferRegReg(h,a)
	pshh
	pula
;     storeRegToAop (a, EXT(_frexpf_PARM_2), 1), stacked=0, isaddr=1
	sta	_frexpf_PARM_2
;     storeRegToAop (x, EXT(_frexpf_PARM_2), 0), stacked=0, isaddr=1
	stx	(_frexpf_PARM_2 + 1)
;     genAssign
;     loadRegFromAop (a, SOF(x), 0)
	lda	20,s
;     storeRegToAop (a, EXT(_frexpf_PARM_1), 0), stacked=0, isaddr=1
	sta	(_frexpf_PARM_1 + 3)
;     loadRegFromAop (a, SOF(x), 1)
	lda	19,s
;     storeRegToAop (a, EXT(_frexpf_PARM_1), 1), stacked=0, isaddr=1
	sta	(_frexpf_PARM_1 + 2)
;     loadRegFromAop (a, SOF(x), 2)
	lda	18,s
;     storeRegToAop (a, EXT(_frexpf_PARM_1), 2), stacked=0, isaddr=1
	sta	(_frexpf_PARM_1 + 1)
;     loadRegFromAop (a, SOF(x), 3)
	lda	17,s
;     storeRegToAop (a, EXT(_frexpf_PARM_1), 3), stacked=0, isaddr=1
	sta	_frexpf_PARM_1
;     genCall
	jsr	_frexpf
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, SOF(iTemp7), 0), stacked=0, isaddr=0
	sta	14,s
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, SOF(iTemp7), 1), stacked=0, isaddr=0
	stx	13,s
;     loadRegFromAop (a, DIR(__ret2), 0)
	lda	*__ret2
;     storeRegToAop (a, SOF(iTemp7), 2), stacked=0, isaddr=0
	sta	12,s
;     loadRegFromAop (a, DIR(__ret3), 0)
	lda	*__ret3
;     storeRegToAop (a, SOF(iTemp7), 3), stacked=0, isaddr=0
	sta	11,s
;     genAssign
;sqrtf.c:40: y=0.41731+0.59016*f; /*Educated guess*/
;     genAssign
;     loadRegFromAop (a, SOF(iTemp4), 0)
	lda	14,s
;     storeRegToAop (a, EXT(___fsmul_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fsmul_PARM_1 + 3)
;     loadRegFromAop (a, SOF(iTemp4), 1)
	lda	13,s
;     storeRegToAop (a, EXT(___fsmul_PARM_1), 1), stacked=0, isaddr=1
	sta	(___fsmul_PARM_1 + 2)
;     loadRegFromAop (a, SOF(iTemp4), 2)
	lda	12,s
;     storeRegToAop (a, EXT(___fsmul_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fsmul_PARM_1 + 1)
;     loadRegFromAop (a, SOF(iTemp4), 3)
	lda	11,s
;     storeRegToAop (a, EXT(___fsmul_PARM_1), 3), stacked=0, isaddr=1
	sta	___fsmul_PARM_1
;     genAssign
;     loadRegFromAop (a, LIT(#0xBA), 0)
	lda	#0xBA
;     storeRegToAop (a, EXT(___fsmul_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fsmul_PARM_2 + 3)
;     loadRegFromAop (a, LIT(#0xBA), 1)
	lda	#0x14
;     storeRegToAop (a, EXT(___fsmul_PARM_2), 1), stacked=0, isaddr=1
	sta	(___fsmul_PARM_2 + 2)
;     loadRegFromAop (a, LIT(#0xBA), 2)
	lda	#0x17
;     storeRegToAop (a, EXT(___fsmul_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fsmul_PARM_2 + 1)
;     loadRegFromAop (a, LIT(#0xBA), 3)
	lda	#0x3F
;     storeRegToAop (a, EXT(___fsmul_PARM_2), 3), stacked=0, isaddr=1
	sta	___fsmul_PARM_2
;     genCall
	jsr	___fsmul
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, EXT(___fsadd_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fsadd_PARM_1 + 3)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, EXT(___fsadd_PARM_1), 1), stacked=0, isaddr=1
	stx	(___fsadd_PARM_1 + 2)
;     loadRegFromAop (a, DIR(__ret2), 0)
	lda	*__ret2
;     storeRegToAop (a, EXT(___fsadd_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fsadd_PARM_1 + 1)
;     loadRegFromAop (a, DIR(__ret3), 0)
	lda	*__ret3
;     storeRegToAop (a, EXT(___fsadd_PARM_1), 3), stacked=0, isaddr=1
	sta	___fsadd_PARM_1
;     genAssign
;     loadRegFromAop (a, LIT(#0xA8), 0)
	lda	#0xA8
;     storeRegToAop (a, EXT(___fsadd_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fsadd_PARM_2 + 3)
;     loadRegFromAop (a, LIT(#0xA8), 1)
	lda	#0xA9
;     storeRegToAop (a, EXT(___fsadd_PARM_2), 1), stacked=0, isaddr=1
	sta	(___fsadd_PARM_2 + 2)
;     loadRegFromAop (a, LIT(#0xA8), 2)
	lda	#0xD5
;     storeRegToAop (a, EXT(___fsadd_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fsadd_PARM_2 + 1)
;     loadRegFromAop (a, LIT(#0xA8), 3)
	lda	#0x3E
;     storeRegToAop (a, EXT(___fsadd_PARM_2), 3), stacked=0, isaddr=1
	sta	___fsadd_PARM_2
;     genCall
	jsr	___fsadd
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, SOF(iTemp10), 0), stacked=0, isaddr=0
	sta	10,s
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, SOF(iTemp10), 1), stacked=0, isaddr=0
	stx	9,s
;     loadRegFromAop (a, DIR(__ret2), 0)
	lda	*__ret2
;     storeRegToAop (a, SOF(iTemp10), 2), stacked=0, isaddr=0
	sta	8,s
;     loadRegFromAop (a, DIR(__ret3), 0)
	lda	*__ret3
;     storeRegToAop (a, SOF(iTemp10), 3), stacked=0, isaddr=0
	sta	7,s
;     genAssign
;sqrtf.c:42: y+=f/y;
;     genAssign
;     loadRegFromAop (a, SOF(iTemp4), 0)
	lda	14,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fsdiv_PARM_1 + 3)
;     loadRegFromAop (a, SOF(iTemp4), 1)
	lda	13,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_1), 1), stacked=0, isaddr=1
	sta	(___fsdiv_PARM_1 + 2)
;     loadRegFromAop (a, SOF(iTemp4), 2)
	lda	12,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fsdiv_PARM_1 + 1)
;     loadRegFromAop (a, SOF(iTemp4), 3)
	lda	11,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_1), 3), stacked=0, isaddr=1
	sta	___fsdiv_PARM_1
;     genAssign
;     loadRegFromAop (a, SOF(iTemp8), 0)
	lda	10,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fsdiv_PARM_2 + 3)
;     loadRegFromAop (a, SOF(iTemp8), 1)
	lda	9,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_2), 1), stacked=0, isaddr=1
	sta	(___fsdiv_PARM_2 + 2)
;     loadRegFromAop (a, SOF(iTemp8), 2)
	lda	8,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fsdiv_PARM_2 + 1)
;     loadRegFromAop (a, SOF(iTemp8), 3)
	lda	7,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_2), 3), stacked=0, isaddr=1
	sta	___fsdiv_PARM_2
;     genCall
	jsr	___fsdiv
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, EXT(___fsadd_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fsadd_PARM_2 + 3)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, EXT(___fsadd_PARM_2), 1), stacked=0, isaddr=1
	stx	(___fsadd_PARM_2 + 2)
;     loadRegFromAop (a, DIR(__ret2), 0)
	lda	*__ret2
;     storeRegToAop (a, EXT(___fsadd_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fsadd_PARM_2 + 1)
;     loadRegFromAop (a, DIR(__ret3), 0)
	lda	*__ret3
;     storeRegToAop (a, EXT(___fsadd_PARM_2), 3), stacked=0, isaddr=1
	sta	___fsadd_PARM_2
;     genAssign
;     loadRegFromAop (a, SOF(iTemp8), 0)
	lda	10,s
;     storeRegToAop (a, EXT(___fsadd_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fsadd_PARM_1 + 3)
;     loadRegFromAop (a, SOF(iTemp8), 1)
	lda	9,s
;     storeRegToAop (a, EXT(___fsadd_PARM_1), 1), stacked=0, isaddr=1
	sta	(___fsadd_PARM_1 + 2)
;     loadRegFromAop (a, SOF(iTemp8), 2)
	lda	8,s
;     storeRegToAop (a, EXT(___fsadd_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fsadd_PARM_1 + 1)
;     loadRegFromAop (a, SOF(iTemp8), 3)
	lda	7,s
;     storeRegToAop (a, EXT(___fsadd_PARM_1), 3), stacked=0, isaddr=1
	sta	___fsadd_PARM_1
;     genCall
	jsr	___fsadd
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, SOF(iTemp12), 0), stacked=0, isaddr=0
	sta	4,s
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, SOF(iTemp12), 1), stacked=0, isaddr=0
	stx	3,s
;     loadRegFromAop (a, DIR(__ret2), 0)
	lda	*__ret2
;     storeRegToAop (a, SOF(iTemp12), 2), stacked=0, isaddr=0
	sta	2,s
;     loadRegFromAop (a, DIR(__ret3), 0)
	lda	*__ret3
;     storeRegToAop (a, SOF(iTemp12), 3), stacked=0, isaddr=0
	sta	1,s
;     genAssign
;     loadRegFromAop (a, SOF(iTemp12), 0)
	lda	4,s
;     storeRegToAop (a, SOF(iTemp8), 0), stacked=0, isaddr=0
	sta	10,s
;     loadRegFromAop (a, SOF(iTemp12), 1)
	lda	3,s
;     storeRegToAop (a, SOF(iTemp8), 1), stacked=0, isaddr=0
	sta	9,s
;     loadRegFromAop (a, SOF(iTemp12), 2)
	lda	2,s
;     storeRegToAop (a, SOF(iTemp8), 2), stacked=0, isaddr=0
	sta	8,s
;     loadRegFromAop (a, SOF(iTemp12), 3)
	lda	1,s
;     storeRegToAop (a, SOF(iTemp8), 3), stacked=0, isaddr=0
	sta	7,s
;sqrtf.c:43: y=ldexpf(y, -2) + f/y; /*Faster version of 0.25 * y + f/y*/
;     genAssign
;     loadRegFromAop (a, SOF(iTemp8), 0)
	lda	10,s
;     storeRegToAop (a, EXT(_ldexpf_PARM_1), 0), stacked=0, isaddr=1
	sta	(_ldexpf_PARM_1 + 3)
;     loadRegFromAop (a, SOF(iTemp8), 1)
	lda	9,s
;     storeRegToAop (a, EXT(_ldexpf_PARM_1), 1), stacked=0, isaddr=1
	sta	(_ldexpf_PARM_1 + 2)
;     loadRegFromAop (a, SOF(iTemp8), 2)
	lda	8,s
;     storeRegToAop (a, EXT(_ldexpf_PARM_1), 2), stacked=0, isaddr=1
	sta	(_ldexpf_PARM_1 + 1)
;     loadRegFromAop (a, SOF(iTemp8), 3)
	lda	7,s
;     storeRegToAop (a, EXT(_ldexpf_PARM_1), 3), stacked=0, isaddr=1
	sta	_ldexpf_PARM_1
;     genAssign
;     loadRegFromAop (a, LIT(#0xFE), 0)
	lda	#0xFE
;     storeRegToAop (a, EXT(_ldexpf_PARM_2), 0), stacked=0, isaddr=1
	sta	(_ldexpf_PARM_2 + 1)
;     loadRegFromAop (a, LIT(#0xFE), 1)
	lda	#0xFF
;     storeRegToAop (a, EXT(_ldexpf_PARM_2), 1), stacked=0, isaddr=1
	sta	_ldexpf_PARM_2
;     genCall
	jsr	_ldexpf
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, EXT(___fsadd_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fsadd_PARM_1 + 3)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, EXT(___fsadd_PARM_1), 1), stacked=0, isaddr=1
	stx	(___fsadd_PARM_1 + 2)
;     loadRegFromAop (a, DIR(__ret2), 0)
	lda	*__ret2
;     storeRegToAop (a, EXT(___fsadd_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fsadd_PARM_1 + 1)
;     loadRegFromAop (a, DIR(__ret3), 0)
	lda	*__ret3
;     storeRegToAop (a, EXT(___fsadd_PARM_1), 3), stacked=0, isaddr=1
	sta	___fsadd_PARM_1
;     genAssign
;     loadRegFromAop (a, SOF(iTemp4), 0)
	lda	14,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fsdiv_PARM_1 + 3)
;     loadRegFromAop (a, SOF(iTemp4), 1)
	lda	13,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_1), 1), stacked=0, isaddr=1
	sta	(___fsdiv_PARM_1 + 2)
;     loadRegFromAop (a, SOF(iTemp4), 2)
	lda	12,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fsdiv_PARM_1 + 1)
;     loadRegFromAop (a, SOF(iTemp4), 3)
	lda	11,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_1), 3), stacked=0, isaddr=1
	sta	___fsdiv_PARM_1
;     genAssign
;     loadRegFromAop (a, SOF(iTemp8), 0)
	lda	10,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fsdiv_PARM_2 + 3)
;     loadRegFromAop (a, SOF(iTemp8), 1)
	lda	9,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_2), 1), stacked=0, isaddr=1
	sta	(___fsdiv_PARM_2 + 2)
;     loadRegFromAop (a, SOF(iTemp8), 2)
	lda	8,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fsdiv_PARM_2 + 1)
;     loadRegFromAop (a, SOF(iTemp8), 3)
	lda	7,s
;     storeRegToAop (a, EXT(___fsdiv_PARM_2), 3), stacked=0, isaddr=1
	sta	___fsdiv_PARM_2
;     genCall
	jsr	___fsdiv
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, EXT(___fsadd_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fsadd_PARM_2 + 3)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, EXT(___fsadd_PARM_2), 1), stacked=0, isaddr=1
	stx	(___fsadd_PARM_2 + 2)
;     loadRegFromAop (a, DIR(__ret2), 0)
	lda	*__ret2
;     storeRegToAop (a, EXT(___fsadd_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fsadd_PARM_2 + 1)
;     loadRegFromAop (a, DIR(__ret3), 0)
	lda	*__ret3
;     storeRegToAop (a, EXT(___fsadd_PARM_2), 3), stacked=0, isaddr=1
	sta	___fsadd_PARM_2
;     genCall
	jsr	___fsadd
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, SOF(iTemp15), 0), stacked=0, isaddr=0
	sta	10,s
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, SOF(iTemp15), 1), stacked=0, isaddr=0
	stx	9,s
;     loadRegFromAop (a, DIR(__ret2), 0)
	lda	*__ret2
;     storeRegToAop (a, SOF(iTemp15), 2), stacked=0, isaddr=0
	sta	8,s
;     loadRegFromAop (a, DIR(__ret3), 0)
	lda	*__ret3
;     storeRegToAop (a, SOF(iTemp15), 3), stacked=0, isaddr=0
	sta	7,s
;     genAssign
;sqrtf.c:45: if (n&1)
;     genAnd
;     loadRegFromAop (a, SOF(n), 0)
	lda	6,s
	and	#0x01
	bne	00120$
;     loadRegFromAop (a, SOF(n), 1)
	lda	5,s
	and	#0x00
00120$:
;     genIfxJump
; Peephole 2d	- eliminated jmp
	beq	00110$
00121$:
;sqrtf.c:47: y*=0.7071067812;
;     genAssign
;     loadRegFromAop (a, SOF(iTemp8), 0)
	lda	10,s
;     storeRegToAop (a, EXT(___fsmul_PARM_1), 0), stacked=0, isaddr=1
	sta	(___fsmul_PARM_1 + 3)
;     loadRegFromAop (a, SOF(iTemp8), 1)
	lda	9,s
;     storeRegToAop (a, EXT(___fsmul_PARM_1), 1), stacked=0, isaddr=1
	sta	(___fsmul_PARM_1 + 2)
;     loadRegFromAop (a, SOF(iTemp8), 2)
	lda	8,s
;     storeRegToAop (a, EXT(___fsmul_PARM_1), 2), stacked=0, isaddr=1
	sta	(___fsmul_PARM_1 + 1)
;     loadRegFromAop (a, SOF(iTemp8), 3)
	lda	7,s
;     storeRegToAop (a, EXT(___fsmul_PARM_1), 3), stacked=0, isaddr=1
	sta	___fsmul_PARM_1
;     genAssign
;     loadRegFromAop (a, LIT(#0xF3), 0)
	lda	#0xF3
;     storeRegToAop (a, EXT(___fsmul_PARM_2), 0), stacked=0, isaddr=1
	sta	(___fsmul_PARM_2 + 3)
;     loadRegFromAop (a, LIT(#0xF3), 1)
	lda	#0x04
;     storeRegToAop (a, EXT(___fsmul_PARM_2), 1), stacked=0, isaddr=1
	sta	(___fsmul_PARM_2 + 2)
;     loadRegFromAop (a, LIT(#0xF3), 2)
	lda	#0x35
;     storeRegToAop (a, EXT(___fsmul_PARM_2), 2), stacked=0, isaddr=1
	sta	(___fsmul_PARM_2 + 1)
;     loadRegFromAop (a, LIT(#0xF3), 3)
	lda	#0x3F
;     storeRegToAop (a, EXT(___fsmul_PARM_2), 3), stacked=0, isaddr=1
	sta	___fsmul_PARM_2
;     genCall
	jsr	___fsmul
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, SOF(iTemp17), 0), stacked=0, isaddr=0
	sta	4,s
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, SOF(iTemp17), 1), stacked=0, isaddr=0
	stx	3,s
;     loadRegFromAop (a, DIR(__ret2), 0)
	lda	*__ret2
;     storeRegToAop (a, SOF(iTemp17), 2), stacked=0, isaddr=0
	sta	2,s
;     loadRegFromAop (a, DIR(__ret3), 0)
	lda	*__ret3
;     storeRegToAop (a, SOF(iTemp17), 3), stacked=0, isaddr=0
	sta	1,s
;     genAssign
;     loadRegFromAop (a, SOF(iTemp17), 0)
	lda	4,s
;     storeRegToAop (a, SOF(iTemp8), 0), stacked=0, isaddr=0
	sta	10,s
;     loadRegFromAop (a, SOF(iTemp17), 1)
	lda	3,s
;     storeRegToAop (a, SOF(iTemp8), 1), stacked=0, isaddr=0
	sta	9,s
;     loadRegFromAop (a, SOF(iTemp17), 2)
	lda	2,s
;     storeRegToAop (a, SOF(iTemp8), 2), stacked=0, isaddr=0
	sta	8,s
;     loadRegFromAop (a, SOF(iTemp17), 3)
	lda	1,s
;     storeRegToAop (a, SOF(iTemp8), 3), stacked=0, isaddr=0
	sta	7,s
;sqrtf.c:48: ++n;
; checking lic
; checking IS_ITEMP
;     genPlus
; IS_AOP_HX = 0
; icount = 1, sameRegs=1
;     genPlusIncr
	inc	6,s
	bne	00122$
	inc	5,s
00122$:
00110$:
;sqrtf.c:50: return ldexpf(y, n/2);
;     genAssign
;     loadRegFromAop (a, LIT(#0x02), 0)
	lda	#0x02
;     storeRegToAop (a, EXT(__divsint_PARM_2), 0), stacked=0, isaddr=1
	sta	(__divsint_PARM_2 + 1)
;     loadRegFromAop (a, LIT(#0x02), 1)
	lda	#0x00
;     storeRegToAop (a, EXT(__divsint_PARM_2), 1), stacked=0, isaddr=1
	sta	__divsint_PARM_2
;     genCall
;     loadRegFromAop (x, SOF(n), 1)
	ldx	5,s
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, SOF(n), 0)
	lda	6,s
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
	jsr	__divsint
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, EXT(_ldexpf_PARM_2), 0), stacked=0, isaddr=1
	sta	(_ldexpf_PARM_2 + 1)
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, EXT(_ldexpf_PARM_2), 1), stacked=0, isaddr=1
	stx	_ldexpf_PARM_2
;     genAssign
;     loadRegFromAop (a, SOF(iTemp8), 0)
	lda	10,s
;     storeRegToAop (a, EXT(_ldexpf_PARM_1), 0), stacked=0, isaddr=1
	sta	(_ldexpf_PARM_1 + 3)
;     loadRegFromAop (a, SOF(iTemp8), 1)
	lda	9,s
;     storeRegToAop (a, EXT(_ldexpf_PARM_1), 1), stacked=0, isaddr=1
	sta	(_ldexpf_PARM_1 + 2)
;     loadRegFromAop (a, SOF(iTemp8), 2)
	lda	8,s
;     storeRegToAop (a, EXT(_ldexpf_PARM_1), 2), stacked=0, isaddr=1
	sta	(_ldexpf_PARM_1 + 1)
;     loadRegFromAop (a, SOF(iTemp8), 3)
	lda	7,s
;     storeRegToAop (a, EXT(_ldexpf_PARM_1), 3), stacked=0, isaddr=1
	sta	_ldexpf_PARM_1
;     genCall
	jsr	_ldexpf
;     loadRegFromAop (a, REG(-,-,-,a), 0)
; transferRegReg(a,a)
;     storeRegToAop (a, SOF(iTemp20), 0), stacked=0, isaddr=0
	sta	4,s
;     loadRegFromAop (x, REG(-,-,-,x), 0)
; transferRegReg(x,x)
;     storeRegToAop (x, SOF(iTemp20), 1), stacked=0, isaddr=0
	stx	3,s
;     loadRegFromAop (a, DIR(__ret2), 0)
	lda	*__ret2
;     storeRegToAop (a, SOF(iTemp20), 2), stacked=0, isaddr=0
	sta	2,s
;     loadRegFromAop (a, DIR(__ret3), 0)
	lda	*__ret3
;     storeRegToAop (a, SOF(iTemp20), 3), stacked=0, isaddr=0
	sta	1,s
;     genRet
;     loadRegFromAop (a, SOF(iTemp20), 3)
	lda	1,s
;     storeRegToAop (a, DIR(__ret3), 0), stacked=0, isaddr=0
	sta	*__ret3
;     loadRegFromAop (a, SOF(iTemp20), 2)
	lda	2,s
;     storeRegToAop (a, DIR(__ret2), 0), stacked=0, isaddr=0
	sta	*__ret2
;     loadRegFromAop (x, SOF(iTemp20), 1)
	ldx	3,s
;     storeRegToAop (x, REG(-,-,-,x), 0), stacked=0, isaddr=0
; transferRegReg(x,x)
;     loadRegFromAop (a, SOF(iTemp20), 0)
	lda	4,s
;     storeRegToAop (a, REG(-,-,-,a), 0), stacked=0, isaddr=0
; transferRegReg(a,a)
00111$:
	ais	#14
	rts
	.area CSEG
	.area XINIT
