Scicos Block
fr - eng

##
D flip-flop

### Contents

- D flip-flop
  - Palette
  - Description
  - Default properties
  - Interfacing function
  - Compiled Super Block content
  - See also
  - Authors

### Palette

- Integer - Integer palette

### Description

The DFLIPFLOP block outputs the input state when the enable is set and on the rising edge of the clock. The input is D the enable is en and the clock is clk. Q and !Q are the outputs of this block. This block is almostly used with digital number, the input data type is int8.

The truth table of this block is

en | D | Q | !Q
0 | 0 | 0 | 1
0 | 1 | 0 | 1
1 | 0 | 0 | 1
1 | 1 | 1 | 0

### Default properties

- always active: no
- direct-feedthrough: yes
- zero-crossing: no
- mode: no
- regular inputs:
  - port 1 : size [1,1] / type 5
  - port 2 : size [1,1] / type 1
  - port 3 : size [1,1] / type 1
- regular outputs:
  - port 1 : size [1,1] / type 5
  - port 2 : size [1,1] / type 5
- number/sizes of activation inputs: 0
- number/sizes of activation outputs: 0
- continuous-time state: no
- discrete-time state: no
- object discrete-time state: no
- name of computational function: csuper

### Interfacing function

- SCI/macros/scicos_blocks/IntegerOp/DFLIPFLOP.sci [view code]

### Compiled Super Block content

### See also

- DLATCH - D latch flip-flop (Scicos Block)
- SRFLIPFLOP - SR flip-flop (Scicos Block)
- JKFLIPFLOP - JK flip-flop (Scicos Block)

### Authors

Fady NASSIF INRIA