//===- TableGen'erated file -------------------------------------*- C++ -*-===//
//
// Intrinsic Function Source Fragment
//
// Automatically generated file, do not edit!
//
//===----------------------------------------------------------------------===//

// VisualStudio defines setjmp as _setjmp
#if defined(_MSC_VER) && defined(setjmp)
#define setjmp_undefined_for_visual_studio
#undef setjmp
#endif

// Enum values for Intrinsics.h
#ifdef GET_INTRINSIC_ENUM_VALUES
    alpha_umulh,                              // llvm.alpha.umulh
    annotation,                               // llvm.annotation
    arm_get_fpscr,                            // llvm.arm.get.fpscr
    arm_neon_vabds,                           // llvm.arm.neon.vabds
    arm_neon_vabdu,                           // llvm.arm.neon.vabdu
    arm_neon_vabs,                            // llvm.arm.neon.vabs
    arm_neon_vacged,                          // llvm.arm.neon.vacged
    arm_neon_vacgeq,                          // llvm.arm.neon.vacgeq
    arm_neon_vacgtd,                          // llvm.arm.neon.vacgtd
    arm_neon_vacgtq,                          // llvm.arm.neon.vacgtq
    arm_neon_vaddhn,                          // llvm.arm.neon.vaddhn
    arm_neon_vcls,                            // llvm.arm.neon.vcls
    arm_neon_vclz,                            // llvm.arm.neon.vclz
    arm_neon_vcnt,                            // llvm.arm.neon.vcnt
    arm_neon_vcvtfp2fxs,                      // llvm.arm.neon.vcvtfp2fxs
    arm_neon_vcvtfp2fxu,                      // llvm.arm.neon.vcvtfp2fxu
    arm_neon_vcvtfxs2fp,                      // llvm.arm.neon.vcvtfxs2fp
    arm_neon_vcvtfxu2fp,                      // llvm.arm.neon.vcvtfxu2fp
    arm_neon_vhadds,                          // llvm.arm.neon.vhadds
    arm_neon_vhaddu,                          // llvm.arm.neon.vhaddu
    arm_neon_vhsubs,                          // llvm.arm.neon.vhsubs
    arm_neon_vhsubu,                          // llvm.arm.neon.vhsubu
    arm_neon_vld1,                            // llvm.arm.neon.vld1
    arm_neon_vld2,                            // llvm.arm.neon.vld2
    arm_neon_vld2lane,                        // llvm.arm.neon.vld2lane
    arm_neon_vld3,                            // llvm.arm.neon.vld3
    arm_neon_vld3lane,                        // llvm.arm.neon.vld3lane
    arm_neon_vld4,                            // llvm.arm.neon.vld4
    arm_neon_vld4lane,                        // llvm.arm.neon.vld4lane
    arm_neon_vmaxs,                           // llvm.arm.neon.vmaxs
    arm_neon_vmaxu,                           // llvm.arm.neon.vmaxu
    arm_neon_vmins,                           // llvm.arm.neon.vmins
    arm_neon_vminu,                           // llvm.arm.neon.vminu
    arm_neon_vmullp,                          // llvm.arm.neon.vmullp
    arm_neon_vmulp,                           // llvm.arm.neon.vmulp
    arm_neon_vpadals,                         // llvm.arm.neon.vpadals
    arm_neon_vpadalu,                         // llvm.arm.neon.vpadalu
    arm_neon_vpadd,                           // llvm.arm.neon.vpadd
    arm_neon_vpaddls,                         // llvm.arm.neon.vpaddls
    arm_neon_vpaddlu,                         // llvm.arm.neon.vpaddlu
    arm_neon_vpmaxs,                          // llvm.arm.neon.vpmaxs
    arm_neon_vpmaxu,                          // llvm.arm.neon.vpmaxu
    arm_neon_vpmins,                          // llvm.arm.neon.vpmins
    arm_neon_vpminu,                          // llvm.arm.neon.vpminu
    arm_neon_vqabs,                           // llvm.arm.neon.vqabs
    arm_neon_vqadds,                          // llvm.arm.neon.vqadds
    arm_neon_vqaddu,                          // llvm.arm.neon.vqaddu
    arm_neon_vqdmlal,                         // llvm.arm.neon.vqdmlal
    arm_neon_vqdmlsl,                         // llvm.arm.neon.vqdmlsl
    arm_neon_vqdmulh,                         // llvm.arm.neon.vqdmulh
    arm_neon_vqdmull,                         // llvm.arm.neon.vqdmull
    arm_neon_vqmovns,                         // llvm.arm.neon.vqmovns
    arm_neon_vqmovnsu,                        // llvm.arm.neon.vqmovnsu
    arm_neon_vqmovnu,                         // llvm.arm.neon.vqmovnu
    arm_neon_vqneg,                           // llvm.arm.neon.vqneg
    arm_neon_vqrdmulh,                        // llvm.arm.neon.vqrdmulh
    arm_neon_vqrshiftns,                      // llvm.arm.neon.vqrshiftns
    arm_neon_vqrshiftnsu,                     // llvm.arm.neon.vqrshiftnsu
    arm_neon_vqrshiftnu,                      // llvm.arm.neon.vqrshiftnu
    arm_neon_vqrshifts,                       // llvm.arm.neon.vqrshifts
    arm_neon_vqrshiftu,                       // llvm.arm.neon.vqrshiftu
    arm_neon_vqshiftns,                       // llvm.arm.neon.vqshiftns
    arm_neon_vqshiftnsu,                      // llvm.arm.neon.vqshiftnsu
    arm_neon_vqshiftnu,                       // llvm.arm.neon.vqshiftnu
    arm_neon_vqshifts,                        // llvm.arm.neon.vqshifts
    arm_neon_vqshiftsu,                       // llvm.arm.neon.vqshiftsu
    arm_neon_vqshiftu,                        // llvm.arm.neon.vqshiftu
    arm_neon_vqsubs,                          // llvm.arm.neon.vqsubs
    arm_neon_vqsubu,                          // llvm.arm.neon.vqsubu
    arm_neon_vraddhn,                         // llvm.arm.neon.vraddhn
    arm_neon_vrecpe,                          // llvm.arm.neon.vrecpe
    arm_neon_vrecps,                          // llvm.arm.neon.vrecps
    arm_neon_vrhadds,                         // llvm.arm.neon.vrhadds
    arm_neon_vrhaddu,                         // llvm.arm.neon.vrhaddu
    arm_neon_vrshiftn,                        // llvm.arm.neon.vrshiftn
    arm_neon_vrshifts,                        // llvm.arm.neon.vrshifts
    arm_neon_vrshiftu,                        // llvm.arm.neon.vrshiftu
    arm_neon_vrsqrte,                         // llvm.arm.neon.vrsqrte
    arm_neon_vrsqrts,                         // llvm.arm.neon.vrsqrts
    arm_neon_vrsubhn,                         // llvm.arm.neon.vrsubhn
    arm_neon_vshiftins,                       // llvm.arm.neon.vshiftins
    arm_neon_vshiftls,                        // llvm.arm.neon.vshiftls
    arm_neon_vshiftlu,                        // llvm.arm.neon.vshiftlu
    arm_neon_vshiftn,                         // llvm.arm.neon.vshiftn
    arm_neon_vshifts,                         // llvm.arm.neon.vshifts
    arm_neon_vshiftu,                         // llvm.arm.neon.vshiftu
    arm_neon_vst1,                            // llvm.arm.neon.vst1
    arm_neon_vst2,                            // llvm.arm.neon.vst2
    arm_neon_vst2lane,                        // llvm.arm.neon.vst2lane
    arm_neon_vst3,                            // llvm.arm.neon.vst3
    arm_neon_vst3lane,                        // llvm.arm.neon.vst3lane
    arm_neon_vst4,                            // llvm.arm.neon.vst4
    arm_neon_vst4lane,                        // llvm.arm.neon.vst4lane
    arm_neon_vsubhn,                          // llvm.arm.neon.vsubhn
    arm_neon_vtbl1,                           // llvm.arm.neon.vtbl1
    arm_neon_vtbl2,                           // llvm.arm.neon.vtbl2
    arm_neon_vtbl3,                           // llvm.arm.neon.vtbl3
    arm_neon_vtbl4,                           // llvm.arm.neon.vtbl4
    arm_neon_vtbx1,                           // llvm.arm.neon.vtbx1
    arm_neon_vtbx2,                           // llvm.arm.neon.vtbx2
    arm_neon_vtbx3,                           // llvm.arm.neon.vtbx3
    arm_neon_vtbx4,                           // llvm.arm.neon.vtbx4
    arm_qadd,                                 // llvm.arm.qadd
    arm_qsub,                                 // llvm.arm.qsub
    arm_set_fpscr,                            // llvm.arm.set.fpscr
    arm_ssat,                                 // llvm.arm.ssat
    arm_thread_pointer,                       // llvm.arm.thread.pointer
    arm_usat,                                 // llvm.arm.usat
    arm_vcvtr,                                // llvm.arm.vcvtr
    arm_vcvtru,                               // llvm.arm.vcvtru
    atomic_cmp_swap,                          // llvm.atomic.cmp.swap
    atomic_load_add,                          // llvm.atomic.load.add
    atomic_load_and,                          // llvm.atomic.load.and
    atomic_load_max,                          // llvm.atomic.load.max
    atomic_load_min,                          // llvm.atomic.load.min
    atomic_load_nand,                         // llvm.atomic.load.nand
    atomic_load_or,                           // llvm.atomic.load.or
    atomic_load_sub,                          // llvm.atomic.load.sub
    atomic_load_umax,                         // llvm.atomic.load.umax
    atomic_load_umin,                         // llvm.atomic.load.umin
    atomic_load_xor,                          // llvm.atomic.load.xor
    atomic_swap,                              // llvm.atomic.swap
    bswap,                                    // llvm.bswap
    convert_from_fp16,                        // llvm.convert.from.fp16
    convert_to_fp16,                          // llvm.convert.to.fp16
    convertff,                                // llvm.convertff
    convertfsi,                               // llvm.convertfsi
    convertfui,                               // llvm.convertfui
    convertsif,                               // llvm.convertsif
    convertss,                                // llvm.convertss
    convertsu,                                // llvm.convertsu
    convertuif,                               // llvm.convertuif
    convertus,                                // llvm.convertus
    convertuu,                                // llvm.convertuu
    cos,                                      // llvm.cos
    ctlz,                                     // llvm.ctlz
    ctpop,                                    // llvm.ctpop
    cttz,                                     // llvm.cttz
    dbg_declare,                              // llvm.dbg.declare
    dbg_value,                                // llvm.dbg.value
    eh_dwarf_cfa,                             // llvm.eh.dwarf.cfa
    eh_exception,                             // llvm.eh.exception
    eh_return_i32,                            // llvm.eh.return.i32
    eh_return_i64,                            // llvm.eh.return.i64
    eh_selector,                              // llvm.eh.selector
    eh_sjlj_callsite,                         // llvm.eh.sjlj.callsite
    eh_sjlj_longjmp,                          // llvm.eh.sjlj.longjmp
    eh_sjlj_lsda,                             // llvm.eh.sjlj.lsda
    eh_sjlj_setjmp,                           // llvm.eh.sjlj.setjmp
    eh_typeid_for,                            // llvm.eh.typeid.for
    eh_unwind_init,                           // llvm.eh.unwind.init
    exp,                                      // llvm.exp
    exp2,                                     // llvm.exp2
    flt_rounds,                               // llvm.flt.rounds
    frameaddress,                             // llvm.frameaddress
    gcread,                                   // llvm.gcread
    gcroot,                                   // llvm.gcroot
    gcwrite,                                  // llvm.gcwrite
    init_trampoline,                          // llvm.init.trampoline
    invariant_end,                            // llvm.invariant.end
    invariant_start,                          // llvm.invariant.start
    lifetime_end,                             // llvm.lifetime.end
    lifetime_start,                           // llvm.lifetime.start
    log,                                      // llvm.log
    log10,                                    // llvm.log10
    log2,                                     // llvm.log2
    longjmp,                                  // llvm.longjmp
    memcpy,                                   // llvm.memcpy
    memmove,                                  // llvm.memmove
    memory_barrier,                           // llvm.memory.barrier
    memset,                                   // llvm.memset
    objectsize,                               // llvm.objectsize
    pcmarker,                                 // llvm.pcmarker
    pow,                                      // llvm.pow
    powi,                                     // llvm.powi
    ppc_altivec_dss,                          // llvm.ppc.altivec.dss
    ppc_altivec_dssall,                       // llvm.ppc.altivec.dssall
    ppc_altivec_dst,                          // llvm.ppc.altivec.dst
    ppc_altivec_dstst,                        // llvm.ppc.altivec.dstst
    ppc_altivec_dststt,                       // llvm.ppc.altivec.dststt
    ppc_altivec_dstt,                         // llvm.ppc.altivec.dstt
    ppc_altivec_lvebx,                        // llvm.ppc.altivec.lvebx
    ppc_altivec_lvehx,                        // llvm.ppc.altivec.lvehx
    ppc_altivec_lvewx,                        // llvm.ppc.altivec.lvewx
    ppc_altivec_lvsl,                         // llvm.ppc.altivec.lvsl
    ppc_altivec_lvsr,                         // llvm.ppc.altivec.lvsr
    ppc_altivec_lvx,                          // llvm.ppc.altivec.lvx
    ppc_altivec_lvxl,                         // llvm.ppc.altivec.lvxl
    ppc_altivec_mfvscr,                       // llvm.ppc.altivec.mfvscr
    ppc_altivec_mtvscr,                       // llvm.ppc.altivec.mtvscr
    ppc_altivec_stvebx,                       // llvm.ppc.altivec.stvebx
    ppc_altivec_stvehx,                       // llvm.ppc.altivec.stvehx
    ppc_altivec_stvewx,                       // llvm.ppc.altivec.stvewx
    ppc_altivec_stvx,                         // llvm.ppc.altivec.stvx
    ppc_altivec_stvxl,                        // llvm.ppc.altivec.stvxl
    ppc_altivec_vaddcuw,                      // llvm.ppc.altivec.vaddcuw
    ppc_altivec_vaddsbs,                      // llvm.ppc.altivec.vaddsbs
    ppc_altivec_vaddshs,                      // llvm.ppc.altivec.vaddshs
    ppc_altivec_vaddsws,                      // llvm.ppc.altivec.vaddsws
    ppc_altivec_vaddubs,                      // llvm.ppc.altivec.vaddubs
    ppc_altivec_vadduhs,                      // llvm.ppc.altivec.vadduhs
    ppc_altivec_vadduws,                      // llvm.ppc.altivec.vadduws
    ppc_altivec_vavgsb,                       // llvm.ppc.altivec.vavgsb
    ppc_altivec_vavgsh,                       // llvm.ppc.altivec.vavgsh
    ppc_altivec_vavgsw,                       // llvm.ppc.altivec.vavgsw
    ppc_altivec_vavgub,                       // llvm.ppc.altivec.vavgub
    ppc_altivec_vavguh,                       // llvm.ppc.altivec.vavguh
    ppc_altivec_vavguw,                       // llvm.ppc.altivec.vavguw
    ppc_altivec_vcfsx,                        // llvm.ppc.altivec.vcfsx
    ppc_altivec_vcfux,                        // llvm.ppc.altivec.vcfux
    ppc_altivec_vcmpbfp,                      // llvm.ppc.altivec.vcmpbfp
    ppc_altivec_vcmpbfp_p,                    // llvm.ppc.altivec.vcmpbfp.p
    ppc_altivec_vcmpeqfp,                     // llvm.ppc.altivec.vcmpeqfp
    ppc_altivec_vcmpeqfp_p,                   // llvm.ppc.altivec.vcmpeqfp.p
    ppc_altivec_vcmpequb,                     // llvm.ppc.altivec.vcmpequb
    ppc_altivec_vcmpequb_p,                   // llvm.ppc.altivec.vcmpequb.p
    ppc_altivec_vcmpequh,                     // llvm.ppc.altivec.vcmpequh
    ppc_altivec_vcmpequh_p,                   // llvm.ppc.altivec.vcmpequh.p
    ppc_altivec_vcmpequw,                     // llvm.ppc.altivec.vcmpequw
    ppc_altivec_vcmpequw_p,                   // llvm.ppc.altivec.vcmpequw.p
    ppc_altivec_vcmpgefp,                     // llvm.ppc.altivec.vcmpgefp
    ppc_altivec_vcmpgefp_p,                   // llvm.ppc.altivec.vcmpgefp.p
    ppc_altivec_vcmpgtfp,                     // llvm.ppc.altivec.vcmpgtfp
    ppc_altivec_vcmpgtfp_p,                   // llvm.ppc.altivec.vcmpgtfp.p
    ppc_altivec_vcmpgtsb,                     // llvm.ppc.altivec.vcmpgtsb
    ppc_altivec_vcmpgtsb_p,                   // llvm.ppc.altivec.vcmpgtsb.p
    ppc_altivec_vcmpgtsh,                     // llvm.ppc.altivec.vcmpgtsh
    ppc_altivec_vcmpgtsh_p,                   // llvm.ppc.altivec.vcmpgtsh.p
    ppc_altivec_vcmpgtsw,                     // llvm.ppc.altivec.vcmpgtsw
    ppc_altivec_vcmpgtsw_p,                   // llvm.ppc.altivec.vcmpgtsw.p
    ppc_altivec_vcmpgtub,                     // llvm.ppc.altivec.vcmpgtub
    ppc_altivec_vcmpgtub_p,                   // llvm.ppc.altivec.vcmpgtub.p
    ppc_altivec_vcmpgtuh,                     // llvm.ppc.altivec.vcmpgtuh
    ppc_altivec_vcmpgtuh_p,                   // llvm.ppc.altivec.vcmpgtuh.p
    ppc_altivec_vcmpgtuw,                     // llvm.ppc.altivec.vcmpgtuw
    ppc_altivec_vcmpgtuw_p,                   // llvm.ppc.altivec.vcmpgtuw.p
    ppc_altivec_vctsxs,                       // llvm.ppc.altivec.vctsxs
    ppc_altivec_vctuxs,                       // llvm.ppc.altivec.vctuxs
    ppc_altivec_vexptefp,                     // llvm.ppc.altivec.vexptefp
    ppc_altivec_vlogefp,                      // llvm.ppc.altivec.vlogefp
    ppc_altivec_vmaddfp,                      // llvm.ppc.altivec.vmaddfp
    ppc_altivec_vmaxfp,                       // llvm.ppc.altivec.vmaxfp
    ppc_altivec_vmaxsb,                       // llvm.ppc.altivec.vmaxsb
    ppc_altivec_vmaxsh,                       // llvm.ppc.altivec.vmaxsh
    ppc_altivec_vmaxsw,                       // llvm.ppc.altivec.vmaxsw
    ppc_altivec_vmaxub,                       // llvm.ppc.altivec.vmaxub
    ppc_altivec_vmaxuh,                       // llvm.ppc.altivec.vmaxuh
    ppc_altivec_vmaxuw,                       // llvm.ppc.altivec.vmaxuw
    ppc_altivec_vmhaddshs,                    // llvm.ppc.altivec.vmhaddshs
    ppc_altivec_vmhraddshs,                   // llvm.ppc.altivec.vmhraddshs
    ppc_altivec_vminfp,                       // llvm.ppc.altivec.vminfp
    ppc_altivec_vminsb,                       // llvm.ppc.altivec.vminsb
    ppc_altivec_vminsh,                       // llvm.ppc.altivec.vminsh
    ppc_altivec_vminsw,                       // llvm.ppc.altivec.vminsw
    ppc_altivec_vminub,                       // llvm.ppc.altivec.vminub
    ppc_altivec_vminuh,                       // llvm.ppc.altivec.vminuh
    ppc_altivec_vminuw,                       // llvm.ppc.altivec.vminuw
    ppc_altivec_vmladduhm,                    // llvm.ppc.altivec.vmladduhm
    ppc_altivec_vmsummbm,                     // llvm.ppc.altivec.vmsummbm
    ppc_altivec_vmsumshm,                     // llvm.ppc.altivec.vmsumshm
    ppc_altivec_vmsumshs,                     // llvm.ppc.altivec.vmsumshs
    ppc_altivec_vmsumubm,                     // llvm.ppc.altivec.vmsumubm
    ppc_altivec_vmsumuhm,                     // llvm.ppc.altivec.vmsumuhm
    ppc_altivec_vmsumuhs,                     // llvm.ppc.altivec.vmsumuhs
    ppc_altivec_vmulesb,                      // llvm.ppc.altivec.vmulesb
    ppc_altivec_vmulesh,                      // llvm.ppc.altivec.vmulesh
    ppc_altivec_vmuleub,                      // llvm.ppc.altivec.vmuleub
    ppc_altivec_vmuleuh,                      // llvm.ppc.altivec.vmuleuh
    ppc_altivec_vmulosb,                      // llvm.ppc.altivec.vmulosb
    ppc_altivec_vmulosh,                      // llvm.ppc.altivec.vmulosh
    ppc_altivec_vmuloub,                      // llvm.ppc.altivec.vmuloub
    ppc_altivec_vmulouh,                      // llvm.ppc.altivec.vmulouh
    ppc_altivec_vnmsubfp,                     // llvm.ppc.altivec.vnmsubfp
    ppc_altivec_vperm,                        // llvm.ppc.altivec.vperm
    ppc_altivec_vpkpx,                        // llvm.ppc.altivec.vpkpx
    ppc_altivec_vpkshss,                      // llvm.ppc.altivec.vpkshss
    ppc_altivec_vpkshus,                      // llvm.ppc.altivec.vpkshus
    ppc_altivec_vpkswss,                      // llvm.ppc.altivec.vpkswss
    ppc_altivec_vpkswus,                      // llvm.ppc.altivec.vpkswus
    ppc_altivec_vpkuhus,                      // llvm.ppc.altivec.vpkuhus
    ppc_altivec_vpkuwus,                      // llvm.ppc.altivec.vpkuwus
    ppc_altivec_vrefp,                        // llvm.ppc.altivec.vrefp
    ppc_altivec_vrfim,                        // llvm.ppc.altivec.vrfim
    ppc_altivec_vrfin,                        // llvm.ppc.altivec.vrfin
    ppc_altivec_vrfip,                        // llvm.ppc.altivec.vrfip
    ppc_altivec_vrfiz,                        // llvm.ppc.altivec.vrfiz
    ppc_altivec_vrlb,                         // llvm.ppc.altivec.vrlb
    ppc_altivec_vrlh,                         // llvm.ppc.altivec.vrlh
    ppc_altivec_vrlw,                         // llvm.ppc.altivec.vrlw
    ppc_altivec_vrsqrtefp,                    // llvm.ppc.altivec.vrsqrtefp
    ppc_altivec_vsel,                         // llvm.ppc.altivec.vsel
    ppc_altivec_vsl,                          // llvm.ppc.altivec.vsl
    ppc_altivec_vslb,                         // llvm.ppc.altivec.vslb
    ppc_altivec_vslh,                         // llvm.ppc.altivec.vslh
    ppc_altivec_vslo,                         // llvm.ppc.altivec.vslo
    ppc_altivec_vslw,                         // llvm.ppc.altivec.vslw
    ppc_altivec_vsr,                          // llvm.ppc.altivec.vsr
    ppc_altivec_vsrab,                        // llvm.ppc.altivec.vsrab
    ppc_altivec_vsrah,                        // llvm.ppc.altivec.vsrah
    ppc_altivec_vsraw,                        // llvm.ppc.altivec.vsraw
    ppc_altivec_vsrb,                         // llvm.ppc.altivec.vsrb
    ppc_altivec_vsrh,                         // llvm.ppc.altivec.vsrh
    ppc_altivec_vsro,                         // llvm.ppc.altivec.vsro
    ppc_altivec_vsrw,                         // llvm.ppc.altivec.vsrw
    ppc_altivec_vsubcuw,                      // llvm.ppc.altivec.vsubcuw
    ppc_altivec_vsubsbs,                      // llvm.ppc.altivec.vsubsbs
    ppc_altivec_vsubshs,                      // llvm.ppc.altivec.vsubshs
    ppc_altivec_vsubsws,                      // llvm.ppc.altivec.vsubsws
    ppc_altivec_vsububs,                      // llvm.ppc.altivec.vsububs
    ppc_altivec_vsubuhs,                      // llvm.ppc.altivec.vsubuhs
    ppc_altivec_vsubuws,                      // llvm.ppc.altivec.vsubuws
    ppc_altivec_vsum2sws,                     // llvm.ppc.altivec.vsum2sws
    ppc_altivec_vsum4sbs,                     // llvm.ppc.altivec.vsum4sbs
    ppc_altivec_vsum4shs,                     // llvm.ppc.altivec.vsum4shs
    ppc_altivec_vsum4ubs,                     // llvm.ppc.altivec.vsum4ubs
    ppc_altivec_vsumsws,                      // llvm.ppc.altivec.vsumsws
    ppc_altivec_vupkhpx,                      // llvm.ppc.altivec.vupkhpx
    ppc_altivec_vupkhsb,                      // llvm.ppc.altivec.vupkhsb
    ppc_altivec_vupkhsh,                      // llvm.ppc.altivec.vupkhsh
    ppc_altivec_vupklpx,                      // llvm.ppc.altivec.vupklpx
    ppc_altivec_vupklsb,                      // llvm.ppc.altivec.vupklsb
    ppc_altivec_vupklsh,                      // llvm.ppc.altivec.vupklsh
    ppc_dcba,                                 // llvm.ppc.dcba
    ppc_dcbf,                                 // llvm.ppc.dcbf
    ppc_dcbi,                                 // llvm.ppc.dcbi
    ppc_dcbst,                                // llvm.ppc.dcbst
    ppc_dcbt,                                 // llvm.ppc.dcbt
    ppc_dcbtst,                               // llvm.ppc.dcbtst
    ppc_dcbz,                                 // llvm.ppc.dcbz
    ppc_dcbzl,                                // llvm.ppc.dcbzl
    ppc_sync,                                 // llvm.ppc.sync
    prefetch,                                 // llvm.prefetch
    ptr_annotation,                           // llvm.ptr.annotation
    readcyclecounter,                         // llvm.readcyclecounter
    returnaddress,                            // llvm.returnaddress
    sadd_with_overflow,                       // llvm.sadd.with.overflow
    setjmp,                                   // llvm.setjmp
    siglongjmp,                               // llvm.siglongjmp
    sigsetjmp,                                // llvm.sigsetjmp
    sin,                                      // llvm.sin
    smul_with_overflow,                       // llvm.smul.with.overflow
    spu_si_a,                                 // llvm.spu.si.a
    spu_si_addx,                              // llvm.spu.si.addx
    spu_si_ah,                                // llvm.spu.si.ah
    spu_si_ahi,                               // llvm.spu.si.ahi
    spu_si_ai,                                // llvm.spu.si.ai
    spu_si_and,                               // llvm.spu.si.and
    spu_si_andbi,                             // llvm.spu.si.andbi
    spu_si_andc,                              // llvm.spu.si.andc
    spu_si_andhi,                             // llvm.spu.si.andhi
    spu_si_andi,                              // llvm.spu.si.andi
    spu_si_bg,                                // llvm.spu.si.bg
    spu_si_bgx,                               // llvm.spu.si.bgx
    spu_si_ceq,                               // llvm.spu.si.ceq
    spu_si_ceqb,                              // llvm.spu.si.ceqb
    spu_si_ceqbi,                             // llvm.spu.si.ceqbi
    spu_si_ceqh,                              // llvm.spu.si.ceqh
    spu_si_ceqhi,                             // llvm.spu.si.ceqhi
    spu_si_ceqi,                              // llvm.spu.si.ceqi
    spu_si_cg,                                // llvm.spu.si.cg
    spu_si_cgt,                               // llvm.spu.si.cgt
    spu_si_cgtb,                              // llvm.spu.si.cgtb
    spu_si_cgtbi,                             // llvm.spu.si.cgtbi
    spu_si_cgth,                              // llvm.spu.si.cgth
    spu_si_cgthi,                             // llvm.spu.si.cgthi
    spu_si_cgti,                              // llvm.spu.si.cgti
    spu_si_cgx,                               // llvm.spu.si.cgx
    spu_si_clgt,                              // llvm.spu.si.clgt
    spu_si_clgtb,                             // llvm.spu.si.clgtb
    spu_si_clgtbi,                            // llvm.spu.si.clgtbi
    spu_si_clgth,                             // llvm.spu.si.clgth
    spu_si_clgthi,                            // llvm.spu.si.clgthi
    spu_si_clgti,                             // llvm.spu.si.clgti
    spu_si_dfa,                               // llvm.spu.si.dfa
    spu_si_dfm,                               // llvm.spu.si.dfm
    spu_si_dfma,                              // llvm.spu.si.dfma
    spu_si_dfms,                              // llvm.spu.si.dfms
    spu_si_dfnma,                             // llvm.spu.si.dfnma
    spu_si_dfnms,                             // llvm.spu.si.dfnms
    spu_si_dfs,                               // llvm.spu.si.dfs
    spu_si_fa,                                // llvm.spu.si.fa
    spu_si_fceq,                              // llvm.spu.si.fceq
    spu_si_fcgt,                              // llvm.spu.si.fcgt
    spu_si_fcmeq,                             // llvm.spu.si.fcmeq
    spu_si_fcmgt,                             // llvm.spu.si.fcmgt
    spu_si_fm,                                // llvm.spu.si.fm
    spu_si_fma,                               // llvm.spu.si.fma
    spu_si_fms,                               // llvm.spu.si.fms
    spu_si_fnms,                              // llvm.spu.si.fnms
    spu_si_fs,                                // llvm.spu.si.fs
    spu_si_fsmbi,                             // llvm.spu.si.fsmbi
    spu_si_mpy,                               // llvm.spu.si.mpy
    spu_si_mpya,                              // llvm.spu.si.mpya
    spu_si_mpyh,                              // llvm.spu.si.mpyh
    spu_si_mpyhh,                             // llvm.spu.si.mpyhh
    spu_si_mpyhha,                            // llvm.spu.si.mpyhha
    spu_si_mpyhhau,                           // llvm.spu.si.mpyhhau
    spu_si_mpyhhu,                            // llvm.spu.si.mpyhhu
    spu_si_mpyi,                              // llvm.spu.si.mpyi
    spu_si_mpys,                              // llvm.spu.si.mpys
    spu_si_mpyu,                              // llvm.spu.si.mpyu
    spu_si_mpyui,                             // llvm.spu.si.mpyui
    spu_si_nand,                              // llvm.spu.si.nand
    spu_si_nor,                               // llvm.spu.si.nor
    spu_si_or,                                // llvm.spu.si.or
    spu_si_orbi,                              // llvm.spu.si.orbi
    spu_si_orc,                               // llvm.spu.si.orc
    spu_si_orhi,                              // llvm.spu.si.orhi
    spu_si_ori,                               // llvm.spu.si.ori
    spu_si_sf,                                // llvm.spu.si.sf
    spu_si_sfh,                               // llvm.spu.si.sfh
    spu_si_sfhi,                              // llvm.spu.si.sfhi
    spu_si_sfi,                               // llvm.spu.si.sfi
    spu_si_sfx,                               // llvm.spu.si.sfx
    spu_si_shli,                              // llvm.spu.si.shli
    spu_si_shlqbi,                            // llvm.spu.si.shlqbi
    spu_si_shlqbii,                           // llvm.spu.si.shlqbii
    spu_si_shlqby,                            // llvm.spu.si.shlqby
    spu_si_shlqbyi,                           // llvm.spu.si.shlqbyi
    spu_si_xor,                               // llvm.spu.si.xor
    spu_si_xorbi,                             // llvm.spu.si.xorbi
    spu_si_xorhi,                             // llvm.spu.si.xorhi
    spu_si_xori,                              // llvm.spu.si.xori
    sqrt,                                     // llvm.sqrt
    ssub_with_overflow,                       // llvm.ssub.with.overflow
    stackprotector,                           // llvm.stackprotector
    stackrestore,                             // llvm.stackrestore
    stacksave,                                // llvm.stacksave
    trap,                                     // llvm.trap
    uadd_with_overflow,                       // llvm.uadd.with.overflow
    umul_with_overflow,                       // llvm.umul.with.overflow
    usub_with_overflow,                       // llvm.usub.with.overflow
    vacopy,                                   // llvm.va_copy
    vaend,                                    // llvm.va_end
    var_annotation,                           // llvm.var.annotation
    vastart,                                  // llvm.va_start
    x86_aesni_aesdec,                         // llvm.x86.aesni.aesdec
    x86_aesni_aesdeclast,                     // llvm.x86.aesni.aesdeclast
    x86_aesni_aesenc,                         // llvm.x86.aesni.aesenc
    x86_aesni_aesenclast,                     // llvm.x86.aesni.aesenclast
    x86_aesni_aesimc,                         // llvm.x86.aesni.aesimc
    x86_aesni_aeskeygenassist,                // llvm.x86.aesni.aeskeygenassist
    x86_avx_addsub_pd_256,                    // llvm.x86.avx.addsub.pd.256
    x86_avx_addsub_ps_256,                    // llvm.x86.avx.addsub.ps.256
    x86_avx_blend_pd_256,                     // llvm.x86.avx.blend.pd.256
    x86_avx_blend_ps_256,                     // llvm.x86.avx.blend.ps.256
    x86_avx_blendv_pd_256,                    // llvm.x86.avx.blendv.pd.256
    x86_avx_blendv_ps_256,                    // llvm.x86.avx.blendv.ps.256
    x86_avx_cmp_pd_256,                       // llvm.x86.avx.cmp.pd.256
    x86_avx_cmp_ps_256,                       // llvm.x86.avx.cmp.ps.256
    x86_avx_cvt_pd2_ps_256,                   // llvm.x86.avx.cvt.pd2.ps.256
    x86_avx_cvt_pd2dq_256,                    // llvm.x86.avx.cvt.pd2dq.256
    x86_avx_cvt_ps2_pd_256,                   // llvm.x86.avx.cvt.ps2.pd.256
    x86_avx_cvt_ps2dq_256,                    // llvm.x86.avx.cvt.ps2dq.256
    x86_avx_cvtdq2_pd_256,                    // llvm.x86.avx.cvtdq2.pd.256
    x86_avx_cvtdq2_ps_256,                    // llvm.x86.avx.cvtdq2.ps.256
    x86_avx_cvtt_pd2dq_256,                   // llvm.x86.avx.cvtt.pd2dq.256
    x86_avx_cvtt_ps2dq_256,                   // llvm.x86.avx.cvtt.ps2dq.256
    x86_avx_dp_ps_256,                        // llvm.x86.avx.dp.ps.256
    x86_avx_hadd_pd_256,                      // llvm.x86.avx.hadd.pd.256
    x86_avx_hadd_ps_256,                      // llvm.x86.avx.hadd.ps.256
    x86_avx_hsub_pd_256,                      // llvm.x86.avx.hsub.pd.256
    x86_avx_hsub_ps_256,                      // llvm.x86.avx.hsub.ps.256
    x86_avx_ldu_dq_256,                       // llvm.x86.avx.ldu.dq.256
    x86_avx_loadu_dq_256,                     // llvm.x86.avx.loadu.dq.256
    x86_avx_loadu_pd_256,                     // llvm.x86.avx.loadu.pd.256
    x86_avx_loadu_ps_256,                     // llvm.x86.avx.loadu.ps.256
    x86_avx_maskload_pd,                      // llvm.x86.avx.maskload.pd
    x86_avx_maskload_pd_256,                  // llvm.x86.avx.maskload.pd.256
    x86_avx_maskload_ps,                      // llvm.x86.avx.maskload.ps
    x86_avx_maskload_ps_256,                  // llvm.x86.avx.maskload.ps.256
    x86_avx_maskstore_pd,                     // llvm.x86.avx.maskstore.pd
    x86_avx_maskstore_pd_256,                 // llvm.x86.avx.maskstore.pd.256
    x86_avx_maskstore_ps,                     // llvm.x86.avx.maskstore.ps
    x86_avx_maskstore_ps_256,                 // llvm.x86.avx.maskstore.ps.256
    x86_avx_max_pd_256,                       // llvm.x86.avx.max.pd.256
    x86_avx_max_ps_256,                       // llvm.x86.avx.max.ps.256
    x86_avx_min_pd_256,                       // llvm.x86.avx.min.pd.256
    x86_avx_min_ps_256,                       // llvm.x86.avx.min.ps.256
    x86_avx_movmsk_pd_256,                    // llvm.x86.avx.movmsk.pd.256
    x86_avx_movmsk_ps_256,                    // llvm.x86.avx.movmsk.ps.256
    x86_avx_movnt_dq_256,                     // llvm.x86.avx.movnt.dq.256
    x86_avx_movnt_pd_256,                     // llvm.x86.avx.movnt.pd.256
    x86_avx_movnt_ps_256,                     // llvm.x86.avx.movnt.ps.256
    x86_avx_ptestc_256,                       // llvm.x86.avx.ptestc.256
    x86_avx_ptestnzc_256,                     // llvm.x86.avx.ptestnzc.256
    x86_avx_ptestz_256,                       // llvm.x86.avx.ptestz.256
    x86_avx_rcp_ps_256,                       // llvm.x86.avx.rcp.ps.256
    x86_avx_round_pd_256,                     // llvm.x86.avx.round.pd.256
    x86_avx_round_ps_256,                     // llvm.x86.avx.round.ps.256
    x86_avx_rsqrt_ps_256,                     // llvm.x86.avx.rsqrt.ps.256
    x86_avx_sqrt_pd_256,                      // llvm.x86.avx.sqrt.pd.256
    x86_avx_sqrt_ps_256,                      // llvm.x86.avx.sqrt.ps.256
    x86_avx_storeu_dq_256,                    // llvm.x86.avx.storeu.dq.256
    x86_avx_storeu_pd_256,                    // llvm.x86.avx.storeu.pd.256
    x86_avx_storeu_ps_256,                    // llvm.x86.avx.storeu.ps.256
    x86_avx_vbroadcast_sd_256,                // llvm.x86.avx.vbroadcast.sd.256
    x86_avx_vbroadcastf128_pd_256,            // llvm.x86.avx.vbroadcastf128.pd.256
    x86_avx_vbroadcastf128_ps_256,            // llvm.x86.avx.vbroadcastf128.ps.256
    x86_avx_vbroadcastss,                     // llvm.x86.avx.vbroadcastss
    x86_avx_vbroadcastss_256,                 // llvm.x86.avx.vbroadcastss.256
    x86_avx_vextractf128_pd_256,              // llvm.x86.avx.vextractf128.pd.256
    x86_avx_vextractf128_ps_256,              // llvm.x86.avx.vextractf128.ps.256
    x86_avx_vextractf128_si_256,              // llvm.x86.avx.vextractf128.si.256
    x86_avx_vinsertf128_pd_256,               // llvm.x86.avx.vinsertf128.pd.256
    x86_avx_vinsertf128_ps_256,               // llvm.x86.avx.vinsertf128.ps.256
    x86_avx_vinsertf128_si_256,               // llvm.x86.avx.vinsertf128.si.256
    x86_avx_vperm2f128_pd_256,                // llvm.x86.avx.vperm2f128.pd.256
    x86_avx_vperm2f128_ps_256,                // llvm.x86.avx.vperm2f128.ps.256
    x86_avx_vperm2f128_si_256,                // llvm.x86.avx.vperm2f128.si.256
    x86_avx_vpermil_pd,                       // llvm.x86.avx.vpermil.pd
    x86_avx_vpermil_pd_256,                   // llvm.x86.avx.vpermil.pd.256
    x86_avx_vpermil_ps,                       // llvm.x86.avx.vpermil.ps
    x86_avx_vpermil_ps_256,                   // llvm.x86.avx.vpermil.ps.256
    x86_avx_vpermilvar_pd,                    // llvm.x86.avx.vpermilvar.pd
    x86_avx_vpermilvar_pd_256,                // llvm.x86.avx.vpermilvar.pd.256
    x86_avx_vpermilvar_ps,                    // llvm.x86.avx.vpermilvar.ps
    x86_avx_vpermilvar_ps_256,                // llvm.x86.avx.vpermilvar.ps.256
    x86_avx_vtestc_pd,                        // llvm.x86.avx.vtestc.pd
    x86_avx_vtestc_pd_256,                    // llvm.x86.avx.vtestc.pd.256
    x86_avx_vtestc_ps,                        // llvm.x86.avx.vtestc.ps
    x86_avx_vtestc_ps_256,                    // llvm.x86.avx.vtestc.ps.256
    x86_avx_vtestnzc_pd,                      // llvm.x86.avx.vtestnzc.pd
    x86_avx_vtestnzc_pd_256,                  // llvm.x86.avx.vtestnzc.pd.256
    x86_avx_vtestnzc_ps,                      // llvm.x86.avx.vtestnzc.ps
    x86_avx_vtestnzc_ps_256,                  // llvm.x86.avx.vtestnzc.ps.256
    x86_avx_vtestz_pd,                        // llvm.x86.avx.vtestz.pd
    x86_avx_vtestz_pd_256,                    // llvm.x86.avx.vtestz.pd.256
    x86_avx_vtestz_ps,                        // llvm.x86.avx.vtestz.ps
    x86_avx_vtestz_ps_256,                    // llvm.x86.avx.vtestz.ps.256
    x86_avx_vzeroall,                         // llvm.x86.avx.vzeroall
    x86_avx_vzeroupper,                       // llvm.x86.avx.vzeroupper
    x86_int,                                  // llvm.x86.int
    x86_mmx_cvtsi32_si64,                     // llvm.x86.mmx.cvtsi32.si64
    x86_mmx_cvtsi64_si32,                     // llvm.x86.mmx.cvtsi64.si32
    x86_mmx_emms,                             // llvm.x86.mmx.emms
    x86_mmx_femms,                            // llvm.x86.mmx.femms
    x86_mmx_maskmovq,                         // llvm.x86.mmx.maskmovq
    x86_mmx_movnt_dq,                         // llvm.x86.mmx.movnt.dq
    x86_mmx_packssdw,                         // llvm.x86.mmx.packssdw
    x86_mmx_packsswb,                         // llvm.x86.mmx.packsswb
    x86_mmx_packuswb,                         // llvm.x86.mmx.packuswb
    x86_mmx_padd_b,                           // llvm.x86.mmx.padd.b
    x86_mmx_padd_d,                           // llvm.x86.mmx.padd.d
    x86_mmx_padd_q,                           // llvm.x86.mmx.padd.q
    x86_mmx_padd_w,                           // llvm.x86.mmx.padd.w
    x86_mmx_padds_b,                          // llvm.x86.mmx.padds.b
    x86_mmx_padds_w,                          // llvm.x86.mmx.padds.w
    x86_mmx_paddus_b,                         // llvm.x86.mmx.paddus.b
    x86_mmx_paddus_w,                         // llvm.x86.mmx.paddus.w
    x86_mmx_pand,                             // llvm.x86.mmx.pand
    x86_mmx_pandn,                            // llvm.x86.mmx.pandn
    x86_mmx_pavg_b,                           // llvm.x86.mmx.pavg.b
    x86_mmx_pavg_w,                           // llvm.x86.mmx.pavg.w
    x86_mmx_pcmpeq_b,                         // llvm.x86.mmx.pcmpeq.b
    x86_mmx_pcmpeq_d,                         // llvm.x86.mmx.pcmpeq.d
    x86_mmx_pcmpeq_w,                         // llvm.x86.mmx.pcmpeq.w
    x86_mmx_pcmpgt_b,                         // llvm.x86.mmx.pcmpgt.b
    x86_mmx_pcmpgt_d,                         // llvm.x86.mmx.pcmpgt.d
    x86_mmx_pcmpgt_w,                         // llvm.x86.mmx.pcmpgt.w
    x86_mmx_pextr_w,                          // llvm.x86.mmx.pextr.w
    x86_mmx_pinsr_w,                          // llvm.x86.mmx.pinsr.w
    x86_mmx_pmadd_wd,                         // llvm.x86.mmx.pmadd.wd
    x86_mmx_pmaxs_w,                          // llvm.x86.mmx.pmaxs.w
    x86_mmx_pmaxu_b,                          // llvm.x86.mmx.pmaxu.b
    x86_mmx_pmins_w,                          // llvm.x86.mmx.pmins.w
    x86_mmx_pminu_b,                          // llvm.x86.mmx.pminu.b
    x86_mmx_pmovmskb,                         // llvm.x86.mmx.pmovmskb
    x86_mmx_pmulh_w,                          // llvm.x86.mmx.pmulh.w
    x86_mmx_pmulhu_w,                         // llvm.x86.mmx.pmulhu.w
    x86_mmx_pmull_w,                          // llvm.x86.mmx.pmull.w
    x86_mmx_pmulu_dq,                         // llvm.x86.mmx.pmulu.dq
    x86_mmx_por,                              // llvm.x86.mmx.por
    x86_mmx_psad_bw,                          // llvm.x86.mmx.psad.bw
    x86_mmx_psll_d,                           // llvm.x86.mmx.psll.d
    x86_mmx_psll_q,                           // llvm.x86.mmx.psll.q
    x86_mmx_psll_w,                           // llvm.x86.mmx.psll.w
    x86_mmx_pslli_d,                          // llvm.x86.mmx.pslli.d
    x86_mmx_pslli_q,                          // llvm.x86.mmx.pslli.q
    x86_mmx_pslli_w,                          // llvm.x86.mmx.pslli.w
    x86_mmx_psra_d,                           // llvm.x86.mmx.psra.d
    x86_mmx_psra_w,                           // llvm.x86.mmx.psra.w
    x86_mmx_psrai_d,                          // llvm.x86.mmx.psrai.d
    x86_mmx_psrai_w,                          // llvm.x86.mmx.psrai.w
    x86_mmx_psrl_d,                           // llvm.x86.mmx.psrl.d
    x86_mmx_psrl_q,                           // llvm.x86.mmx.psrl.q
    x86_mmx_psrl_w,                           // llvm.x86.mmx.psrl.w
    x86_mmx_psrli_d,                          // llvm.x86.mmx.psrli.d
    x86_mmx_psrli_q,                          // llvm.x86.mmx.psrli.q
    x86_mmx_psrli_w,                          // llvm.x86.mmx.psrli.w
    x86_mmx_psub_b,                           // llvm.x86.mmx.psub.b
    x86_mmx_psub_d,                           // llvm.x86.mmx.psub.d
    x86_mmx_psub_q,                           // llvm.x86.mmx.psub.q
    x86_mmx_psub_w,                           // llvm.x86.mmx.psub.w
    x86_mmx_psubs_b,                          // llvm.x86.mmx.psubs.b
    x86_mmx_psubs_w,                          // llvm.x86.mmx.psubs.w
    x86_mmx_psubus_b,                         // llvm.x86.mmx.psubus.b
    x86_mmx_psubus_w,                         // llvm.x86.mmx.psubus.w
    x86_mmx_punpckhbw,                        // llvm.x86.mmx.punpckhbw
    x86_mmx_punpckhdq,                        // llvm.x86.mmx.punpckhdq
    x86_mmx_punpckhwd,                        // llvm.x86.mmx.punpckhwd
    x86_mmx_punpcklbw,                        // llvm.x86.mmx.punpcklbw
    x86_mmx_punpckldq,                        // llvm.x86.mmx.punpckldq
    x86_mmx_punpcklwd,                        // llvm.x86.mmx.punpcklwd
    x86_mmx_pxor,                             // llvm.x86.mmx.pxor
    x86_mmx_vec_ext_d,                        // llvm.x86.mmx.vec.ext.d
    x86_mmx_vec_init_b,                       // llvm.x86.mmx.vec.init.b
    x86_mmx_vec_init_d,                       // llvm.x86.mmx.vec.init.d
    x86_mmx_vec_init_w,                       // llvm.x86.mmx.vec.init.w
    x86_sse2_add_sd,                          // llvm.x86.sse2.add.sd
    x86_sse2_clflush,                         // llvm.x86.sse2.clflush
    x86_sse2_cmp_pd,                          // llvm.x86.sse2.cmp.pd
    x86_sse2_cmp_sd,                          // llvm.x86.sse2.cmp.sd
    x86_sse2_comieq_sd,                       // llvm.x86.sse2.comieq.sd
    x86_sse2_comige_sd,                       // llvm.x86.sse2.comige.sd
    x86_sse2_comigt_sd,                       // llvm.x86.sse2.comigt.sd
    x86_sse2_comile_sd,                       // llvm.x86.sse2.comile.sd
    x86_sse2_comilt_sd,                       // llvm.x86.sse2.comilt.sd
    x86_sse2_comineq_sd,                      // llvm.x86.sse2.comineq.sd
    x86_sse2_cvtdq2pd,                        // llvm.x86.sse2.cvtdq2pd
    x86_sse2_cvtdq2ps,                        // llvm.x86.sse2.cvtdq2ps
    x86_sse2_cvtpd2dq,                        // llvm.x86.sse2.cvtpd2dq
    x86_sse2_cvtpd2ps,                        // llvm.x86.sse2.cvtpd2ps
    x86_sse2_cvtps2dq,                        // llvm.x86.sse2.cvtps2dq
    x86_sse2_cvtps2pd,                        // llvm.x86.sse2.cvtps2pd
    x86_sse2_cvtsd2si,                        // llvm.x86.sse2.cvtsd2si
    x86_sse2_cvtsd2si64,                      // llvm.x86.sse2.cvtsd2si64
    x86_sse2_cvtsd2ss,                        // llvm.x86.sse2.cvtsd2ss
    x86_sse2_cvtsi2sd,                        // llvm.x86.sse2.cvtsi2sd
    x86_sse2_cvtsi642sd,                      // llvm.x86.sse2.cvtsi642sd
    x86_sse2_cvtss2sd,                        // llvm.x86.sse2.cvtss2sd
    x86_sse2_cvttpd2dq,                       // llvm.x86.sse2.cvttpd2dq
    x86_sse2_cvttps2dq,                       // llvm.x86.sse2.cvttps2dq
    x86_sse2_cvttsd2si,                       // llvm.x86.sse2.cvttsd2si
    x86_sse2_cvttsd2si64,                     // llvm.x86.sse2.cvttsd2si64
    x86_sse2_div_sd,                          // llvm.x86.sse2.div.sd
    x86_sse2_lfence,                          // llvm.x86.sse2.lfence
    x86_sse2_loadu_dq,                        // llvm.x86.sse2.loadu.dq
    x86_sse2_loadu_pd,                        // llvm.x86.sse2.loadu.pd
    x86_sse2_maskmov_dqu,                     // llvm.x86.sse2.maskmov.dqu
    x86_sse2_max_pd,                          // llvm.x86.sse2.max.pd
    x86_sse2_max_sd,                          // llvm.x86.sse2.max.sd
    x86_sse2_mfence,                          // llvm.x86.sse2.mfence
    x86_sse2_min_pd,                          // llvm.x86.sse2.min.pd
    x86_sse2_min_sd,                          // llvm.x86.sse2.min.sd
    x86_sse2_movmsk_pd,                       // llvm.x86.sse2.movmsk.pd
    x86_sse2_movnt_dq,                        // llvm.x86.sse2.movnt.dq
    x86_sse2_movnt_i,                         // llvm.x86.sse2.movnt.i
    x86_sse2_movnt_pd,                        // llvm.x86.sse2.movnt.pd
    x86_sse2_mul_sd,                          // llvm.x86.sse2.mul.sd
    x86_sse2_packssdw_128,                    // llvm.x86.sse2.packssdw.128
    x86_sse2_packsswb_128,                    // llvm.x86.sse2.packsswb.128
    x86_sse2_packuswb_128,                    // llvm.x86.sse2.packuswb.128
    x86_sse2_padds_b,                         // llvm.x86.sse2.padds.b
    x86_sse2_padds_w,                         // llvm.x86.sse2.padds.w
    x86_sse2_paddus_b,                        // llvm.x86.sse2.paddus.b
    x86_sse2_paddus_w,                        // llvm.x86.sse2.paddus.w
    x86_sse2_pavg_b,                          // llvm.x86.sse2.pavg.b
    x86_sse2_pavg_w,                          // llvm.x86.sse2.pavg.w
    x86_sse2_pcmpeq_b,                        // llvm.x86.sse2.pcmpeq.b
    x86_sse2_pcmpeq_d,                        // llvm.x86.sse2.pcmpeq.d
    x86_sse2_pcmpeq_w,                        // llvm.x86.sse2.pcmpeq.w
    x86_sse2_pcmpgt_b,                        // llvm.x86.sse2.pcmpgt.b
    x86_sse2_pcmpgt_d,                        // llvm.x86.sse2.pcmpgt.d
    x86_sse2_pcmpgt_w,                        // llvm.x86.sse2.pcmpgt.w
    x86_sse2_pmadd_wd,                        // llvm.x86.sse2.pmadd.wd
    x86_sse2_pmaxs_w,                         // llvm.x86.sse2.pmaxs.w
    x86_sse2_pmaxu_b,                         // llvm.x86.sse2.pmaxu.b
    x86_sse2_pmins_w,                         // llvm.x86.sse2.pmins.w
    x86_sse2_pminu_b,                         // llvm.x86.sse2.pminu.b
    x86_sse2_pmovmskb_128,                    // llvm.x86.sse2.pmovmskb.128
    x86_sse2_pmulh_w,                         // llvm.x86.sse2.pmulh.w
    x86_sse2_pmulhu_w,                        // llvm.x86.sse2.pmulhu.w
    x86_sse2_pmulu_dq,                        // llvm.x86.sse2.pmulu.dq
    x86_sse2_psad_bw,                         // llvm.x86.sse2.psad.bw
    x86_sse2_psll_d,                          // llvm.x86.sse2.psll.d
    x86_sse2_psll_dq,                         // llvm.x86.sse2.psll.dq
    x86_sse2_psll_dq_bs,                      // llvm.x86.sse2.psll.dq.bs
    x86_sse2_psll_q,                          // llvm.x86.sse2.psll.q
    x86_sse2_psll_w,                          // llvm.x86.sse2.psll.w
    x86_sse2_pslli_d,                         // llvm.x86.sse2.pslli.d
    x86_sse2_pslli_q,                         // llvm.x86.sse2.pslli.q
    x86_sse2_pslli_w,                         // llvm.x86.sse2.pslli.w
    x86_sse2_psra_d,                          // llvm.x86.sse2.psra.d
    x86_sse2_psra_w,                          // llvm.x86.sse2.psra.w
    x86_sse2_psrai_d,                         // llvm.x86.sse2.psrai.d
    x86_sse2_psrai_w,                         // llvm.x86.sse2.psrai.w
    x86_sse2_psrl_d,                          // llvm.x86.sse2.psrl.d
    x86_sse2_psrl_dq,                         // llvm.x86.sse2.psrl.dq
    x86_sse2_psrl_dq_bs,                      // llvm.x86.sse2.psrl.dq.bs
    x86_sse2_psrl_q,                          // llvm.x86.sse2.psrl.q
    x86_sse2_psrl_w,                          // llvm.x86.sse2.psrl.w
    x86_sse2_psrli_d,                         // llvm.x86.sse2.psrli.d
    x86_sse2_psrli_q,                         // llvm.x86.sse2.psrli.q
    x86_sse2_psrli_w,                         // llvm.x86.sse2.psrli.w
    x86_sse2_psubs_b,                         // llvm.x86.sse2.psubs.b
    x86_sse2_psubs_w,                         // llvm.x86.sse2.psubs.w
    x86_sse2_psubus_b,                        // llvm.x86.sse2.psubus.b
    x86_sse2_psubus_w,                        // llvm.x86.sse2.psubus.w
    x86_sse2_sqrt_pd,                         // llvm.x86.sse2.sqrt.pd
    x86_sse2_sqrt_sd,                         // llvm.x86.sse2.sqrt.sd
    x86_sse2_storel_dq,                       // llvm.x86.sse2.storel.dq
    x86_sse2_storeu_dq,                       // llvm.x86.sse2.storeu.dq
    x86_sse2_storeu_pd,                       // llvm.x86.sse2.storeu.pd
    x86_sse2_sub_sd,                          // llvm.x86.sse2.sub.sd
    x86_sse2_ucomieq_sd,                      // llvm.x86.sse2.ucomieq.sd
    x86_sse2_ucomige_sd,                      // llvm.x86.sse2.ucomige.sd
    x86_sse2_ucomigt_sd,                      // llvm.x86.sse2.ucomigt.sd
    x86_sse2_ucomile_sd,                      // llvm.x86.sse2.ucomile.sd
    x86_sse2_ucomilt_sd,                      // llvm.x86.sse2.ucomilt.sd
    x86_sse2_ucomineq_sd,                     // llvm.x86.sse2.ucomineq.sd
    x86_sse3_addsub_pd,                       // llvm.x86.sse3.addsub.pd
    x86_sse3_addsub_ps,                       // llvm.x86.sse3.addsub.ps
    x86_sse3_hadd_pd,                         // llvm.x86.sse3.hadd.pd
    x86_sse3_hadd_ps,                         // llvm.x86.sse3.hadd.ps
    x86_sse3_hsub_pd,                         // llvm.x86.sse3.hsub.pd
    x86_sse3_hsub_ps,                         // llvm.x86.sse3.hsub.ps
    x86_sse3_ldu_dq,                          // llvm.x86.sse3.ldu.dq
    x86_sse3_monitor,                         // llvm.x86.sse3.monitor
    x86_sse3_mwait,                           // llvm.x86.sse3.mwait
    x86_sse41_blendpd,                        // llvm.x86.sse41.blendpd
    x86_sse41_blendps,                        // llvm.x86.sse41.blendps
    x86_sse41_blendvpd,                       // llvm.x86.sse41.blendvpd
    x86_sse41_blendvps,                       // llvm.x86.sse41.blendvps
    x86_sse41_dppd,                           // llvm.x86.sse41.dppd
    x86_sse41_dpps,                           // llvm.x86.sse41.dpps
    x86_sse41_extractps,                      // llvm.x86.sse41.extractps
    x86_sse41_insertps,                       // llvm.x86.sse41.insertps
    x86_sse41_movntdqa,                       // llvm.x86.sse41.movntdqa
    x86_sse41_mpsadbw,                        // llvm.x86.sse41.mpsadbw
    x86_sse41_packusdw,                       // llvm.x86.sse41.packusdw
    x86_sse41_pblendvb,                       // llvm.x86.sse41.pblendvb
    x86_sse41_pblendw,                        // llvm.x86.sse41.pblendw
    x86_sse41_pcmpeqq,                        // llvm.x86.sse41.pcmpeqq
    x86_sse41_pextrb,                         // llvm.x86.sse41.pextrb
    x86_sse41_pextrd,                         // llvm.x86.sse41.pextrd
    x86_sse41_pextrq,                         // llvm.x86.sse41.pextrq
    x86_sse41_phminposuw,                     // llvm.x86.sse41.phminposuw
    x86_sse41_pmaxsb,                         // llvm.x86.sse41.pmaxsb
    x86_sse41_pmaxsd,                         // llvm.x86.sse41.pmaxsd
    x86_sse41_pmaxud,                         // llvm.x86.sse41.pmaxud
    x86_sse41_pmaxuw,                         // llvm.x86.sse41.pmaxuw
    x86_sse41_pminsb,                         // llvm.x86.sse41.pminsb
    x86_sse41_pminsd,                         // llvm.x86.sse41.pminsd
    x86_sse41_pminud,                         // llvm.x86.sse41.pminud
    x86_sse41_pminuw,                         // llvm.x86.sse41.pminuw
    x86_sse41_pmovsxbd,                       // llvm.x86.sse41.pmovsxbd
    x86_sse41_pmovsxbq,                       // llvm.x86.sse41.pmovsxbq
    x86_sse41_pmovsxbw,                       // llvm.x86.sse41.pmovsxbw
    x86_sse41_pmovsxdq,                       // llvm.x86.sse41.pmovsxdq
    x86_sse41_pmovsxwd,                       // llvm.x86.sse41.pmovsxwd
    x86_sse41_pmovsxwq,                       // llvm.x86.sse41.pmovsxwq
    x86_sse41_pmovzxbd,                       // llvm.x86.sse41.pmovzxbd
    x86_sse41_pmovzxbq,                       // llvm.x86.sse41.pmovzxbq
    x86_sse41_pmovzxbw,                       // llvm.x86.sse41.pmovzxbw
    x86_sse41_pmovzxdq,                       // llvm.x86.sse41.pmovzxdq
    x86_sse41_pmovzxwd,                       // llvm.x86.sse41.pmovzxwd
    x86_sse41_pmovzxwq,                       // llvm.x86.sse41.pmovzxwq
    x86_sse41_pmuldq,                         // llvm.x86.sse41.pmuldq
    x86_sse41_ptestc,                         // llvm.x86.sse41.ptestc
    x86_sse41_ptestnzc,                       // llvm.x86.sse41.ptestnzc
    x86_sse41_ptestz,                         // llvm.x86.sse41.ptestz
    x86_sse41_round_pd,                       // llvm.x86.sse41.round.pd
    x86_sse41_round_ps,                       // llvm.x86.sse41.round.ps
    x86_sse41_round_sd,                       // llvm.x86.sse41.round.sd
    x86_sse41_round_ss,                       // llvm.x86.sse41.round.ss
    x86_sse42_crc32_16,                       // llvm.x86.sse42.crc32.16
    x86_sse42_crc32_32,                       // llvm.x86.sse42.crc32.32
    x86_sse42_crc32_8,                        // llvm.x86.sse42.crc32.8
    x86_sse42_crc64_64,                       // llvm.x86.sse42.crc64.64
    x86_sse42_crc64_8,                        // llvm.x86.sse42.crc64.8
    x86_sse42_pcmpestri128,                   // llvm.x86.sse42.pcmpestri128
    x86_sse42_pcmpestria128,                  // llvm.x86.sse42.pcmpestria128
    x86_sse42_pcmpestric128,                  // llvm.x86.sse42.pcmpestric128
    x86_sse42_pcmpestrio128,                  // llvm.x86.sse42.pcmpestrio128
    x86_sse42_pcmpestris128,                  // llvm.x86.sse42.pcmpestris128
    x86_sse42_pcmpestriz128,                  // llvm.x86.sse42.pcmpestriz128
    x86_sse42_pcmpestrm128,                   // llvm.x86.sse42.pcmpestrm128
    x86_sse42_pcmpgtq,                        // llvm.x86.sse42.pcmpgtq
    x86_sse42_pcmpistri128,                   // llvm.x86.sse42.pcmpistri128
    x86_sse42_pcmpistria128,                  // llvm.x86.sse42.pcmpistria128
    x86_sse42_pcmpistric128,                  // llvm.x86.sse42.pcmpistric128
    x86_sse42_pcmpistrio128,                  // llvm.x86.sse42.pcmpistrio128
    x86_sse42_pcmpistris128,                  // llvm.x86.sse42.pcmpistris128
    x86_sse42_pcmpistriz128,                  // llvm.x86.sse42.pcmpistriz128
    x86_sse42_pcmpistrm128,                   // llvm.x86.sse42.pcmpistrm128
    x86_sse_add_ss,                           // llvm.x86.sse.add.ss
    x86_sse_cmp_ps,                           // llvm.x86.sse.cmp.ps
    x86_sse_cmp_ss,                           // llvm.x86.sse.cmp.ss
    x86_sse_comieq_ss,                        // llvm.x86.sse.comieq.ss
    x86_sse_comige_ss,                        // llvm.x86.sse.comige.ss
    x86_sse_comigt_ss,                        // llvm.x86.sse.comigt.ss
    x86_sse_comile_ss,                        // llvm.x86.sse.comile.ss
    x86_sse_comilt_ss,                        // llvm.x86.sse.comilt.ss
    x86_sse_comineq_ss,                       // llvm.x86.sse.comineq.ss
    x86_sse_cvtpd2pi,                         // llvm.x86.sse.cvtpd2pi
    x86_sse_cvtpi2pd,                         // llvm.x86.sse.cvtpi2pd
    x86_sse_cvtpi2ps,                         // llvm.x86.sse.cvtpi2ps
    x86_sse_cvtps2pi,                         // llvm.x86.sse.cvtps2pi
    x86_sse_cvtsi2ss,                         // llvm.x86.sse.cvtsi2ss
    x86_sse_cvtsi642ss,                       // llvm.x86.sse.cvtsi642ss
    x86_sse_cvtss2si,                         // llvm.x86.sse.cvtss2si
    x86_sse_cvtss2si64,                       // llvm.x86.sse.cvtss2si64
    x86_sse_cvttpd2pi,                        // llvm.x86.sse.cvttpd2pi
    x86_sse_cvttps2pi,                        // llvm.x86.sse.cvttps2pi
    x86_sse_cvttss2si,                        // llvm.x86.sse.cvttss2si
    x86_sse_cvttss2si64,                      // llvm.x86.sse.cvttss2si64
    x86_sse_div_ss,                           // llvm.x86.sse.div.ss
    x86_sse_ldmxcsr,                          // llvm.x86.sse.ldmxcsr
    x86_sse_loadu_ps,                         // llvm.x86.sse.loadu.ps
    x86_sse_max_ps,                           // llvm.x86.sse.max.ps
    x86_sse_max_ss,                           // llvm.x86.sse.max.ss
    x86_sse_min_ps,                           // llvm.x86.sse.min.ps
    x86_sse_min_ss,                           // llvm.x86.sse.min.ss
    x86_sse_movmsk_ps,                        // llvm.x86.sse.movmsk.ps
    x86_sse_movnt_ps,                         // llvm.x86.sse.movnt.ps
    x86_sse_mul_ss,                           // llvm.x86.sse.mul.ss
    x86_sse_rcp_ps,                           // llvm.x86.sse.rcp.ps
    x86_sse_rcp_ss,                           // llvm.x86.sse.rcp.ss
    x86_sse_rsqrt_ps,                         // llvm.x86.sse.rsqrt.ps
    x86_sse_rsqrt_ss,                         // llvm.x86.sse.rsqrt.ss
    x86_sse_sfence,                           // llvm.x86.sse.sfence
    x86_sse_sqrt_ps,                          // llvm.x86.sse.sqrt.ps
    x86_sse_sqrt_ss,                          // llvm.x86.sse.sqrt.ss
    x86_sse_stmxcsr,                          // llvm.x86.sse.stmxcsr
    x86_sse_storeu_ps,                        // llvm.x86.sse.storeu.ps
    x86_sse_sub_ss,                           // llvm.x86.sse.sub.ss
    x86_sse_ucomieq_ss,                       // llvm.x86.sse.ucomieq.ss
    x86_sse_ucomige_ss,                       // llvm.x86.sse.ucomige.ss
    x86_sse_ucomigt_ss,                       // llvm.x86.sse.ucomigt.ss
    x86_sse_ucomile_ss,                       // llvm.x86.sse.ucomile.ss
    x86_sse_ucomilt_ss,                       // llvm.x86.sse.ucomilt.ss
    x86_sse_ucomineq_ss,                      // llvm.x86.sse.ucomineq.ss
    x86_ssse3_pabs_b,                         // llvm.x86.ssse3.pabs.b
    x86_ssse3_pabs_b_128,                     // llvm.x86.ssse3.pabs.b.128
    x86_ssse3_pabs_d,                         // llvm.x86.ssse3.pabs.d
    x86_ssse3_pabs_d_128,                     // llvm.x86.ssse3.pabs.d.128
    x86_ssse3_pabs_w,                         // llvm.x86.ssse3.pabs.w
    x86_ssse3_pabs_w_128,                     // llvm.x86.ssse3.pabs.w.128
    x86_ssse3_phadd_d,                        // llvm.x86.ssse3.phadd.d
    x86_ssse3_phadd_d_128,                    // llvm.x86.ssse3.phadd.d.128
    x86_ssse3_phadd_sw,                       // llvm.x86.ssse3.phadd.sw
    x86_ssse3_phadd_sw_128,                   // llvm.x86.ssse3.phadd.sw.128
    x86_ssse3_phadd_w,                        // llvm.x86.ssse3.phadd.w
    x86_ssse3_phadd_w_128,                    // llvm.x86.ssse3.phadd.w.128
    x86_ssse3_phsub_d,                        // llvm.x86.ssse3.phsub.d
    x86_ssse3_phsub_d_128,                    // llvm.x86.ssse3.phsub.d.128
    x86_ssse3_phsub_sw,                       // llvm.x86.ssse3.phsub.sw
    x86_ssse3_phsub_sw_128,                   // llvm.x86.ssse3.phsub.sw.128
    x86_ssse3_phsub_w,                        // llvm.x86.ssse3.phsub.w
    x86_ssse3_phsub_w_128,                    // llvm.x86.ssse3.phsub.w.128
    x86_ssse3_pmadd_ub_sw,                    // llvm.x86.ssse3.pmadd.ub.sw
    x86_ssse3_pmadd_ub_sw_128,                // llvm.x86.ssse3.pmadd.ub.sw.128
    x86_ssse3_pmul_hr_sw,                     // llvm.x86.ssse3.pmul.hr.sw
    x86_ssse3_pmul_hr_sw_128,                 // llvm.x86.ssse3.pmul.hr.sw.128
    x86_ssse3_pshuf_b,                        // llvm.x86.ssse3.pshuf.b
    x86_ssse3_pshuf_b_128,                    // llvm.x86.ssse3.pshuf.b.128
    x86_ssse3_pshuf_w,                        // llvm.x86.ssse3.pshuf.w
    x86_ssse3_psign_b,                        // llvm.x86.ssse3.psign.b
    x86_ssse3_psign_b_128,                    // llvm.x86.ssse3.psign.b.128
    x86_ssse3_psign_d,                        // llvm.x86.ssse3.psign.d
    x86_ssse3_psign_d_128,                    // llvm.x86.ssse3.psign.d.128
    x86_ssse3_psign_w,                        // llvm.x86.ssse3.psign.w
    x86_ssse3_psign_w_128,                    // llvm.x86.ssse3.psign.w.128
    xcore_bitrev,                             // llvm.xcore.bitrev
    xcore_getid                               // llvm.xcore.getid
#endif

// Intrinsic ID to name table
#ifdef GET_INTRINSIC_NAME_TABLE
  // Note that entry #0 is the invalid intrinsic!
  "llvm.alpha.umulh",
  "llvm.annotation",
  "llvm.arm.get.fpscr",
  "llvm.arm.neon.vabds",
  "llvm.arm.neon.vabdu",
  "llvm.arm.neon.vabs",
  "llvm.arm.neon.vacged",
  "llvm.arm.neon.vacgeq",
  "llvm.arm.neon.vacgtd",
  "llvm.arm.neon.vacgtq",
  "llvm.arm.neon.vaddhn",
  "llvm.arm.neon.vcls",
  "llvm.arm.neon.vclz",
  "llvm.arm.neon.vcnt",
  "llvm.arm.neon.vcvtfp2fxs",
  "llvm.arm.neon.vcvtfp2fxu",
  "llvm.arm.neon.vcvtfxs2fp",
  "llvm.arm.neon.vcvtfxu2fp",
  "llvm.arm.neon.vhadds",
  "llvm.arm.neon.vhaddu",
  "llvm.arm.neon.vhsubs",
  "llvm.arm.neon.vhsubu",
  "llvm.arm.neon.vld1",
  "llvm.arm.neon.vld2",
  "llvm.arm.neon.vld2lane",
  "llvm.arm.neon.vld3",
  "llvm.arm.neon.vld3lane",
  "llvm.arm.neon.vld4",
  "llvm.arm.neon.vld4lane",
  "llvm.arm.neon.vmaxs",
  "llvm.arm.neon.vmaxu",
  "llvm.arm.neon.vmins",
  "llvm.arm.neon.vminu",
  "llvm.arm.neon.vmullp",
  "llvm.arm.neon.vmulp",
  "llvm.arm.neon.vpadals",
  "llvm.arm.neon.vpadalu",
  "llvm.arm.neon.vpadd",
  "llvm.arm.neon.vpaddls",
  "llvm.arm.neon.vpaddlu",
  "llvm.arm.neon.vpmaxs",
  "llvm.arm.neon.vpmaxu",
  "llvm.arm.neon.vpmins",
  "llvm.arm.neon.vpminu",
  "llvm.arm.neon.vqabs",
  "llvm.arm.neon.vqadds",
  "llvm.arm.neon.vqaddu",
  "llvm.arm.neon.vqdmlal",
  "llvm.arm.neon.vqdmlsl",
  "llvm.arm.neon.vqdmulh",
  "llvm.arm.neon.vqdmull",
  "llvm.arm.neon.vqmovns",
  "llvm.arm.neon.vqmovnsu",
  "llvm.arm.neon.vqmovnu",
  "llvm.arm.neon.vqneg",
  "llvm.arm.neon.vqrdmulh",
  "llvm.arm.neon.vqrshiftns",
  "llvm.arm.neon.vqrshiftnsu",
  "llvm.arm.neon.vqrshiftnu",
  "llvm.arm.neon.vqrshifts",
  "llvm.arm.neon.vqrshiftu",
  "llvm.arm.neon.vqshiftns",
  "llvm.arm.neon.vqshiftnsu",
  "llvm.arm.neon.vqshiftnu",
  "llvm.arm.neon.vqshifts",
  "llvm.arm.neon.vqshiftsu",
  "llvm.arm.neon.vqshiftu",
  "llvm.arm.neon.vqsubs",
  "llvm.arm.neon.vqsubu",
  "llvm.arm.neon.vraddhn",
  "llvm.arm.neon.vrecpe",
  "llvm.arm.neon.vrecps",
  "llvm.arm.neon.vrhadds",
  "llvm.arm.neon.vrhaddu",
  "llvm.arm.neon.vrshiftn",
  "llvm.arm.neon.vrshifts",
  "llvm.arm.neon.vrshiftu",
  "llvm.arm.neon.vrsqrte",
  "llvm.arm.neon.vrsqrts",
  "llvm.arm.neon.vrsubhn",
  "llvm.arm.neon.vshiftins",
  "llvm.arm.neon.vshiftls",
  "llvm.arm.neon.vshiftlu",
  "llvm.arm.neon.vshiftn",
  "llvm.arm.neon.vshifts",
  "llvm.arm.neon.vshiftu",
  "llvm.arm.neon.vst1",
  "llvm.arm.neon.vst2",
  "llvm.arm.neon.vst2lane",
  "llvm.arm.neon.vst3",
  "llvm.arm.neon.vst3lane",
  "llvm.arm.neon.vst4",
  "llvm.arm.neon.vst4lane",
  "llvm.arm.neon.vsubhn",
  "llvm.arm.neon.vtbl1",
  "llvm.arm.neon.vtbl2",
  "llvm.arm.neon.vtbl3",
  "llvm.arm.neon.vtbl4",
  "llvm.arm.neon.vtbx1",
  "llvm.arm.neon.vtbx2",
  "llvm.arm.neon.vtbx3",
  "llvm.arm.neon.vtbx4",
  "llvm.arm.qadd",
  "llvm.arm.qsub",
  "llvm.arm.set.fpscr",
  "llvm.arm.ssat",
  "llvm.arm.thread.pointer",
  "llvm.arm.usat",
  "llvm.arm.vcvtr",
  "llvm.arm.vcvtru",
  "llvm.atomic.cmp.swap",
  "llvm.atomic.load.add",
  "llvm.atomic.load.and",
  "llvm.atomic.load.max",
  "llvm.atomic.load.min",
  "llvm.atomic.load.nand",
  "llvm.atomic.load.or",
  "llvm.atomic.load.sub",
  "llvm.atomic.load.umax",
  "llvm.atomic.load.umin",
  "llvm.atomic.load.xor",
  "llvm.atomic.swap",
  "llvm.bswap",
  "llvm.convert.from.fp16",
  "llvm.convert.to.fp16",
  "llvm.convertff",
  "llvm.convertfsi",
  "llvm.convertfui",
  "llvm.convertsif",
  "llvm.convertss",
  "llvm.convertsu",
  "llvm.convertuif",
  "llvm.convertus",
  "llvm.convertuu",
  "llvm.cos",
  "llvm.ctlz",
  "llvm.ctpop",
  "llvm.cttz",
  "llvm.dbg.declare",
  "llvm.dbg.value",
  "llvm.eh.dwarf.cfa",
  "llvm.eh.exception",
  "llvm.eh.return.i32",
  "llvm.eh.return.i64",
  "llvm.eh.selector",
  "llvm.eh.sjlj.callsite",
  "llvm.eh.sjlj.longjmp",
  "llvm.eh.sjlj.lsda",
  "llvm.eh.sjlj.setjmp",
  "llvm.eh.typeid.for",
  "llvm.eh.unwind.init",
  "llvm.exp",
  "llvm.exp2",
  "llvm.flt.rounds",
  "llvm.frameaddress",
  "llvm.gcread",
  "llvm.gcroot",
  "llvm.gcwrite",
  "llvm.init.trampoline",
  "llvm.invariant.end",
  "llvm.invariant.start",
  "llvm.lifetime.end",
  "llvm.lifetime.start",
  "llvm.log",
  "llvm.log10",
  "llvm.log2",
  "llvm.longjmp",
  "llvm.memcpy",
  "llvm.memmove",
  "llvm.memory.barrier",
  "llvm.memset",
  "llvm.objectsize",
  "llvm.pcmarker",
  "llvm.pow",
  "llvm.powi",
  "llvm.ppc.altivec.dss",
  "llvm.ppc.altivec.dssall",
  "llvm.ppc.altivec.dst",
  "llvm.ppc.altivec.dstst",
  "llvm.ppc.altivec.dststt",
  "llvm.ppc.altivec.dstt",
  "llvm.ppc.altivec.lvebx",
  "llvm.ppc.altivec.lvehx",
  "llvm.ppc.altivec.lvewx",
  "llvm.ppc.altivec.lvsl",
  "llvm.ppc.altivec.lvsr",
  "llvm.ppc.altivec.lvx",
  "llvm.ppc.altivec.lvxl",
  "llvm.ppc.altivec.mfvscr",
  "llvm.ppc.altivec.mtvscr",
  "llvm.ppc.altivec.stvebx",
  "llvm.ppc.altivec.stvehx",
  "llvm.ppc.altivec.stvewx",
  "llvm.ppc.altivec.stvx",
  "llvm.ppc.altivec.stvxl",
  "llvm.ppc.altivec.vaddcuw",
  "llvm.ppc.altivec.vaddsbs",
  "llvm.ppc.altivec.vaddshs",
  "llvm.ppc.altivec.vaddsws",
  "llvm.ppc.altivec.vaddubs",
  "llvm.ppc.altivec.vadduhs",
  "llvm.ppc.altivec.vadduws",
  "llvm.ppc.altivec.vavgsb",
  "llvm.ppc.altivec.vavgsh",
  "llvm.ppc.altivec.vavgsw",
  "llvm.ppc.altivec.vavgub",
  "llvm.ppc.altivec.vavguh",
  "llvm.ppc.altivec.vavguw",
  "llvm.ppc.altivec.vcfsx",
  "llvm.ppc.altivec.vcfux",
  "llvm.ppc.altivec.vcmpbfp",
  "llvm.ppc.altivec.vcmpbfp.p",
  "llvm.ppc.altivec.vcmpeqfp",
  "llvm.ppc.altivec.vcmpeqfp.p",
  "llvm.ppc.altivec.vcmpequb",
  "llvm.ppc.altivec.vcmpequb.p",
  "llvm.ppc.altivec.vcmpequh",
  "llvm.ppc.altivec.vcmpequh.p",
  "llvm.ppc.altivec.vcmpequw",
  "llvm.ppc.altivec.vcmpequw.p",
  "llvm.ppc.altivec.vcmpgefp",
  "llvm.ppc.altivec.vcmpgefp.p",
  "llvm.ppc.altivec.vcmpgtfp",
  "llvm.ppc.altivec.vcmpgtfp.p",
  "llvm.ppc.altivec.vcmpgtsb",
  "llvm.ppc.altivec.vcmpgtsb.p",
  "llvm.ppc.altivec.vcmpgtsh",
  "llvm.ppc.altivec.vcmpgtsh.p",
  "llvm.ppc.altivec.vcmpgtsw",
  "llvm.ppc.altivec.vcmpgtsw.p",
  "llvm.ppc.altivec.vcmpgtub",
  "llvm.ppc.altivec.vcmpgtub.p",
  "llvm.ppc.altivec.vcmpgtuh",
  "llvm.ppc.altivec.vcmpgtuh.p",
  "llvm.ppc.altivec.vcmpgtuw",
  "llvm.ppc.altivec.vcmpgtuw.p",
  "llvm.ppc.altivec.vctsxs",
  "llvm.ppc.altivec.vctuxs",
  "llvm.ppc.altivec.vexptefp",
  "llvm.ppc.altivec.vlogefp",
  "llvm.ppc.altivec.vmaddfp",
  "llvm.ppc.altivec.vmaxfp",
  "llvm.ppc.altivec.vmaxsb",
  "llvm.ppc.altivec.vmaxsh",
  "llvm.ppc.altivec.vmaxsw",
  "llvm.ppc.altivec.vmaxub",
  "llvm.ppc.altivec.vmaxuh",
  "llvm.ppc.altivec.vmaxuw",
  "llvm.ppc.altivec.vmhaddshs",
  "llvm.ppc.altivec.vmhraddshs",
  "llvm.ppc.altivec.vminfp",
  "llvm.ppc.altivec.vminsb",
  "llvm.ppc.altivec.vminsh",
  "llvm.ppc.altivec.vminsw",
  "llvm.ppc.altivec.vminub",
  "llvm.ppc.altivec.vminuh",
  "llvm.ppc.altivec.vminuw",
  "llvm.ppc.altivec.vmladduhm",
  "llvm.ppc.altivec.vmsummbm",
  "llvm.ppc.altivec.vmsumshm",
  "llvm.ppc.altivec.vmsumshs",
  "llvm.ppc.altivec.vmsumubm",
  "llvm.ppc.altivec.vmsumuhm",
  "llvm.ppc.altivec.vmsumuhs",
  "llvm.ppc.altivec.vmulesb",
  "llvm.ppc.altivec.vmulesh",
  "llvm.ppc.altivec.vmuleub",
  "llvm.ppc.altivec.vmuleuh",
  "llvm.ppc.altivec.vmulosb",
  "llvm.ppc.altivec.vmulosh",
  "llvm.ppc.altivec.vmuloub",
  "llvm.ppc.altivec.vmulouh",
  "llvm.ppc.altivec.vnmsubfp",
  "llvm.ppc.altivec.vperm",
  "llvm.ppc.altivec.vpkpx",
  "llvm.ppc.altivec.vpkshss",
  "llvm.ppc.altivec.vpkshus",
  "llvm.ppc.altivec.vpkswss",
  "llvm.ppc.altivec.vpkswus",
  "llvm.ppc.altivec.vpkuhus",
  "llvm.ppc.altivec.vpkuwus",
  "llvm.ppc.altivec.vrefp",
  "llvm.ppc.altivec.vrfim",
  "llvm.ppc.altivec.vrfin",
  "llvm.ppc.altivec.vrfip",
  "llvm.ppc.altivec.vrfiz",
  "llvm.ppc.altivec.vrlb",
  "llvm.ppc.altivec.vrlh",
  "llvm.ppc.altivec.vrlw",
  "llvm.ppc.altivec.vrsqrtefp",
  "llvm.ppc.altivec.vsel",
  "llvm.ppc.altivec.vsl",
  "llvm.ppc.altivec.vslb",
  "llvm.ppc.altivec.vslh",
  "llvm.ppc.altivec.vslo",
  "llvm.ppc.altivec.vslw",
  "llvm.ppc.altivec.vsr",
  "llvm.ppc.altivec.vsrab",
  "llvm.ppc.altivec.vsrah",
  "llvm.ppc.altivec.vsraw",
  "llvm.ppc.altivec.vsrb",
  "llvm.ppc.altivec.vsrh",
  "llvm.ppc.altivec.vsro",
  "llvm.ppc.altivec.vsrw",
  "llvm.ppc.altivec.vsubcuw",
  "llvm.ppc.altivec.vsubsbs",
  "llvm.ppc.altivec.vsubshs",
  "llvm.ppc.altivec.vsubsws",
  "llvm.ppc.altivec.vsububs",
  "llvm.ppc.altivec.vsubuhs",
  "llvm.ppc.altivec.vsubuws",
  "llvm.ppc.altivec.vsum2sws",
  "llvm.ppc.altivec.vsum4sbs",
  "llvm.ppc.altivec.vsum4shs",
  "llvm.ppc.altivec.vsum4ubs",
  "llvm.ppc.altivec.vsumsws",
  "llvm.ppc.altivec.vupkhpx",
  "llvm.ppc.altivec.vupkhsb",
  "llvm.ppc.altivec.vupkhsh",
  "llvm.ppc.altivec.vupklpx",
  "llvm.ppc.altivec.vupklsb",
  "llvm.ppc.altivec.vupklsh",
  "llvm.ppc.dcba",
  "llvm.ppc.dcbf",
  "llvm.ppc.dcbi",
  "llvm.ppc.dcbst",
  "llvm.ppc.dcbt",
  "llvm.ppc.dcbtst",
  "llvm.ppc.dcbz",
  "llvm.ppc.dcbzl",
  "llvm.ppc.sync",
  "llvm.prefetch",
  "llvm.ptr.annotation",
  "llvm.readcyclecounter",
  "llvm.returnaddress",
  "llvm.sadd.with.overflow",
  "llvm.setjmp",
  "llvm.siglongjmp",
  "llvm.sigsetjmp",
  "llvm.sin",
  "llvm.smul.with.overflow",
  "llvm.spu.si.a",
  "llvm.spu.si.addx",
  "llvm.spu.si.ah",
  "llvm.spu.si.ahi",
  "llvm.spu.si.ai",
  "llvm.spu.si.and",
  "llvm.spu.si.andbi",
  "llvm.spu.si.andc",
  "llvm.spu.si.andhi",
  "llvm.spu.si.andi",
  "llvm.spu.si.bg",
  "llvm.spu.si.bgx",
  "llvm.spu.si.ceq",
  "llvm.spu.si.ceqb",
  "llvm.spu.si.ceqbi",
  "llvm.spu.si.ceqh",
  "llvm.spu.si.ceqhi",
  "llvm.spu.si.ceqi",
  "llvm.spu.si.cg",
  "llvm.spu.si.cgt",
  "llvm.spu.si.cgtb",
  "llvm.spu.si.cgtbi",
  "llvm.spu.si.cgth",
  "llvm.spu.si.cgthi",
  "llvm.spu.si.cgti",
  "llvm.spu.si.cgx",
  "llvm.spu.si.clgt",
  "llvm.spu.si.clgtb",
  "llvm.spu.si.clgtbi",
  "llvm.spu.si.clgth",
  "llvm.spu.si.clgthi",
  "llvm.spu.si.clgti",
  "llvm.spu.si.dfa",
  "llvm.spu.si.dfm",
  "llvm.spu.si.dfma",
  "llvm.spu.si.dfms",
  "llvm.spu.si.dfnma",
  "llvm.spu.si.dfnms",
  "llvm.spu.si.dfs",
  "llvm.spu.si.fa",
  "llvm.spu.si.fceq",
  "llvm.spu.si.fcgt",
  "llvm.spu.si.fcmeq",
  "llvm.spu.si.fcmgt",
  "llvm.spu.si.fm",
  "llvm.spu.si.fma",
  "llvm.spu.si.fms",
  "llvm.spu.si.fnms",
  "llvm.spu.si.fs",
  "llvm.spu.si.fsmbi",
  "llvm.spu.si.mpy",
  "llvm.spu.si.mpya",
  "llvm.spu.si.mpyh",
  "llvm.spu.si.mpyhh",
  "llvm.spu.si.mpyhha",
  "llvm.spu.si.mpyhhau",
  "llvm.spu.si.mpyhhu",
  "llvm.spu.si.mpyi",
  "llvm.spu.si.mpys",
  "llvm.spu.si.mpyu",
  "llvm.spu.si.mpyui",
  "llvm.spu.si.nand",
  "llvm.spu.si.nor",
  "llvm.spu.si.or",
  "llvm.spu.si.orbi",
  "llvm.spu.si.orc",
  "llvm.spu.si.orhi",
  "llvm.spu.si.ori",
  "llvm.spu.si.sf",
  "llvm.spu.si.sfh",
  "llvm.spu.si.sfhi",
  "llvm.spu.si.sfi",
  "llvm.spu.si.sfx",
  "llvm.spu.si.shli",
  "llvm.spu.si.shlqbi",
  "llvm.spu.si.shlqbii",
  "llvm.spu.si.shlqby",
  "llvm.spu.si.shlqbyi",
  "llvm.spu.si.xor",
  "llvm.spu.si.xorbi",
  "llvm.spu.si.xorhi",
  "llvm.spu.si.xori",
  "llvm.sqrt",
  "llvm.ssub.with.overflow",
  "llvm.stackprotector",
  "llvm.stackrestore",
  "llvm.stacksave",
  "llvm.trap",
  "llvm.uadd.with.overflow",
  "llvm.umul.with.overflow",
  "llvm.usub.with.overflow",
  "llvm.va_copy",
  "llvm.va_end",
  "llvm.var.annotation",
  "llvm.va_start",
  "llvm.x86.aesni.aesdec",
  "llvm.x86.aesni.aesdeclast",
  "llvm.x86.aesni.aesenc",
  "llvm.x86.aesni.aesenclast",
  "llvm.x86.aesni.aesimc",
  "llvm.x86.aesni.aeskeygenassist",
  "llvm.x86.avx.addsub.pd.256",
  "llvm.x86.avx.addsub.ps.256",
  "llvm.x86.avx.blend.pd.256",
  "llvm.x86.avx.blend.ps.256",
  "llvm.x86.avx.blendv.pd.256",
  "llvm.x86.avx.blendv.ps.256",
  "llvm.x86.avx.cmp.pd.256",
  "llvm.x86.avx.cmp.ps.256",
  "llvm.x86.avx.cvt.pd2.ps.256",
  "llvm.x86.avx.cvt.pd2dq.256",
  "llvm.x86.avx.cvt.ps2.pd.256",
  "llvm.x86.avx.cvt.ps2dq.256",
  "llvm.x86.avx.cvtdq2.pd.256",
  "llvm.x86.avx.cvtdq2.ps.256",
  "llvm.x86.avx.cvtt.pd2dq.256",
  "llvm.x86.avx.cvtt.ps2dq.256",
  "llvm.x86.avx.dp.ps.256",
  "llvm.x86.avx.hadd.pd.256",
  "llvm.x86.avx.hadd.ps.256",
  "llvm.x86.avx.hsub.pd.256",
  "llvm.x86.avx.hsub.ps.256",
  "llvm.x86.avx.ldu.dq.256",
  "llvm.x86.avx.loadu.dq.256",
  "llvm.x86.avx.loadu.pd.256",
  "llvm.x86.avx.loadu.ps.256",
  "llvm.x86.avx.maskload.pd",
  "llvm.x86.avx.maskload.pd.256",
  "llvm.x86.avx.maskload.ps",
  "llvm.x86.avx.maskload.ps.256",
  "llvm.x86.avx.maskstore.pd",
  "llvm.x86.avx.maskstore.pd.256",
  "llvm.x86.avx.maskstore.ps",
  "llvm.x86.avx.maskstore.ps.256",
  "llvm.x86.avx.max.pd.256",
  "llvm.x86.avx.max.ps.256",
  "llvm.x86.avx.min.pd.256",
  "llvm.x86.avx.min.ps.256",
  "llvm.x86.avx.movmsk.pd.256",
  "llvm.x86.avx.movmsk.ps.256",
  "llvm.x86.avx.movnt.dq.256",
  "llvm.x86.avx.movnt.pd.256",
  "llvm.x86.avx.movnt.ps.256",
  "llvm.x86.avx.ptestc.256",
  "llvm.x86.avx.ptestnzc.256",
  "llvm.x86.avx.ptestz.256",
  "llvm.x86.avx.rcp.ps.256",
  "llvm.x86.avx.round.pd.256",
  "llvm.x86.avx.round.ps.256",
  "llvm.x86.avx.rsqrt.ps.256",
  "llvm.x86.avx.sqrt.pd.256",
  "llvm.x86.avx.sqrt.ps.256",
  "llvm.x86.avx.storeu.dq.256",
  "llvm.x86.avx.storeu.pd.256",
  "llvm.x86.avx.storeu.ps.256",
  "llvm.x86.avx.vbroadcast.sd.256",
  "llvm.x86.avx.vbroadcastf128.pd.256",
  "llvm.x86.avx.vbroadcastf128.ps.256",
  "llvm.x86.avx.vbroadcastss",
  "llvm.x86.avx.vbroadcastss.256",
  "llvm.x86.avx.vextractf128.pd.256",
  "llvm.x86.avx.vextractf128.ps.256",
  "llvm.x86.avx.vextractf128.si.256",
  "llvm.x86.avx.vinsertf128.pd.256",
  "llvm.x86.avx.vinsertf128.ps.256",
  "llvm.x86.avx.vinsertf128.si.256",
  "llvm.x86.avx.vperm2f128.pd.256",
  "llvm.x86.avx.vperm2f128.ps.256",
  "llvm.x86.avx.vperm2f128.si.256",
  "llvm.x86.avx.vpermil.pd",
  "llvm.x86.avx.vpermil.pd.256",
  "llvm.x86.avx.vpermil.ps",
  "llvm.x86.avx.vpermil.ps.256",
  "llvm.x86.avx.vpermilvar.pd",
  "llvm.x86.avx.vpermilvar.pd.256",
  "llvm.x86.avx.vpermilvar.ps",
  "llvm.x86.avx.vpermilvar.ps.256",
  "llvm.x86.avx.vtestc.pd",
  "llvm.x86.avx.vtestc.pd.256",
  "llvm.x86.avx.vtestc.ps",
  "llvm.x86.avx.vtestc.ps.256",
  "llvm.x86.avx.vtestnzc.pd",
  "llvm.x86.avx.vtestnzc.pd.256",
  "llvm.x86.avx.vtestnzc.ps",
  "llvm.x86.avx.vtestnzc.ps.256",
  "llvm.x86.avx.vtestz.pd",
  "llvm.x86.avx.vtestz.pd.256",
  "llvm.x86.avx.vtestz.ps",
  "llvm.x86.avx.vtestz.ps.256",
  "llvm.x86.avx.vzeroall",
  "llvm.x86.avx.vzeroupper",
  "llvm.x86.int",
  "llvm.x86.mmx.cvtsi32.si64",
  "llvm.x86.mmx.cvtsi64.si32",
  "llvm.x86.mmx.emms",
  "llvm.x86.mmx.femms",
  "llvm.x86.mmx.maskmovq",
  "llvm.x86.mmx.movnt.dq",
  "llvm.x86.mmx.packssdw",
  "llvm.x86.mmx.packsswb",
  "llvm.x86.mmx.packuswb",
  "llvm.x86.mmx.padd.b",
  "llvm.x86.mmx.padd.d",
  "llvm.x86.mmx.padd.q",
  "llvm.x86.mmx.padd.w",
  "llvm.x86.mmx.padds.b",
  "llvm.x86.mmx.padds.w",
  "llvm.x86.mmx.paddus.b",
  "llvm.x86.mmx.paddus.w",
  "llvm.x86.mmx.pand",
  "llvm.x86.mmx.pandn",
  "llvm.x86.mmx.pavg.b",
  "llvm.x86.mmx.pavg.w",
  "llvm.x86.mmx.pcmpeq.b",
  "llvm.x86.mmx.pcmpeq.d",
  "llvm.x86.mmx.pcmpeq.w",
  "llvm.x86.mmx.pcmpgt.b",
  "llvm.x86.mmx.pcmpgt.d",
  "llvm.x86.mmx.pcmpgt.w",
  "llvm.x86.mmx.pextr.w",
  "llvm.x86.mmx.pinsr.w",
  "llvm.x86.mmx.pmadd.wd",
  "llvm.x86.mmx.pmaxs.w",
  "llvm.x86.mmx.pmaxu.b",
  "llvm.x86.mmx.pmins.w",
  "llvm.x86.mmx.pminu.b",
  "llvm.x86.mmx.pmovmskb",
  "llvm.x86.mmx.pmulh.w",
  "llvm.x86.mmx.pmulhu.w",
  "llvm.x86.mmx.pmull.w",
  "llvm.x86.mmx.pmulu.dq",
  "llvm.x86.mmx.por",
  "llvm.x86.mmx.psad.bw",
  "llvm.x86.mmx.psll.d",
  "llvm.x86.mmx.psll.q",
  "llvm.x86.mmx.psll.w",
  "llvm.x86.mmx.pslli.d",
  "llvm.x86.mmx.pslli.q",
  "llvm.x86.mmx.pslli.w",
  "llvm.x86.mmx.psra.d",
  "llvm.x86.mmx.psra.w",
  "llvm.x86.mmx.psrai.d",
  "llvm.x86.mmx.psrai.w",
  "llvm.x86.mmx.psrl.d",
  "llvm.x86.mmx.psrl.q",
  "llvm.x86.mmx.psrl.w",
  "llvm.x86.mmx.psrli.d",
  "llvm.x86.mmx.psrli.q",
  "llvm.x86.mmx.psrli.w",
  "llvm.x86.mmx.psub.b",
  "llvm.x86.mmx.psub.d",
  "llvm.x86.mmx.psub.q",
  "llvm.x86.mmx.psub.w",
  "llvm.x86.mmx.psubs.b",
  "llvm.x86.mmx.psubs.w",
  "llvm.x86.mmx.psubus.b",
  "llvm.x86.mmx.psubus.w",
  "llvm.x86.mmx.punpckhbw",
  "llvm.x86.mmx.punpckhdq",
  "llvm.x86.mmx.punpckhwd",
  "llvm.x86.mmx.punpcklbw",
  "llvm.x86.mmx.punpckldq",
  "llvm.x86.mmx.punpcklwd",
  "llvm.x86.mmx.pxor",
  "llvm.x86.mmx.vec.ext.d",
  "llvm.x86.mmx.vec.init.b",
  "llvm.x86.mmx.vec.init.d",
  "llvm.x86.mmx.vec.init.w",
  "llvm.x86.sse2.add.sd",
  "llvm.x86.sse2.clflush",
  "llvm.x86.sse2.cmp.pd",
  "llvm.x86.sse2.cmp.sd",
  "llvm.x86.sse2.comieq.sd",
  "llvm.x86.sse2.comige.sd",
  "llvm.x86.sse2.comigt.sd",
  "llvm.x86.sse2.comile.sd",
  "llvm.x86.sse2.comilt.sd",
  "llvm.x86.sse2.comineq.sd",
  "llvm.x86.sse2.cvtdq2pd",
  "llvm.x86.sse2.cvtdq2ps",
  "llvm.x86.sse2.cvtpd2dq",
  "llvm.x86.sse2.cvtpd2ps",
  "llvm.x86.sse2.cvtps2dq",
  "llvm.x86.sse2.cvtps2pd",
  "llvm.x86.sse2.cvtsd2si",
  "llvm.x86.sse2.cvtsd2si64",
  "llvm.x86.sse2.cvtsd2ss",
  "llvm.x86.sse2.cvtsi2sd",
  "llvm.x86.sse2.cvtsi642sd",
  "llvm.x86.sse2.cvtss2sd",
  "llvm.x86.sse2.cvttpd2dq",
  "llvm.x86.sse2.cvttps2dq",
  "llvm.x86.sse2.cvttsd2si",
  "llvm.x86.sse2.cvttsd2si64",
  "llvm.x86.sse2.div.sd",
  "llvm.x86.sse2.lfence",
  "llvm.x86.sse2.loadu.dq",
  "llvm.x86.sse2.loadu.pd",
  "llvm.x86.sse2.maskmov.dqu",
  "llvm.x86.sse2.max.pd",
  "llvm.x86.sse2.max.sd",
  "llvm.x86.sse2.mfence",
  "llvm.x86.sse2.min.pd",
  "llvm.x86.sse2.min.sd",
  "llvm.x86.sse2.movmsk.pd",
  "llvm.x86.sse2.movnt.dq",
  "llvm.x86.sse2.movnt.i",
  "llvm.x86.sse2.movnt.pd",
  "llvm.x86.sse2.mul.sd",
  "llvm.x86.sse2.packssdw.128",
  "llvm.x86.sse2.packsswb.128",
  "llvm.x86.sse2.packuswb.128",
  "llvm.x86.sse2.padds.b",
  "llvm.x86.sse2.padds.w",
  "llvm.x86.sse2.paddus.b",
  "llvm.x86.sse2.paddus.w",
  "llvm.x86.sse2.pavg.b",
  "llvm.x86.sse2.pavg.w",
  "llvm.x86.sse2.pcmpeq.b",
  "llvm.x86.sse2.pcmpeq.d",
  "llvm.x86.sse2.pcmpeq.w",
  "llvm.x86.sse2.pcmpgt.b",
  "llvm.x86.sse2.pcmpgt.d",
  "llvm.x86.sse2.pcmpgt.w",
  "llvm.x86.sse2.pmadd.wd",
  "llvm.x86.sse2.pmaxs.w",
  "llvm.x86.sse2.pmaxu.b",
  "llvm.x86.sse2.pmins.w",
  "llvm.x86.sse2.pminu.b",
  "llvm.x86.sse2.pmovmskb.128",
  "llvm.x86.sse2.pmulh.w",
  "llvm.x86.sse2.pmulhu.w",
  "llvm.x86.sse2.pmulu.dq",
  "llvm.x86.sse2.psad.bw",
  "llvm.x86.sse2.psll.d",
  "llvm.x86.sse2.psll.dq",
  "llvm.x86.sse2.psll.dq.bs",
  "llvm.x86.sse2.psll.q",
  "llvm.x86.sse2.psll.w",
  "llvm.x86.sse2.pslli.d",
  "llvm.x86.sse2.pslli.q",
  "llvm.x86.sse2.pslli.w",
  "llvm.x86.sse2.psra.d",
  "llvm.x86.sse2.psra.w",
  "llvm.x86.sse2.psrai.d",
  "llvm.x86.sse2.psrai.w",
  "llvm.x86.sse2.psrl.d",
  "llvm.x86.sse2.psrl.dq",
  "llvm.x86.sse2.psrl.dq.bs",
  "llvm.x86.sse2.psrl.q",
  "llvm.x86.sse2.psrl.w",
  "llvm.x86.sse2.psrli.d",
  "llvm.x86.sse2.psrli.q",
  "llvm.x86.sse2.psrli.w",
  "llvm.x86.sse2.psubs.b",
  "llvm.x86.sse2.psubs.w",
  "llvm.x86.sse2.psubus.b",
  "llvm.x86.sse2.psubus.w",
  "llvm.x86.sse2.sqrt.pd",
  "llvm.x86.sse2.sqrt.sd",
  "llvm.x86.sse2.storel.dq",
  "llvm.x86.sse2.storeu.dq",
  "llvm.x86.sse2.storeu.pd",
  "llvm.x86.sse2.sub.sd",
  "llvm.x86.sse2.ucomieq.sd",
  "llvm.x86.sse2.ucomige.sd",
  "llvm.x86.sse2.ucomigt.sd",
  "llvm.x86.sse2.ucomile.sd",
  "llvm.x86.sse2.ucomilt.sd",
  "llvm.x86.sse2.ucomineq.sd",
  "llvm.x86.sse3.addsub.pd",
  "llvm.x86.sse3.addsub.ps",
  "llvm.x86.sse3.hadd.pd",
  "llvm.x86.sse3.hadd.ps",
  "llvm.x86.sse3.hsub.pd",
  "llvm.x86.sse3.hsub.ps",
  "llvm.x86.sse3.ldu.dq",
  "llvm.x86.sse3.monitor",
  "llvm.x86.sse3.mwait",
  "llvm.x86.sse41.blendpd",
  "llvm.x86.sse41.blendps",
  "llvm.x86.sse41.blendvpd",
  "llvm.x86.sse41.blendvps",
  "llvm.x86.sse41.dppd",
  "llvm.x86.sse41.dpps",
  "llvm.x86.sse41.extractps",
  "llvm.x86.sse41.insertps",
  "llvm.x86.sse41.movntdqa",
  "llvm.x86.sse41.mpsadbw",
  "llvm.x86.sse41.packusdw",
  "llvm.x86.sse41.pblendvb",
  "llvm.x86.sse41.pblendw",
  "llvm.x86.sse41.pcmpeqq",
  "llvm.x86.sse41.pextrb",
  "llvm.x86.sse41.pextrd",
  "llvm.x86.sse41.pextrq",
  "llvm.x86.sse41.phminposuw",
  "llvm.x86.sse41.pmaxsb",
  "llvm.x86.sse41.pmaxsd",
  "llvm.x86.sse41.pmaxud",
  "llvm.x86.sse41.pmaxuw",
  "llvm.x86.sse41.pminsb",
  "llvm.x86.sse41.pminsd",
  "llvm.x86.sse41.pminud",
  "llvm.x86.sse41.pminuw",
  "llvm.x86.sse41.pmovsxbd",
  "llvm.x86.sse41.pmovsxbq",
  "llvm.x86.sse41.pmovsxbw",
  "llvm.x86.sse41.pmovsxdq",
  "llvm.x86.sse41.pmovsxwd",
  "llvm.x86.sse41.pmovsxwq",
  "llvm.x86.sse41.pmovzxbd",
  "llvm.x86.sse41.pmovzxbq",
  "llvm.x86.sse41.pmovzxbw",
  "llvm.x86.sse41.pmovzxdq",
  "llvm.x86.sse41.pmovzxwd",
  "llvm.x86.sse41.pmovzxwq",
  "llvm.x86.sse41.pmuldq",
  "llvm.x86.sse41.ptestc",
  "llvm.x86.sse41.ptestnzc",
  "llvm.x86.sse41.ptestz",
  "llvm.x86.sse41.round.pd",
  "llvm.x86.sse41.round.ps",
  "llvm.x86.sse41.round.sd",
  "llvm.x86.sse41.round.ss",
  "llvm.x86.sse42.crc32.16",
  "llvm.x86.sse42.crc32.32",
  "llvm.x86.sse42.crc32.8",
  "llvm.x86.sse42.crc64.64",
  "llvm.x86.sse42.crc64.8",
  "llvm.x86.sse42.pcmpestri128",
  "llvm.x86.sse42.pcmpestria128",
  "llvm.x86.sse42.pcmpestric128",
  "llvm.x86.sse42.pcmpestrio128",
  "llvm.x86.sse42.pcmpestris128",
  "llvm.x86.sse42.pcmpestriz128",
  "llvm.x86.sse42.pcmpestrm128",
  "llvm.x86.sse42.pcmpgtq",
  "llvm.x86.sse42.pcmpistri128",
  "llvm.x86.sse42.pcmpistria128",
  "llvm.x86.sse42.pcmpistric128",
  "llvm.x86.sse42.pcmpistrio128",
  "llvm.x86.sse42.pcmpistris128",
  "llvm.x86.sse42.pcmpistriz128",
  "llvm.x86.sse42.pcmpistrm128",
  "llvm.x86.sse.add.ss",
  "llvm.x86.sse.cmp.ps",
  "llvm.x86.sse.cmp.ss",
  "llvm.x86.sse.comieq.ss",
  "llvm.x86.sse.comige.ss",
  "llvm.x86.sse.comigt.ss",
  "llvm.x86.sse.comile.ss",
  "llvm.x86.sse.comilt.ss",
  "llvm.x86.sse.comineq.ss",
  "llvm.x86.sse.cvtpd2pi",
  "llvm.x86.sse.cvtpi2pd",
  "llvm.x86.sse.cvtpi2ps",
  "llvm.x86.sse.cvtps2pi",
  "llvm.x86.sse.cvtsi2ss",
  "llvm.x86.sse.cvtsi642ss",
  "llvm.x86.sse.cvtss2si",
  "llvm.x86.sse.cvtss2si64",
  "llvm.x86.sse.cvttpd2pi",
  "llvm.x86.sse.cvttps2pi",
  "llvm.x86.sse.cvttss2si",
  "llvm.x86.sse.cvttss2si64",
  "llvm.x86.sse.div.ss",
  "llvm.x86.sse.ldmxcsr",
  "llvm.x86.sse.loadu.ps",
  "llvm.x86.sse.max.ps",
  "llvm.x86.sse.max.ss",
  "llvm.x86.sse.min.ps",
  "llvm.x86.sse.min.ss",
  "llvm.x86.sse.movmsk.ps",
  "llvm.x86.sse.movnt.ps",
  "llvm.x86.sse.mul.ss",
  "llvm.x86.sse.rcp.ps",
  "llvm.x86.sse.rcp.ss",
  "llvm.x86.sse.rsqrt.ps",
  "llvm.x86.sse.rsqrt.ss",
  "llvm.x86.sse.sfence",
  "llvm.x86.sse.sqrt.ps",
  "llvm.x86.sse.sqrt.ss",
  "llvm.x86.sse.stmxcsr",
  "llvm.x86.sse.storeu.ps",
  "llvm.x86.sse.sub.ss",
  "llvm.x86.sse.ucomieq.ss",
  "llvm.x86.sse.ucomige.ss",
  "llvm.x86.sse.ucomigt.ss",
  "llvm.x86.sse.ucomile.ss",
  "llvm.x86.sse.ucomilt.ss",
  "llvm.x86.sse.ucomineq.ss",
  "llvm.x86.ssse3.pabs.b",
  "llvm.x86.ssse3.pabs.b.128",
  "llvm.x86.ssse3.pabs.d",
  "llvm.x86.ssse3.pabs.d.128",
  "llvm.x86.ssse3.pabs.w",
  "llvm.x86.ssse3.pabs.w.128",
  "llvm.x86.ssse3.phadd.d",
  "llvm.x86.ssse3.phadd.d.128",
  "llvm.x86.ssse3.phadd.sw",
  "llvm.x86.ssse3.phadd.sw.128",
  "llvm.x86.ssse3.phadd.w",
  "llvm.x86.ssse3.phadd.w.128",
  "llvm.x86.ssse3.phsub.d",
  "llvm.x86.ssse3.phsub.d.128",
  "llvm.x86.ssse3.phsub.sw",
  "llvm.x86.ssse3.phsub.sw.128",
  "llvm.x86.ssse3.phsub.w",
  "llvm.x86.ssse3.phsub.w.128",
  "llvm.x86.ssse3.pmadd.ub.sw",
  "llvm.x86.ssse3.pmadd.ub.sw.128",
  "llvm.x86.ssse3.pmul.hr.sw",
  "llvm.x86.ssse3.pmul.hr.sw.128",
  "llvm.x86.ssse3.pshuf.b",
  "llvm.x86.ssse3.pshuf.b.128",
  "llvm.x86.ssse3.pshuf.w",
  "llvm.x86.ssse3.psign.b",
  "llvm.x86.ssse3.psign.b.128",
  "llvm.x86.ssse3.psign.d",
  "llvm.x86.ssse3.psign.d.128",
  "llvm.x86.ssse3.psign.w",
  "llvm.x86.ssse3.psign.w.128",
  "llvm.xcore.bitrev",
  "llvm.xcore.getid",
#endif

// Intrinsic ID to overload table
#ifdef GET_INTRINSIC_OVERLOAD_TABLE
  // Note that entry #0 is the invalid intrinsic!
  false,
  true,
  false,
  true,
  true,
  true,
  false,
  false,
  false,
  false,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  false,
  false,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  true,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  true,
  true,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  true,
  true,
  true,
  false,
  true,
  true,
  false,
  true,
  true,
  false,
  true,
  true,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
  false,
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#endif

// Function name -> enum value recognizer code.
#ifdef GET_FUNCTION_RECOGNIZER
  switch (Name[5]) {
  default:
    break;
  case 'a':
    if (Len == 16 && !memcmp(Name, "llvm.alpha.umulh", 16)) return Intrinsic::alpha_umulh;
    if (Len > 15 && !memcmp(Name, "llvm.annotation.", 16)) return Intrinsic::annotation;
    if (Len == 18 && !memcmp(Name, "llvm.arm.get.fpscr", 18)) return Intrinsic::arm_get_fpscr;
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vabds.", 20)) return Intrinsic::arm_neon_vabds;
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vabdu.", 20)) return Intrinsic::arm_neon_vabdu;
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vabs.", 19)) return Intrinsic::arm_neon_vabs;
    if (Len == 20 && !memcmp(Name, "llvm.arm.neon.vacged", 20)) return Intrinsic::arm_neon_vacged;
    if (Len == 20 && !memcmp(Name, "llvm.arm.neon.vacgeq", 20)) return Intrinsic::arm_neon_vacgeq;
    if (Len == 20 && !memcmp(Name, "llvm.arm.neon.vacgtd", 20)) return Intrinsic::arm_neon_vacgtd;
    if (Len == 20 && !memcmp(Name, "llvm.arm.neon.vacgtq", 20)) return Intrinsic::arm_neon_vacgtq;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vaddhn.", 21)) return Intrinsic::arm_neon_vaddhn;
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vcls.", 19)) return Intrinsic::arm_neon_vcls;
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vclz.", 19)) return Intrinsic::arm_neon_vclz;
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vcnt.", 19)) return Intrinsic::arm_neon_vcnt;
    if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vcvtfp2fxs.", 25)) return Intrinsic::arm_neon_vcvtfp2fxs;
    if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vcvtfp2fxu.", 25)) return Intrinsic::arm_neon_vcvtfp2fxu;
    if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vcvtfxs2fp.", 25)) return Intrinsic::arm_neon_vcvtfxs2fp;
    if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vcvtfxu2fp.", 25)) return Intrinsic::arm_neon_vcvtfxu2fp;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vhadds.", 21)) return Intrinsic::arm_neon_vhadds;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vhaddu.", 21)) return Intrinsic::arm_neon_vhaddu;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vhsubs.", 21)) return Intrinsic::arm_neon_vhsubs;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vhsubu.", 21)) return Intrinsic::arm_neon_vhsubu;
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vld1.", 19)) return Intrinsic::arm_neon_vld1;
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vld2.", 19)) return Intrinsic::arm_neon_vld2;
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vld2lane.", 23)) return Intrinsic::arm_neon_vld2lane;
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vld3.", 19)) return Intrinsic::arm_neon_vld3;
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vld3lane.", 23)) return Intrinsic::arm_neon_vld3lane;
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vld4.", 19)) return Intrinsic::arm_neon_vld4;
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vld4lane.", 23)) return Intrinsic::arm_neon_vld4lane;
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vmaxs.", 20)) return Intrinsic::arm_neon_vmaxs;
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vmaxu.", 20)) return Intrinsic::arm_neon_vmaxu;
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vmins.", 20)) return Intrinsic::arm_neon_vmins;
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vminu.", 20)) return Intrinsic::arm_neon_vminu;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vmullp.", 21)) return Intrinsic::arm_neon_vmullp;
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vmulp.", 20)) return Intrinsic::arm_neon_vmulp;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vpadals.", 22)) return Intrinsic::arm_neon_vpadals;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vpadalu.", 22)) return Intrinsic::arm_neon_vpadalu;
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vpadd.", 20)) return Intrinsic::arm_neon_vpadd;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vpaddls.", 22)) return Intrinsic::arm_neon_vpaddls;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vpaddlu.", 22)) return Intrinsic::arm_neon_vpaddlu;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vpmaxs.", 21)) return Intrinsic::arm_neon_vpmaxs;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vpmaxu.", 21)) return Intrinsic::arm_neon_vpmaxu;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vpmins.", 21)) return Intrinsic::arm_neon_vpmins;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vpminu.", 21)) return Intrinsic::arm_neon_vpminu;
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vqabs.", 20)) return Intrinsic::arm_neon_vqabs;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vqadds.", 21)) return Intrinsic::arm_neon_vqadds;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vqaddu.", 21)) return Intrinsic::arm_neon_vqaddu;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqdmlal.", 22)) return Intrinsic::arm_neon_vqdmlal;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqdmlsl.", 22)) return Intrinsic::arm_neon_vqdmlsl;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqdmulh.", 22)) return Intrinsic::arm_neon_vqdmulh;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqdmull.", 22)) return Intrinsic::arm_neon_vqdmull;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqmovns.", 22)) return Intrinsic::arm_neon_vqmovns;
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vqmovnsu.", 23)) return Intrinsic::arm_neon_vqmovnsu;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqmovnu.", 22)) return Intrinsic::arm_neon_vqmovnu;
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vqneg.", 20)) return Intrinsic::arm_neon_vqneg;
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vqrdmulh.", 23)) return Intrinsic::arm_neon_vqrdmulh;
    if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vqrshiftns.", 25)) return Intrinsic::arm_neon_vqrshiftns;
    if (Len > 25 && !memcmp(Name, "llvm.arm.neon.vqrshiftnsu.", 26)) return Intrinsic::arm_neon_vqrshiftnsu;
    if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vqrshiftnu.", 25)) return Intrinsic::arm_neon_vqrshiftnu;
    if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vqrshifts.", 24)) return Intrinsic::arm_neon_vqrshifts;
    if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vqrshiftu.", 24)) return Intrinsic::arm_neon_vqrshiftu;
    if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vqshiftns.", 24)) return Intrinsic::arm_neon_vqshiftns;
    if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vqshiftnsu.", 25)) return Intrinsic::arm_neon_vqshiftnsu;
    if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vqshiftnu.", 24)) return Intrinsic::arm_neon_vqshiftnu;
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vqshifts.", 23)) return Intrinsic::arm_neon_vqshifts;
    if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vqshiftsu.", 24)) return Intrinsic::arm_neon_vqshiftsu;
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vqshiftu.", 23)) return Intrinsic::arm_neon_vqshiftu;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vqsubs.", 21)) return Intrinsic::arm_neon_vqsubs;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vqsubu.", 21)) return Intrinsic::arm_neon_vqsubu;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vraddhn.", 22)) return Intrinsic::arm_neon_vraddhn;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vrecpe.", 21)) return Intrinsic::arm_neon_vrecpe;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vrecps.", 21)) return Intrinsic::arm_neon_vrecps;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vrhadds.", 22)) return Intrinsic::arm_neon_vrhadds;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vrhaddu.", 22)) return Intrinsic::arm_neon_vrhaddu;
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vrshiftn.", 23)) return Intrinsic::arm_neon_vrshiftn;
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vrshifts.", 23)) return Intrinsic::arm_neon_vrshifts;
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vrshiftu.", 23)) return Intrinsic::arm_neon_vrshiftu;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vrsqrte.", 22)) return Intrinsic::arm_neon_vrsqrte;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vrsqrts.", 22)) return Intrinsic::arm_neon_vrsqrts;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vrsubhn.", 22)) return Intrinsic::arm_neon_vrsubhn;
    if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vshiftins.", 24)) return Intrinsic::arm_neon_vshiftins;
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vshiftls.", 23)) return Intrinsic::arm_neon_vshiftls;
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vshiftlu.", 23)) return Intrinsic::arm_neon_vshiftlu;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vshiftn.", 22)) return Intrinsic::arm_neon_vshiftn;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vshifts.", 22)) return Intrinsic::arm_neon_vshifts;
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vshiftu.", 22)) return Intrinsic::arm_neon_vshiftu;
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vst1.", 19)) return Intrinsic::arm_neon_vst1;
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vst2.", 19)) return Intrinsic::arm_neon_vst2;
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vst2lane.", 23)) return Intrinsic::arm_neon_vst2lane;
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vst3.", 19)) return Intrinsic::arm_neon_vst3;
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vst3lane.", 23)) return Intrinsic::arm_neon_vst3lane;
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vst4.", 19)) return Intrinsic::arm_neon_vst4;
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vst4lane.", 23)) return Intrinsic::arm_neon_vst4lane;
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vsubhn.", 21)) return Intrinsic::arm_neon_vsubhn;
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbl1", 19)) return Intrinsic::arm_neon_vtbl1;
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbl2", 19)) return Intrinsic::arm_neon_vtbl2;
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbl3", 19)) return Intrinsic::arm_neon_vtbl3;
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbl4", 19)) return Intrinsic::arm_neon_vtbl4;
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbx1", 19)) return Intrinsic::arm_neon_vtbx1;
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbx2", 19)) return Intrinsic::arm_neon_vtbx2;
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbx3", 19)) return Intrinsic::arm_neon_vtbx3;
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbx4", 19)) return Intrinsic::arm_neon_vtbx4;
    if (Len == 13 && !memcmp(Name, "llvm.arm.qadd", 13)) return Intrinsic::arm_qadd;
    if (Len == 13 && !memcmp(Name, "llvm.arm.qsub", 13)) return Intrinsic::arm_qsub;
    if (Len == 18 && !memcmp(Name, "llvm.arm.set.fpscr", 18)) return Intrinsic::arm_set_fpscr;
    if (Len == 13 && !memcmp(Name, "llvm.arm.ssat", 13)) return Intrinsic::arm_ssat;
    if (Len == 23 && !memcmp(Name, "llvm.arm.thread.pointer", 23)) return Intrinsic::arm_thread_pointer;
    if (Len == 13 && !memcmp(Name, "llvm.arm.usat", 13)) return Intrinsic::arm_usat;
    if (Len > 14 && !memcmp(Name, "llvm.arm.vcvtr.", 15)) return Intrinsic::arm_vcvtr;
    if (Len > 15 && !memcmp(Name, "llvm.arm.vcvtru.", 16)) return Intrinsic::arm_vcvtru;
    if (Len > 20 && !memcmp(Name, "llvm.atomic.cmp.swap.", 21)) return Intrinsic::atomic_cmp_swap;
    if (Len > 20 && !memcmp(Name, "llvm.atomic.load.add.", 21)) return Intrinsic::atomic_load_add;
    if (Len > 20 && !memcmp(Name, "llvm.atomic.load.and.", 21)) return Intrinsic::atomic_load_and;
    if (Len > 20 && !memcmp(Name, "llvm.atomic.load.max.", 21)) return Intrinsic::atomic_load_max;
    if (Len > 20 && !memcmp(Name, "llvm.atomic.load.min.", 21)) return Intrinsic::atomic_load_min;
    if (Len > 21 && !memcmp(Name, "llvm.atomic.load.nand.", 22)) return Intrinsic::atomic_load_nand;
    if (Len > 19 && !memcmp(Name, "llvm.atomic.load.or.", 20)) return Intrinsic::atomic_load_or;
    if (Len > 20 && !memcmp(Name, "llvm.atomic.load.sub.", 21)) return Intrinsic::atomic_load_sub;
    if (Len > 21 && !memcmp(Name, "llvm.atomic.load.umax.", 22)) return Intrinsic::atomic_load_umax;
    if (Len > 21 && !memcmp(Name, "llvm.atomic.load.umin.", 22)) return Intrinsic::atomic_load_umin;
    if (Len > 20 && !memcmp(Name, "llvm.atomic.load.xor.", 21)) return Intrinsic::atomic_load_xor;
    if (Len > 16 && !memcmp(Name, "llvm.atomic.swap.", 17)) return Intrinsic::atomic_swap;
    break;
  case 'b':
    if (Len > 10 && !memcmp(Name, "llvm.bswap.", 11)) return Intrinsic::bswap;
    break;
  case 'c':
    if (Len == 22 && !memcmp(Name, "llvm.convert.from.fp16", 22)) return Intrinsic::convert_from_fp16;
    if (Len == 20 && !memcmp(Name, "llvm.convert.to.fp16", 20)) return Intrinsic::convert_to_fp16;
    if (Len > 14 && !memcmp(Name, "llvm.convertff.", 15)) return Intrinsic::convertff;
    if (Len > 15 && !memcmp(Name, "llvm.convertfsi.", 16)) return Intrinsic::convertfsi;
    if (Len > 15 && !memcmp(Name, "llvm.convertfui.", 16)) return Intrinsic::convertfui;
    if (Len > 15 && !memcmp(Name, "llvm.convertsif.", 16)) return Intrinsic::convertsif;
    if (Len > 14 && !memcmp(Name, "llvm.convertss.", 15)) return Intrinsic::convertss;
    if (Len > 14 && !memcmp(Name, "llvm.convertsu.", 15)) return Intrinsic::convertsu;
    if (Len > 15 && !memcmp(Name, "llvm.convertuif.", 16)) return Intrinsic::convertuif;
    if (Len > 14 && !memcmp(Name, "llvm.convertus.", 15)) return Intrinsic::convertus;
    if (Len > 14 && !memcmp(Name, "llvm.convertuu.", 15)) return Intrinsic::convertuu;
    if (Len > 8 && !memcmp(Name, "llvm.cos.", 9)) return Intrinsic::cos;
    if (Len > 9 && !memcmp(Name, "llvm.ctlz.", 10)) return Intrinsic::ctlz;
    if (Len > 10 && !memcmp(Name, "llvm.ctpop.", 11)) return Intrinsic::ctpop;
    if (Len > 9 && !memcmp(Name, "llvm.cttz.", 10)) return Intrinsic::cttz;
    break;
  case 'd':
    if (Len == 16 && !memcmp(Name, "llvm.dbg.declare", 16)) return Intrinsic::dbg_declare;
    if (Len == 14 && !memcmp(Name, "llvm.dbg.value", 14)) return Intrinsic::dbg_value;
    break;
  case 'e':
    if (Len == 17 && !memcmp(Name, "llvm.eh.dwarf.cfa", 17)) return Intrinsic::eh_dwarf_cfa;
    if (Len == 17 && !memcmp(Name, "llvm.eh.exception", 17)) return Intrinsic::eh_exception;
    if (Len == 18 && !memcmp(Name, "llvm.eh.return.i32", 18)) return Intrinsic::eh_return_i32;
    if (Len == 18 && !memcmp(Name, "llvm.eh.return.i64", 18)) return Intrinsic::eh_return_i64;
    if (Len == 16 && !memcmp(Name, "llvm.eh.selector", 16)) return Intrinsic::eh_selector;
    if (Len == 21 && !memcmp(Name, "llvm.eh.sjlj.callsite", 21)) return Intrinsic::eh_sjlj_callsite;
    if (Len == 20 && !memcmp(Name, "llvm.eh.sjlj.longjmp", 20)) return Intrinsic::eh_sjlj_longjmp;
    if (Len == 17 && !memcmp(Name, "llvm.eh.sjlj.lsda", 17)) return Intrinsic::eh_sjlj_lsda;
    if (Len == 19 && !memcmp(Name, "llvm.eh.sjlj.setjmp", 19)) return Intrinsic::eh_sjlj_setjmp;
    if (Len == 18 && !memcmp(Name, "llvm.eh.typeid.for", 18)) return Intrinsic::eh_typeid_for;
    if (Len == 19 && !memcmp(Name, "llvm.eh.unwind.init", 19)) return Intrinsic::eh_unwind_init;
    if (Len > 8 && !memcmp(Name, "llvm.exp.", 9)) return Intrinsic::exp;
    if (Len > 9 && !memcmp(Name, "llvm.exp2.", 10)) return Intrinsic::exp2;
    break;
  case 'f':
    if (Len == 15 && !memcmp(Name, "llvm.flt.rounds", 15)) return Intrinsic::flt_rounds;
    if (Len == 17 && !memcmp(Name, "llvm.frameaddress", 17)) return Intrinsic::frameaddress;
    break;
  case 'g':
    if (Len == 11 && !memcmp(Name, "llvm.gcread", 11)) return Intrinsic::gcread;
    if (Len == 11 && !memcmp(Name, "llvm.gcroot", 11)) return Intrinsic::gcroot;
    if (Len == 12 && !memcmp(Name, "llvm.gcwrite", 12)) return Intrinsic::gcwrite;
    break;
  case 'i':
    if (Len == 20 && !memcmp(Name, "llvm.init.trampoline", 20)) return Intrinsic::init_trampoline;
    if (Len == 18 && !memcmp(Name, "llvm.invariant.end", 18)) return Intrinsic::invariant_end;
    if (Len == 20 && !memcmp(Name, "llvm.invariant.start", 20)) return Intrinsic::invariant_start;
    break;
  case 'l':
    if (Len == 17 && !memcmp(Name, "llvm.lifetime.end", 17)) return Intrinsic::lifetime_end;
    if (Len == 19 && !memcmp(Name, "llvm.lifetime.start", 19)) return Intrinsic::lifetime_start;
    if (Len > 8 && !memcmp(Name, "llvm.log.", 9)) return Intrinsic::log;
    if (Len > 10 && !memcmp(Name, "llvm.log10.", 11)) return Intrinsic::log10;
    if (Len > 9 && !memcmp(Name, "llvm.log2.", 10)) return Intrinsic::log2;
    if (Len == 12 && !memcmp(Name, "llvm.longjmp", 12)) return Intrinsic::longjmp;
    break;
  case 'm':
    if (Len > 11 && !memcmp(Name, "llvm.memcpy.", 12)) return Intrinsic::memcpy;
    if (Len > 12 && !memcmp(Name, "llvm.memmove.", 13)) return Intrinsic::memmove;
    if (Len == 19 && !memcmp(Name, "llvm.memory.barrier", 19)) return Intrinsic::memory_barrier;
    if (Len > 11 && !memcmp(Name, "llvm.memset.", 12)) return Intrinsic::memset;
    break;
  case 'o':
    if (Len > 15 && !memcmp(Name, "llvm.objectsize.", 16)) return Intrinsic::objectsize;
    break;
  case 'p':
    if (Len == 13 && !memcmp(Name, "llvm.pcmarker", 13)) return Intrinsic::pcmarker;
    if (Len > 8 && !memcmp(Name, "llvm.pow.", 9)) return Intrinsic::pow;
    if (Len > 9 && !memcmp(Name, "llvm.powi.", 10)) return Intrinsic::powi;
    if (Len == 20 && !memcmp(Name, "llvm.ppc.altivec.dss", 20)) return Intrinsic::ppc_altivec_dss;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.dssall", 23)) return Intrinsic::ppc_altivec_dssall;
    if (Len == 20 && !memcmp(Name, "llvm.ppc.altivec.dst", 20)) return Intrinsic::ppc_altivec_dst;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.dstst", 22)) return Intrinsic::ppc_altivec_dstst;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.dststt", 23)) return Intrinsic::ppc_altivec_dststt;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.dstt", 21)) return Intrinsic::ppc_altivec_dstt;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.lvebx", 22)) return Intrinsic::ppc_altivec_lvebx;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.lvehx", 22)) return Intrinsic::ppc_altivec_lvehx;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.lvewx", 22)) return Intrinsic::ppc_altivec_lvewx;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.lvsl", 21)) return Intrinsic::ppc_altivec_lvsl;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.lvsr", 21)) return Intrinsic::ppc_altivec_lvsr;
    if (Len == 20 && !memcmp(Name, "llvm.ppc.altivec.lvx", 20)) return Intrinsic::ppc_altivec_lvx;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.lvxl", 21)) return Intrinsic::ppc_altivec_lvxl;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.mfvscr", 23)) return Intrinsic::ppc_altivec_mfvscr;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.mtvscr", 23)) return Intrinsic::ppc_altivec_mtvscr;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.stvebx", 23)) return Intrinsic::ppc_altivec_stvebx;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.stvehx", 23)) return Intrinsic::ppc_altivec_stvehx;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.stvewx", 23)) return Intrinsic::ppc_altivec_stvewx;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.stvx", 21)) return Intrinsic::ppc_altivec_stvx;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.stvxl", 22)) return Intrinsic::ppc_altivec_stvxl;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vaddcuw", 24)) return Intrinsic::ppc_altivec_vaddcuw;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vaddsbs", 24)) return Intrinsic::ppc_altivec_vaddsbs;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vaddshs", 24)) return Intrinsic::ppc_altivec_vaddshs;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vaddsws", 24)) return Intrinsic::ppc_altivec_vaddsws;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vaddubs", 24)) return Intrinsic::ppc_altivec_vaddubs;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vadduhs", 24)) return Intrinsic::ppc_altivec_vadduhs;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vadduws", 24)) return Intrinsic::ppc_altivec_vadduws;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavgsb", 23)) return Intrinsic::ppc_altivec_vavgsb;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavgsh", 23)) return Intrinsic::ppc_altivec_vavgsh;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavgsw", 23)) return Intrinsic::ppc_altivec_vavgsw;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavgub", 23)) return Intrinsic::ppc_altivec_vavgub;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavguh", 23)) return Intrinsic::ppc_altivec_vavguh;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavguw", 23)) return Intrinsic::ppc_altivec_vavguw;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vcfsx", 22)) return Intrinsic::ppc_altivec_vcfsx;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vcfux", 22)) return Intrinsic::ppc_altivec_vcfux;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vcmpbfp", 24)) return Intrinsic::ppc_altivec_vcmpbfp;
    if (Len == 26 && !memcmp(Name, "llvm.ppc.altivec.vcmpbfp.p", 26)) return Intrinsic::ppc_altivec_vcmpbfp_p;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpeqfp", 25)) return Intrinsic::ppc_altivec_vcmpeqfp;
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpeqfp.p", 27)) return Intrinsic::ppc_altivec_vcmpeqfp_p;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpequb", 25)) return Intrinsic::ppc_altivec_vcmpequb;
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpequb.p", 27)) return Intrinsic::ppc_altivec_vcmpequb_p;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpequh", 25)) return Intrinsic::ppc_altivec_vcmpequh;
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpequh.p", 27)) return Intrinsic::ppc_altivec_vcmpequh_p;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpequw", 25)) return Intrinsic::ppc_altivec_vcmpequw;
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpequw.p", 27)) return Intrinsic::ppc_altivec_vcmpequw_p;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgefp", 25)) return Intrinsic::ppc_altivec_vcmpgefp;
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgefp.p", 27)) return Intrinsic::ppc_altivec_vcmpgefp_p;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtfp", 25)) return Intrinsic::ppc_altivec_vcmpgtfp;
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtfp.p", 27)) return Intrinsic::ppc_altivec_vcmpgtfp_p;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsb", 25)) return Intrinsic::ppc_altivec_vcmpgtsb;
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsb.p", 27)) return Intrinsic::ppc_altivec_vcmpgtsb_p;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsh", 25)) return Intrinsic::ppc_altivec_vcmpgtsh;
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsh.p", 27)) return Intrinsic::ppc_altivec_vcmpgtsh_p;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsw", 25)) return Intrinsic::ppc_altivec_vcmpgtsw;
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsw.p", 27)) return Intrinsic::ppc_altivec_vcmpgtsw_p;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtub", 25)) return Intrinsic::ppc_altivec_vcmpgtub;
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtub.p", 27)) return Intrinsic::ppc_altivec_vcmpgtub_p;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtuh", 25)) return Intrinsic::ppc_altivec_vcmpgtuh;
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtuh.p", 27)) return Intrinsic::ppc_altivec_vcmpgtuh_p;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtuw", 25)) return Intrinsic::ppc_altivec_vcmpgtuw;
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtuw.p", 27)) return Intrinsic::ppc_altivec_vcmpgtuw_p;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vctsxs", 23)) return Intrinsic::ppc_altivec_vctsxs;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vctuxs", 23)) return Intrinsic::ppc_altivec_vctuxs;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vexptefp", 25)) return Intrinsic::ppc_altivec_vexptefp;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vlogefp", 24)) return Intrinsic::ppc_altivec_vlogefp;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmaddfp", 24)) return Intrinsic::ppc_altivec_vmaddfp;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxfp", 23)) return Intrinsic::ppc_altivec_vmaxfp;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxsb", 23)) return Intrinsic::ppc_altivec_vmaxsb;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxsh", 23)) return Intrinsic::ppc_altivec_vmaxsh;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxsw", 23)) return Intrinsic::ppc_altivec_vmaxsw;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxub", 23)) return Intrinsic::ppc_altivec_vmaxub;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxuh", 23)) return Intrinsic::ppc_altivec_vmaxuh;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxuw", 23)) return Intrinsic::ppc_altivec_vmaxuw;
    if (Len == 26 && !memcmp(Name, "llvm.ppc.altivec.vmhaddshs", 26)) return Intrinsic::ppc_altivec_vmhaddshs;
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vmhraddshs", 27)) return Intrinsic::ppc_altivec_vmhraddshs;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminfp", 23)) return Intrinsic::ppc_altivec_vminfp;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminsb", 23)) return Intrinsic::ppc_altivec_vminsb;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminsh", 23)) return Intrinsic::ppc_altivec_vminsh;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminsw", 23)) return Intrinsic::ppc_altivec_vminsw;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminub", 23)) return Intrinsic::ppc_altivec_vminub;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminuh", 23)) return Intrinsic::ppc_altivec_vminuh;
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminuw", 23)) return Intrinsic::ppc_altivec_vminuw;
    if (Len == 26 && !memcmp(Name, "llvm.ppc.altivec.vmladduhm", 26)) return Intrinsic::ppc_altivec_vmladduhm;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsummbm", 25)) return Intrinsic::ppc_altivec_vmsummbm;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsumshm", 25)) return Intrinsic::ppc_altivec_vmsumshm;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsumshs", 25)) return Intrinsic::ppc_altivec_vmsumshs;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsumubm", 25)) return Intrinsic::ppc_altivec_vmsumubm;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsumuhm", 25)) return Intrinsic::ppc_altivec_vmsumuhm;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsumuhs", 25)) return Intrinsic::ppc_altivec_vmsumuhs;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmulesb", 24)) return Intrinsic::ppc_altivec_vmulesb;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmulesh", 24)) return Intrinsic::ppc_altivec_vmulesh;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmuleub", 24)) return Intrinsic::ppc_altivec_vmuleub;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmuleuh", 24)) return Intrinsic::ppc_altivec_vmuleuh;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmulosb", 24)) return Intrinsic::ppc_altivec_vmulosb;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmulosh", 24)) return Intrinsic::ppc_altivec_vmulosh;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmuloub", 24)) return Intrinsic::ppc_altivec_vmuloub;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmulouh", 24)) return Intrinsic::ppc_altivec_vmulouh;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vnmsubfp", 25)) return Intrinsic::ppc_altivec_vnmsubfp;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vperm", 22)) return Intrinsic::ppc_altivec_vperm;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vpkpx", 22)) return Intrinsic::ppc_altivec_vpkpx;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkshss", 24)) return Intrinsic::ppc_altivec_vpkshss;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkshus", 24)) return Intrinsic::ppc_altivec_vpkshus;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkswss", 24)) return Intrinsic::ppc_altivec_vpkswss;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkswus", 24)) return Intrinsic::ppc_altivec_vpkswus;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkuhus", 24)) return Intrinsic::ppc_altivec_vpkuhus;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkuwus", 24)) return Intrinsic::ppc_altivec_vpkuwus;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vrefp", 22)) return Intrinsic::ppc_altivec_vrefp;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vrfim", 22)) return Intrinsic::ppc_altivec_vrfim;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vrfin", 22)) return Intrinsic::ppc_altivec_vrfin;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vrfip", 22)) return Intrinsic::ppc_altivec_vrfip;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vrfiz", 22)) return Intrinsic::ppc_altivec_vrfiz;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vrlb", 21)) return Intrinsic::ppc_altivec_vrlb;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vrlh", 21)) return Intrinsic::ppc_altivec_vrlh;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vrlw", 21)) return Intrinsic::ppc_altivec_vrlw;
    if (Len == 26 && !memcmp(Name, "llvm.ppc.altivec.vrsqrtefp", 26)) return Intrinsic::ppc_altivec_vrsqrtefp;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vsel", 21)) return Intrinsic::ppc_altivec_vsel;
    if (Len == 20 && !memcmp(Name, "llvm.ppc.altivec.vsl", 20)) return Intrinsic::ppc_altivec_vsl;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vslb", 21)) return Intrinsic::ppc_altivec_vslb;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vslh", 21)) return Intrinsic::ppc_altivec_vslh;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vslo", 21)) return Intrinsic::ppc_altivec_vslo;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vslw", 21)) return Intrinsic::ppc_altivec_vslw;
    if (Len == 20 && !memcmp(Name, "llvm.ppc.altivec.vsr", 20)) return Intrinsic::ppc_altivec_vsr;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vsrab", 22)) return Intrinsic::ppc_altivec_vsrab;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vsrah", 22)) return Intrinsic::ppc_altivec_vsrah;
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vsraw", 22)) return Intrinsic::ppc_altivec_vsraw;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vsrb", 21)) return Intrinsic::ppc_altivec_vsrb;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vsrh", 21)) return Intrinsic::ppc_altivec_vsrh;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vsro", 21)) return Intrinsic::ppc_altivec_vsro;
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vsrw", 21)) return Intrinsic::ppc_altivec_vsrw;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubcuw", 24)) return Intrinsic::ppc_altivec_vsubcuw;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubsbs", 24)) return Intrinsic::ppc_altivec_vsubsbs;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubshs", 24)) return Intrinsic::ppc_altivec_vsubshs;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubsws", 24)) return Intrinsic::ppc_altivec_vsubsws;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsububs", 24)) return Intrinsic::ppc_altivec_vsububs;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubuhs", 24)) return Intrinsic::ppc_altivec_vsubuhs;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubuws", 24)) return Intrinsic::ppc_altivec_vsubuws;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vsum2sws", 25)) return Intrinsic::ppc_altivec_vsum2sws;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vsum4sbs", 25)) return Intrinsic::ppc_altivec_vsum4sbs;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vsum4shs", 25)) return Intrinsic::ppc_altivec_vsum4shs;
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vsum4ubs", 25)) return Intrinsic::ppc_altivec_vsum4ubs;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsumsws", 24)) return Intrinsic::ppc_altivec_vsumsws;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupkhpx", 24)) return Intrinsic::ppc_altivec_vupkhpx;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupkhsb", 24)) return Intrinsic::ppc_altivec_vupkhsb;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupkhsh", 24)) return Intrinsic::ppc_altivec_vupkhsh;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupklpx", 24)) return Intrinsic::ppc_altivec_vupklpx;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupklsb", 24)) return Intrinsic::ppc_altivec_vupklsb;
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupklsh", 24)) return Intrinsic::ppc_altivec_vupklsh;
    if (Len == 13 && !memcmp(Name, "llvm.ppc.dcba", 13)) return Intrinsic::ppc_dcba;
    if (Len == 13 && !memcmp(Name, "llvm.ppc.dcbf", 13)) return Intrinsic::ppc_dcbf;
    if (Len == 13 && !memcmp(Name, "llvm.ppc.dcbi", 13)) return Intrinsic::ppc_dcbi;
    if (Len == 14 && !memcmp(Name, "llvm.ppc.dcbst", 14)) return Intrinsic::ppc_dcbst;
    if (Len == 13 && !memcmp(Name, "llvm.ppc.dcbt", 13)) return Intrinsic::ppc_dcbt;
    if (Len == 15 && !memcmp(Name, "llvm.ppc.dcbtst", 15)) return Intrinsic::ppc_dcbtst;
    if (Len == 13 && !memcmp(Name, "llvm.ppc.dcbz", 13)) return Intrinsic::ppc_dcbz;
    if (Len == 14 && !memcmp(Name, "llvm.ppc.dcbzl", 14)) return Intrinsic::ppc_dcbzl;
    if (Len == 13 && !memcmp(Name, "llvm.ppc.sync", 13)) return Intrinsic::ppc_sync;
    if (Len == 13 && !memcmp(Name, "llvm.prefetch", 13)) return Intrinsic::prefetch;
    if (Len > 19 && !memcmp(Name, "llvm.ptr.annotation.", 20)) return Intrinsic::ptr_annotation;
    break;
  case 'r':
    if (Len == 21 && !memcmp(Name, "llvm.readcyclecounter", 21)) return Intrinsic::readcyclecounter;
    if (Len == 18 && !memcmp(Name, "llvm.returnaddress", 18)) return Intrinsic::returnaddress;
    break;
  case 's':
    if (Len > 23 && !memcmp(Name, "llvm.sadd.with.overflow.", 24)) return Intrinsic::sadd_with_overflow;
    if (Len == 11 && !memcmp(Name, "llvm.setjmp", 11)) return Intrinsic::setjmp;
    if (Len == 15 && !memcmp(Name, "llvm.siglongjmp", 15)) return Intrinsic::siglongjmp;
    if (Len == 14 && !memcmp(Name, "llvm.sigsetjmp", 14)) return Intrinsic::sigsetjmp;
    if (Len > 8 && !memcmp(Name, "llvm.sin.", 9)) return Intrinsic::sin;
    if (Len > 23 && !memcmp(Name, "llvm.smul.with.overflow.", 24)) return Intrinsic::smul_with_overflow;
    if (Len == 13 && !memcmp(Name, "llvm.spu.si.a", 13)) return Intrinsic::spu_si_a;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.addx", 16)) return Intrinsic::spu_si_addx;
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.ah", 14)) return Intrinsic::spu_si_ah;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.ahi", 15)) return Intrinsic::spu_si_ahi;
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.ai", 14)) return Intrinsic::spu_si_ai;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.and", 15)) return Intrinsic::spu_si_and;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.andbi", 17)) return Intrinsic::spu_si_andbi;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.andc", 16)) return Intrinsic::spu_si_andc;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.andhi", 17)) return Intrinsic::spu_si_andhi;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.andi", 16)) return Intrinsic::spu_si_andi;
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.bg", 14)) return Intrinsic::spu_si_bg;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.bgx", 15)) return Intrinsic::spu_si_bgx;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.ceq", 15)) return Intrinsic::spu_si_ceq;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.ceqb", 16)) return Intrinsic::spu_si_ceqb;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.ceqbi", 17)) return Intrinsic::spu_si_ceqbi;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.ceqh", 16)) return Intrinsic::spu_si_ceqh;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.ceqhi", 17)) return Intrinsic::spu_si_ceqhi;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.ceqi", 16)) return Intrinsic::spu_si_ceqi;
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.cg", 14)) return Intrinsic::spu_si_cg;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.cgt", 15)) return Intrinsic::spu_si_cgt;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.cgtb", 16)) return Intrinsic::spu_si_cgtb;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.cgtbi", 17)) return Intrinsic::spu_si_cgtbi;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.cgth", 16)) return Intrinsic::spu_si_cgth;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.cgthi", 17)) return Intrinsic::spu_si_cgthi;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.cgti", 16)) return Intrinsic::spu_si_cgti;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.cgx", 15)) return Intrinsic::spu_si_cgx;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.clgt", 16)) return Intrinsic::spu_si_clgt;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.clgtb", 17)) return Intrinsic::spu_si_clgtb;
    if (Len == 18 && !memcmp(Name, "llvm.spu.si.clgtbi", 18)) return Intrinsic::spu_si_clgtbi;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.clgth", 17)) return Intrinsic::spu_si_clgth;
    if (Len == 18 && !memcmp(Name, "llvm.spu.si.clgthi", 18)) return Intrinsic::spu_si_clgthi;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.clgti", 17)) return Intrinsic::spu_si_clgti;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.dfa", 15)) return Intrinsic::spu_si_dfa;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.dfm", 15)) return Intrinsic::spu_si_dfm;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.dfma", 16)) return Intrinsic::spu_si_dfma;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.dfms", 16)) return Intrinsic::spu_si_dfms;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.dfnma", 17)) return Intrinsic::spu_si_dfnma;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.dfnms", 17)) return Intrinsic::spu_si_dfnms;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.dfs", 15)) return Intrinsic::spu_si_dfs;
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.fa", 14)) return Intrinsic::spu_si_fa;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.fceq", 16)) return Intrinsic::spu_si_fceq;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.fcgt", 16)) return Intrinsic::spu_si_fcgt;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.fcmeq", 17)) return Intrinsic::spu_si_fcmeq;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.fcmgt", 17)) return Intrinsic::spu_si_fcmgt;
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.fm", 14)) return Intrinsic::spu_si_fm;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.fma", 15)) return Intrinsic::spu_si_fma;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.fms", 15)) return Intrinsic::spu_si_fms;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.fnms", 16)) return Intrinsic::spu_si_fnms;
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.fs", 14)) return Intrinsic::spu_si_fs;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.fsmbi", 17)) return Intrinsic::spu_si_fsmbi;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.mpy", 15)) return Intrinsic::spu_si_mpy;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.mpya", 16)) return Intrinsic::spu_si_mpya;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.mpyh", 16)) return Intrinsic::spu_si_mpyh;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.mpyhh", 17)) return Intrinsic::spu_si_mpyhh;
    if (Len == 18 && !memcmp(Name, "llvm.spu.si.mpyhha", 18)) return Intrinsic::spu_si_mpyhha;
    if (Len == 19 && !memcmp(Name, "llvm.spu.si.mpyhhau", 19)) return Intrinsic::spu_si_mpyhhau;
    if (Len == 18 && !memcmp(Name, "llvm.spu.si.mpyhhu", 18)) return Intrinsic::spu_si_mpyhhu;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.mpyi", 16)) return Intrinsic::spu_si_mpyi;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.mpys", 16)) return Intrinsic::spu_si_mpys;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.mpyu", 16)) return Intrinsic::spu_si_mpyu;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.mpyui", 17)) return Intrinsic::spu_si_mpyui;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.nand", 16)) return Intrinsic::spu_si_nand;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.nor", 15)) return Intrinsic::spu_si_nor;
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.or", 14)) return Intrinsic::spu_si_or;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.orbi", 16)) return Intrinsic::spu_si_orbi;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.orc", 15)) return Intrinsic::spu_si_orc;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.orhi", 16)) return Intrinsic::spu_si_orhi;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.ori", 15)) return Intrinsic::spu_si_ori;
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.sf", 14)) return Intrinsic::spu_si_sf;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.sfh", 15)) return Intrinsic::spu_si_sfh;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.sfhi", 16)) return Intrinsic::spu_si_sfhi;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.sfi", 15)) return Intrinsic::spu_si_sfi;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.sfx", 15)) return Intrinsic::spu_si_sfx;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.shli", 16)) return Intrinsic::spu_si_shli;
    if (Len == 18 && !memcmp(Name, "llvm.spu.si.shlqbi", 18)) return Intrinsic::spu_si_shlqbi;
    if (Len == 19 && !memcmp(Name, "llvm.spu.si.shlqbii", 19)) return Intrinsic::spu_si_shlqbii;
    if (Len == 18 && !memcmp(Name, "llvm.spu.si.shlqby", 18)) return Intrinsic::spu_si_shlqby;
    if (Len == 19 && !memcmp(Name, "llvm.spu.si.shlqbyi", 19)) return Intrinsic::spu_si_shlqbyi;
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.xor", 15)) return Intrinsic::spu_si_xor;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.xorbi", 17)) return Intrinsic::spu_si_xorbi;
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.xorhi", 17)) return Intrinsic::spu_si_xorhi;
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.xori", 16)) return Intrinsic::spu_si_xori;
    if (Len > 9 && !memcmp(Name, "llvm.sqrt.", 10)) return Intrinsic::sqrt;
    if (Len > 23 && !memcmp(Name, "llvm.ssub.with.overflow.", 24)) return Intrinsic::ssub_with_overflow;
    if (Len == 19 && !memcmp(Name, "llvm.stackprotector", 19)) return Intrinsic::stackprotector;
    if (Len == 17 && !memcmp(Name, "llvm.stackrestore", 17)) return Intrinsic::stackrestore;
    if (Len == 14 && !memcmp(Name, "llvm.stacksave", 14)) return Intrinsic::stacksave;
    break;
  case 't':
    if (Len == 9 && !memcmp(Name, "llvm.trap", 9)) return Intrinsic::trap;
    break;
  case 'u':
    if (Len > 23 && !memcmp(Name, "llvm.uadd.with.overflow.", 24)) return Intrinsic::uadd_with_overflow;
    if (Len > 23 && !memcmp(Name, "llvm.umul.with.overflow.", 24)) return Intrinsic::umul_with_overflow;
    if (Len > 23 && !memcmp(Name, "llvm.usub.with.overflow.", 24)) return Intrinsic::usub_with_overflow;
    break;
  case 'v':
    if (Len == 12 && !memcmp(Name, "llvm.va_copy", 12)) return Intrinsic::vacopy;
    if (Len == 11 && !memcmp(Name, "llvm.va_end", 11)) return Intrinsic::vaend;
    if (Len == 13 && !memcmp(Name, "llvm.va_start", 13)) return Intrinsic::vastart;
    if (Len == 19 && !memcmp(Name, "llvm.var.annotation", 19)) return Intrinsic::var_annotation;
    break;
  case 'x':
    if (Len == 21 && !memcmp(Name, "llvm.x86.aesni.aesdec", 21)) return Intrinsic::x86_aesni_aesdec;
    if (Len == 25 && !memcmp(Name, "llvm.x86.aesni.aesdeclast", 25)) return Intrinsic::x86_aesni_aesdeclast;
    if (Len == 21 && !memcmp(Name, "llvm.x86.aesni.aesenc", 21)) return Intrinsic::x86_aesni_aesenc;
    if (Len == 25 && !memcmp(Name, "llvm.x86.aesni.aesenclast", 25)) return Intrinsic::x86_aesni_aesenclast;
    if (Len == 21 && !memcmp(Name, "llvm.x86.aesni.aesimc", 21)) return Intrinsic::x86_aesni_aesimc;
    if (Len == 30 && !memcmp(Name, "llvm.x86.aesni.aeskeygenassist", 30)) return Intrinsic::x86_aesni_aeskeygenassist;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.addsub.pd.256", 26)) return Intrinsic::x86_avx_addsub_pd_256;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.addsub.ps.256", 26)) return Intrinsic::x86_avx_addsub_ps_256;
    if (Len == 25 && !memcmp(Name, "llvm.x86.avx.blend.pd.256", 25)) return Intrinsic::x86_avx_blend_pd_256;
    if (Len == 25 && !memcmp(Name, "llvm.x86.avx.blend.ps.256", 25)) return Intrinsic::x86_avx_blend_ps_256;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.blendv.pd.256", 26)) return Intrinsic::x86_avx_blendv_pd_256;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.blendv.ps.256", 26)) return Intrinsic::x86_avx_blendv_ps_256;
    if (Len == 23 && !memcmp(Name, "llvm.x86.avx.cmp.pd.256", 23)) return Intrinsic::x86_avx_cmp_pd_256;
    if (Len == 23 && !memcmp(Name, "llvm.x86.avx.cmp.ps.256", 23)) return Intrinsic::x86_avx_cmp_ps_256;
    if (Len == 27 && !memcmp(Name, "llvm.x86.avx.cvt.pd2.ps.256", 27)) return Intrinsic::x86_avx_cvt_pd2_ps_256;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.cvt.pd2dq.256", 26)) return Intrinsic::x86_avx_cvt_pd2dq_256;
    if (Len == 27 && !memcmp(Name, "llvm.x86.avx.cvt.ps2.pd.256", 27)) return Intrinsic::x86_avx_cvt_ps2_pd_256;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.cvt.ps2dq.256", 26)) return Intrinsic::x86_avx_cvt_ps2dq_256;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.cvtdq2.pd.256", 26)) return Intrinsic::x86_avx_cvtdq2_pd_256;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.cvtdq2.ps.256", 26)) return Intrinsic::x86_avx_cvtdq2_ps_256;
    if (Len == 27 && !memcmp(Name, "llvm.x86.avx.cvtt.pd2dq.256", 27)) return Intrinsic::x86_avx_cvtt_pd2dq_256;
    if (Len == 27 && !memcmp(Name, "llvm.x86.avx.cvtt.ps2dq.256", 27)) return Intrinsic::x86_avx_cvtt_ps2dq_256;
    if (Len == 22 && !memcmp(Name, "llvm.x86.avx.dp.ps.256", 22)) return Intrinsic::x86_avx_dp_ps_256;
    if (Len == 24 && !memcmp(Name, "llvm.x86.avx.hadd.pd.256", 24)) return Intrinsic::x86_avx_hadd_pd_256;
    if (Len == 24 && !memcmp(Name, "llvm.x86.avx.hadd.ps.256", 24)) return Intrinsic::x86_avx_hadd_ps_256;
    if (Len == 24 && !memcmp(Name, "llvm.x86.avx.hsub.pd.256", 24)) return Intrinsic::x86_avx_hsub_pd_256;
    if (Len == 24 && !memcmp(Name, "llvm.x86.avx.hsub.ps.256", 24)) return Intrinsic::x86_avx_hsub_ps_256;
    if (Len == 23 && !memcmp(Name, "llvm.x86.avx.ldu.dq.256", 23)) return Intrinsic::x86_avx_ldu_dq_256;
    if (Len == 25 && !memcmp(Name, "llvm.x86.avx.loadu.dq.256", 25)) return Intrinsic::x86_avx_loadu_dq_256;
    if (Len == 25 && !memcmp(Name, "llvm.x86.avx.loadu.pd.256", 25)) return Intrinsic::x86_avx_loadu_pd_256;
    if (Len == 25 && !memcmp(Name, "llvm.x86.avx.loadu.ps.256", 25)) return Intrinsic::x86_avx_loadu_ps_256;
    if (Len == 24 && !memcmp(Name, "llvm.x86.avx.maskload.pd", 24)) return Intrinsic::x86_avx_maskload_pd;
    if (Len == 28 && !memcmp(Name, "llvm.x86.avx.maskload.pd.256", 28)) return Intrinsic::x86_avx_maskload_pd_256;
    if (Len == 24 && !memcmp(Name, "llvm.x86.avx.maskload.ps", 24)) return Intrinsic::x86_avx_maskload_ps;
    if (Len == 28 && !memcmp(Name, "llvm.x86.avx.maskload.ps.256", 28)) return Intrinsic::x86_avx_maskload_ps_256;
    if (Len == 25 && !memcmp(Name, "llvm.x86.avx.maskstore.pd", 25)) return Intrinsic::x86_avx_maskstore_pd;
    if (Len == 29 && !memcmp(Name, "llvm.x86.avx.maskstore.pd.256", 29)) return Intrinsic::x86_avx_maskstore_pd_256;
    if (Len == 25 && !memcmp(Name, "llvm.x86.avx.maskstore.ps", 25)) return Intrinsic::x86_avx_maskstore_ps;
    if (Len == 29 && !memcmp(Name, "llvm.x86.avx.maskstore.ps.256", 29)) return Intrinsic::x86_avx_maskstore_ps_256;
    if (Len == 23 && !memcmp(Name, "llvm.x86.avx.max.pd.256", 23)) return Intrinsic::x86_avx_max_pd_256;
    if (Len == 23 && !memcmp(Name, "llvm.x86.avx.max.ps.256", 23)) return Intrinsic::x86_avx_max_ps_256;
    if (Len == 23 && !memcmp(Name, "llvm.x86.avx.min.pd.256", 23)) return Intrinsic::x86_avx_min_pd_256;
    if (Len == 23 && !memcmp(Name, "llvm.x86.avx.min.ps.256", 23)) return Intrinsic::x86_avx_min_ps_256;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.movmsk.pd.256", 26)) return Intrinsic::x86_avx_movmsk_pd_256;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.movmsk.ps.256", 26)) return Intrinsic::x86_avx_movmsk_ps_256;
    if (Len == 25 && !memcmp(Name, "llvm.x86.avx.movnt.dq.256", 25)) return Intrinsic::x86_avx_movnt_dq_256;
    if (Len == 25 && !memcmp(Name, "llvm.x86.avx.movnt.pd.256", 25)) return Intrinsic::x86_avx_movnt_pd_256;
    if (Len == 25 && !memcmp(Name, "llvm.x86.avx.movnt.ps.256", 25)) return Intrinsic::x86_avx_movnt_ps_256;
    if (Len == 23 && !memcmp(Name, "llvm.x86.avx.ptestc.256", 23)) return Intrinsic::x86_avx_ptestc_256;
    if (Len == 25 && !memcmp(Name, "llvm.x86.avx.ptestnzc.256", 25)) return Intrinsic::x86_avx_ptestnzc_256;
    if (Len == 23 && !memcmp(Name, "llvm.x86.avx.ptestz.256", 23)) return Intrinsic::x86_avx_ptestz_256;
    if (Len == 23 && !memcmp(Name, "llvm.x86.avx.rcp.ps.256", 23)) return Intrinsic::x86_avx_rcp_ps_256;
    if (Len == 25 && !memcmp(Name, "llvm.x86.avx.round.pd.256", 25)) return Intrinsic::x86_avx_round_pd_256;
    if (Len == 25 && !memcmp(Name, "llvm.x86.avx.round.ps.256", 25)) return Intrinsic::x86_avx_round_ps_256;
    if (Len == 25 && !memcmp(Name, "llvm.x86.avx.rsqrt.ps.256", 25)) return Intrinsic::x86_avx_rsqrt_ps_256;
    if (Len == 24 && !memcmp(Name, "llvm.x86.avx.sqrt.pd.256", 24)) return Intrinsic::x86_avx_sqrt_pd_256;
    if (Len == 24 && !memcmp(Name, "llvm.x86.avx.sqrt.ps.256", 24)) return Intrinsic::x86_avx_sqrt_ps_256;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.storeu.dq.256", 26)) return Intrinsic::x86_avx_storeu_dq_256;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.storeu.pd.256", 26)) return Intrinsic::x86_avx_storeu_pd_256;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.storeu.ps.256", 26)) return Intrinsic::x86_avx_storeu_ps_256;
    if (Len == 30 && !memcmp(Name, "llvm.x86.avx.vbroadcast.sd.256", 30)) return Intrinsic::x86_avx_vbroadcast_sd_256;
    if (Len == 34 && !memcmp(Name, "llvm.x86.avx.vbroadcastf128.pd.256", 34)) return Intrinsic::x86_avx_vbroadcastf128_pd_256;
    if (Len == 34 && !memcmp(Name, "llvm.x86.avx.vbroadcastf128.ps.256", 34)) return Intrinsic::x86_avx_vbroadcastf128_ps_256;
    if (Len == 25 && !memcmp(Name, "llvm.x86.avx.vbroadcastss", 25)) return Intrinsic::x86_avx_vbroadcastss;
    if (Len == 29 && !memcmp(Name, "llvm.x86.avx.vbroadcastss.256", 29)) return Intrinsic::x86_avx_vbroadcastss_256;
    if (Len == 32 && !memcmp(Name, "llvm.x86.avx.vextractf128.pd.256", 32)) return Intrinsic::x86_avx_vextractf128_pd_256;
    if (Len == 32 && !memcmp(Name, "llvm.x86.avx.vextractf128.ps.256", 32)) return Intrinsic::x86_avx_vextractf128_ps_256;
    if (Len == 32 && !memcmp(Name, "llvm.x86.avx.vextractf128.si.256", 32)) return Intrinsic::x86_avx_vextractf128_si_256;
    if (Len == 31 && !memcmp(Name, "llvm.x86.avx.vinsertf128.pd.256", 31)) return Intrinsic::x86_avx_vinsertf128_pd_256;
    if (Len == 31 && !memcmp(Name, "llvm.x86.avx.vinsertf128.ps.256", 31)) return Intrinsic::x86_avx_vinsertf128_ps_256;
    if (Len == 31 && !memcmp(Name, "llvm.x86.avx.vinsertf128.si.256", 31)) return Intrinsic::x86_avx_vinsertf128_si_256;
    if (Len == 30 && !memcmp(Name, "llvm.x86.avx.vperm2f128.pd.256", 30)) return Intrinsic::x86_avx_vperm2f128_pd_256;
    if (Len == 30 && !memcmp(Name, "llvm.x86.avx.vperm2f128.ps.256", 30)) return Intrinsic::x86_avx_vperm2f128_ps_256;
    if (Len == 30 && !memcmp(Name, "llvm.x86.avx.vperm2f128.si.256", 30)) return Intrinsic::x86_avx_vperm2f128_si_256;
    if (Len == 23 && !memcmp(Name, "llvm.x86.avx.vpermil.pd", 23)) return Intrinsic::x86_avx_vpermil_pd;
    if (Len == 27 && !memcmp(Name, "llvm.x86.avx.vpermil.pd.256", 27)) return Intrinsic::x86_avx_vpermil_pd_256;
    if (Len == 23 && !memcmp(Name, "llvm.x86.avx.vpermil.ps", 23)) return Intrinsic::x86_avx_vpermil_ps;
    if (Len == 27 && !memcmp(Name, "llvm.x86.avx.vpermil.ps.256", 27)) return Intrinsic::x86_avx_vpermil_ps_256;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.vpermilvar.pd", 26)) return Intrinsic::x86_avx_vpermilvar_pd;
    if (Len == 30 && !memcmp(Name, "llvm.x86.avx.vpermilvar.pd.256", 30)) return Intrinsic::x86_avx_vpermilvar_pd_256;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.vpermilvar.ps", 26)) return Intrinsic::x86_avx_vpermilvar_ps;
    if (Len == 30 && !memcmp(Name, "llvm.x86.avx.vpermilvar.ps.256", 30)) return Intrinsic::x86_avx_vpermilvar_ps_256;
    if (Len == 22 && !memcmp(Name, "llvm.x86.avx.vtestc.pd", 22)) return Intrinsic::x86_avx_vtestc_pd;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.vtestc.pd.256", 26)) return Intrinsic::x86_avx_vtestc_pd_256;
    if (Len == 22 && !memcmp(Name, "llvm.x86.avx.vtestc.ps", 22)) return Intrinsic::x86_avx_vtestc_ps;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.vtestc.ps.256", 26)) return Intrinsic::x86_avx_vtestc_ps_256;
    if (Len == 24 && !memcmp(Name, "llvm.x86.avx.vtestnzc.pd", 24)) return Intrinsic::x86_avx_vtestnzc_pd;
    if (Len == 28 && !memcmp(Name, "llvm.x86.avx.vtestnzc.pd.256", 28)) return Intrinsic::x86_avx_vtestnzc_pd_256;
    if (Len == 24 && !memcmp(Name, "llvm.x86.avx.vtestnzc.ps", 24)) return Intrinsic::x86_avx_vtestnzc_ps;
    if (Len == 28 && !memcmp(Name, "llvm.x86.avx.vtestnzc.ps.256", 28)) return Intrinsic::x86_avx_vtestnzc_ps_256;
    if (Len == 22 && !memcmp(Name, "llvm.x86.avx.vtestz.pd", 22)) return Intrinsic::x86_avx_vtestz_pd;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.vtestz.pd.256", 26)) return Intrinsic::x86_avx_vtestz_pd_256;
    if (Len == 22 && !memcmp(Name, "llvm.x86.avx.vtestz.ps", 22)) return Intrinsic::x86_avx_vtestz_ps;
    if (Len == 26 && !memcmp(Name, "llvm.x86.avx.vtestz.ps.256", 26)) return Intrinsic::x86_avx_vtestz_ps_256;
    if (Len == 21 && !memcmp(Name, "llvm.x86.avx.vzeroall", 21)) return Intrinsic::x86_avx_vzeroall;
    if (Len == 23 && !memcmp(Name, "llvm.x86.avx.vzeroupper", 23)) return Intrinsic::x86_avx_vzeroupper;
    if (Len == 12 && !memcmp(Name, "llvm.x86.int", 12)) return Intrinsic::x86_int;
    if (Len == 25 && !memcmp(Name, "llvm.x86.mmx.cvtsi32.si64", 25)) return Intrinsic::x86_mmx_cvtsi32_si64;
    if (Len == 25 && !memcmp(Name, "llvm.x86.mmx.cvtsi64.si32", 25)) return Intrinsic::x86_mmx_cvtsi64_si32;
    if (Len == 17 && !memcmp(Name, "llvm.x86.mmx.emms", 17)) return Intrinsic::x86_mmx_emms;
    if (Len == 18 && !memcmp(Name, "llvm.x86.mmx.femms", 18)) return Intrinsic::x86_mmx_femms;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.maskmovq", 21)) return Intrinsic::x86_mmx_maskmovq;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.movnt.dq", 21)) return Intrinsic::x86_mmx_movnt_dq;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.packssdw", 21)) return Intrinsic::x86_mmx_packssdw;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.packsswb", 21)) return Intrinsic::x86_mmx_packsswb;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.packuswb", 21)) return Intrinsic::x86_mmx_packuswb;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.padd.b", 19)) return Intrinsic::x86_mmx_padd_b;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.padd.d", 19)) return Intrinsic::x86_mmx_padd_d;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.padd.q", 19)) return Intrinsic::x86_mmx_padd_q;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.padd.w", 19)) return Intrinsic::x86_mmx_padd_w;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.padds.b", 20)) return Intrinsic::x86_mmx_padds_b;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.padds.w", 20)) return Intrinsic::x86_mmx_padds_w;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.paddus.b", 21)) return Intrinsic::x86_mmx_paddus_b;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.paddus.w", 21)) return Intrinsic::x86_mmx_paddus_w;
    if (Len == 17 && !memcmp(Name, "llvm.x86.mmx.pand", 17)) return Intrinsic::x86_mmx_pand;
    if (Len == 18 && !memcmp(Name, "llvm.x86.mmx.pandn", 18)) return Intrinsic::x86_mmx_pandn;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.pavg.b", 19)) return Intrinsic::x86_mmx_pavg_b;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.pavg.w", 19)) return Intrinsic::x86_mmx_pavg_w;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpeq.b", 21)) return Intrinsic::x86_mmx_pcmpeq_b;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpeq.d", 21)) return Intrinsic::x86_mmx_pcmpeq_d;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpeq.w", 21)) return Intrinsic::x86_mmx_pcmpeq_w;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpgt.b", 21)) return Intrinsic::x86_mmx_pcmpgt_b;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpgt.d", 21)) return Intrinsic::x86_mmx_pcmpgt_d;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpgt.w", 21)) return Intrinsic::x86_mmx_pcmpgt_w;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pextr.w", 20)) return Intrinsic::x86_mmx_pextr_w;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pinsr.w", 20)) return Intrinsic::x86_mmx_pinsr_w;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pmadd.wd", 21)) return Intrinsic::x86_mmx_pmadd_wd;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pmaxs.w", 20)) return Intrinsic::x86_mmx_pmaxs_w;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pmaxu.b", 20)) return Intrinsic::x86_mmx_pmaxu_b;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pmins.w", 20)) return Intrinsic::x86_mmx_pmins_w;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pminu.b", 20)) return Intrinsic::x86_mmx_pminu_b;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pmovmskb", 21)) return Intrinsic::x86_mmx_pmovmskb;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pmulh.w", 20)) return Intrinsic::x86_mmx_pmulh_w;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pmulhu.w", 21)) return Intrinsic::x86_mmx_pmulhu_w;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pmull.w", 20)) return Intrinsic::x86_mmx_pmull_w;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pmulu.dq", 21)) return Intrinsic::x86_mmx_pmulu_dq;
    if (Len == 16 && !memcmp(Name, "llvm.x86.mmx.por", 16)) return Intrinsic::x86_mmx_por;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psad.bw", 20)) return Intrinsic::x86_mmx_psad_bw;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psll.d", 19)) return Intrinsic::x86_mmx_psll_d;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psll.q", 19)) return Intrinsic::x86_mmx_psll_q;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psll.w", 19)) return Intrinsic::x86_mmx_psll_w;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pslli.d", 20)) return Intrinsic::x86_mmx_pslli_d;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pslli.q", 20)) return Intrinsic::x86_mmx_pslli_q;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pslli.w", 20)) return Intrinsic::x86_mmx_pslli_w;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psra.d", 19)) return Intrinsic::x86_mmx_psra_d;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psra.w", 19)) return Intrinsic::x86_mmx_psra_w;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psrai.d", 20)) return Intrinsic::x86_mmx_psrai_d;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psrai.w", 20)) return Intrinsic::x86_mmx_psrai_w;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psrl.d", 19)) return Intrinsic::x86_mmx_psrl_d;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psrl.q", 19)) return Intrinsic::x86_mmx_psrl_q;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psrl.w", 19)) return Intrinsic::x86_mmx_psrl_w;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psrli.d", 20)) return Intrinsic::x86_mmx_psrli_d;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psrli.q", 20)) return Intrinsic::x86_mmx_psrli_q;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psrli.w", 20)) return Intrinsic::x86_mmx_psrli_w;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psub.b", 19)) return Intrinsic::x86_mmx_psub_b;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psub.d", 19)) return Intrinsic::x86_mmx_psub_d;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psub.q", 19)) return Intrinsic::x86_mmx_psub_q;
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psub.w", 19)) return Intrinsic::x86_mmx_psub_w;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psubs.b", 20)) return Intrinsic::x86_mmx_psubs_b;
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psubs.w", 20)) return Intrinsic::x86_mmx_psubs_w;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.psubus.b", 21)) return Intrinsic::x86_mmx_psubus_b;
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.psubus.w", 21)) return Intrinsic::x86_mmx_psubus_w;
    if (Len == 22 && !memcmp(Name, "llvm.x86.mmx.punpckhbw", 22)) return Intrinsic::x86_mmx_punpckhbw;
    if (Len == 22 && !memcmp(Name, "llvm.x86.mmx.punpckhdq", 22)) return Intrinsic::x86_mmx_punpckhdq;
    if (Len == 22 && !memcmp(Name, "llvm.x86.mmx.punpckhwd", 22)) return Intrinsic::x86_mmx_punpckhwd;
    if (Len == 22 && !memcmp(Name, "llvm.x86.mmx.punpcklbw", 22)) return Intrinsic::x86_mmx_punpcklbw;
    if (Len == 22 && !memcmp(Name, "llvm.x86.mmx.punpckldq", 22)) return Intrinsic::x86_mmx_punpckldq;
    if (Len == 22 && !memcmp(Name, "llvm.x86.mmx.punpcklwd", 22)) return Intrinsic::x86_mmx_punpcklwd;
    if (Len == 17 && !memcmp(Name, "llvm.x86.mmx.pxor", 17)) return Intrinsic::x86_mmx_pxor;
    if (Len == 22 && !memcmp(Name, "llvm.x86.mmx.vec.ext.d", 22)) return Intrinsic::x86_mmx_vec_ext_d;
    if (Len == 23 && !memcmp(Name, "llvm.x86.mmx.vec.init.b", 23)) return Intrinsic::x86_mmx_vec_init_b;
    if (Len == 23 && !memcmp(Name, "llvm.x86.mmx.vec.init.d", 23)) return Intrinsic::x86_mmx_vec_init_d;
    if (Len == 23 && !memcmp(Name, "llvm.x86.mmx.vec.init.w", 23)) return Intrinsic::x86_mmx_vec_init_w;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.add.ss", 19)) return Intrinsic::x86_sse_add_ss;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.cmp.ps", 19)) return Intrinsic::x86_sse_cmp_ps;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.cmp.ss", 19)) return Intrinsic::x86_sse_cmp_ss;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.comieq.ss", 22)) return Intrinsic::x86_sse_comieq_ss;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.comige.ss", 22)) return Intrinsic::x86_sse_comige_ss;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.comigt.ss", 22)) return Intrinsic::x86_sse_comigt_ss;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.comile.ss", 22)) return Intrinsic::x86_sse_comile_ss;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.comilt.ss", 22)) return Intrinsic::x86_sse_comilt_ss;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.comineq.ss", 23)) return Intrinsic::x86_sse_comineq_ss;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtpd2pi", 21)) return Intrinsic::x86_sse_cvtpd2pi;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtpi2pd", 21)) return Intrinsic::x86_sse_cvtpi2pd;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtpi2ps", 21)) return Intrinsic::x86_sse_cvtpi2ps;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtps2pi", 21)) return Intrinsic::x86_sse_cvtps2pi;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtsi2ss", 21)) return Intrinsic::x86_sse_cvtsi2ss;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.cvtsi642ss", 23)) return Intrinsic::x86_sse_cvtsi642ss;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtss2si", 21)) return Intrinsic::x86_sse_cvtss2si;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.cvtss2si64", 23)) return Intrinsic::x86_sse_cvtss2si64;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.cvttpd2pi", 22)) return Intrinsic::x86_sse_cvttpd2pi;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.cvttps2pi", 22)) return Intrinsic::x86_sse_cvttps2pi;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.cvttss2si", 22)) return Intrinsic::x86_sse_cvttss2si;
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse.cvttss2si64", 24)) return Intrinsic::x86_sse_cvttss2si64;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.div.ss", 19)) return Intrinsic::x86_sse_div_ss;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse.ldmxcsr", 20)) return Intrinsic::x86_sse_ldmxcsr;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.loadu.ps", 21)) return Intrinsic::x86_sse_loadu_ps;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.max.ps", 19)) return Intrinsic::x86_sse_max_ps;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.max.ss", 19)) return Intrinsic::x86_sse_max_ss;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.min.ps", 19)) return Intrinsic::x86_sse_min_ps;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.min.ss", 19)) return Intrinsic::x86_sse_min_ss;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.movmsk.ps", 22)) return Intrinsic::x86_sse_movmsk_ps;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.movnt.ps", 21)) return Intrinsic::x86_sse_movnt_ps;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.mul.ss", 19)) return Intrinsic::x86_sse_mul_ss;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.rcp.ps", 19)) return Intrinsic::x86_sse_rcp_ps;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.rcp.ss", 19)) return Intrinsic::x86_sse_rcp_ss;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.rsqrt.ps", 21)) return Intrinsic::x86_sse_rsqrt_ps;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.rsqrt.ss", 21)) return Intrinsic::x86_sse_rsqrt_ss;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.sfence", 19)) return Intrinsic::x86_sse_sfence;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse.sqrt.ps", 20)) return Intrinsic::x86_sse_sqrt_ps;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse.sqrt.ss", 20)) return Intrinsic::x86_sse_sqrt_ss;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse.stmxcsr", 20)) return Intrinsic::x86_sse_stmxcsr;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.storeu.ps", 22)) return Intrinsic::x86_sse_storeu_ps;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.sub.ss", 19)) return Intrinsic::x86_sse_sub_ss;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.ucomieq.ss", 23)) return Intrinsic::x86_sse_ucomieq_ss;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.ucomige.ss", 23)) return Intrinsic::x86_sse_ucomige_ss;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.ucomigt.ss", 23)) return Intrinsic::x86_sse_ucomigt_ss;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.ucomile.ss", 23)) return Intrinsic::x86_sse_ucomile_ss;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.ucomilt.ss", 23)) return Intrinsic::x86_sse_ucomilt_ss;
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse.ucomineq.ss", 24)) return Intrinsic::x86_sse_ucomineq_ss;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.add.sd", 20)) return Intrinsic::x86_sse2_add_sd;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.clflush", 21)) return Intrinsic::x86_sse2_clflush;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.cmp.pd", 20)) return Intrinsic::x86_sse2_cmp_pd;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.cmp.sd", 20)) return Intrinsic::x86_sse2_cmp_sd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.comieq.sd", 23)) return Intrinsic::x86_sse2_comieq_sd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.comige.sd", 23)) return Intrinsic::x86_sse2_comige_sd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.comigt.sd", 23)) return Intrinsic::x86_sse2_comigt_sd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.comile.sd", 23)) return Intrinsic::x86_sse2_comile_sd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.comilt.sd", 23)) return Intrinsic::x86_sse2_comilt_sd;
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.comineq.sd", 24)) return Intrinsic::x86_sse2_comineq_sd;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtdq2pd", 22)) return Intrinsic::x86_sse2_cvtdq2pd;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtdq2ps", 22)) return Intrinsic::x86_sse2_cvtdq2ps;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtpd2dq", 22)) return Intrinsic::x86_sse2_cvtpd2dq;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtpd2ps", 22)) return Intrinsic::x86_sse2_cvtpd2ps;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtps2dq", 22)) return Intrinsic::x86_sse2_cvtps2dq;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtps2pd", 22)) return Intrinsic::x86_sse2_cvtps2pd;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtsd2si", 22)) return Intrinsic::x86_sse2_cvtsd2si;
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.cvtsd2si64", 24)) return Intrinsic::x86_sse2_cvtsd2si64;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtsd2ss", 22)) return Intrinsic::x86_sse2_cvtsd2ss;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtsi2sd", 22)) return Intrinsic::x86_sse2_cvtsi2sd;
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.cvtsi642sd", 24)) return Intrinsic::x86_sse2_cvtsi642sd;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtss2sd", 22)) return Intrinsic::x86_sse2_cvtss2sd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.cvttpd2dq", 23)) return Intrinsic::x86_sse2_cvttpd2dq;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.cvttps2dq", 23)) return Intrinsic::x86_sse2_cvttps2dq;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.cvttsd2si", 23)) return Intrinsic::x86_sse2_cvttsd2si;
    if (Len == 25 && !memcmp(Name, "llvm.x86.sse2.cvttsd2si64", 25)) return Intrinsic::x86_sse2_cvttsd2si64;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.div.sd", 20)) return Intrinsic::x86_sse2_div_sd;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.lfence", 20)) return Intrinsic::x86_sse2_lfence;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.loadu.dq", 22)) return Intrinsic::x86_sse2_loadu_dq;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.loadu.pd", 22)) return Intrinsic::x86_sse2_loadu_pd;
    if (Len == 25 && !memcmp(Name, "llvm.x86.sse2.maskmov.dqu", 25)) return Intrinsic::x86_sse2_maskmov_dqu;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.max.pd", 20)) return Intrinsic::x86_sse2_max_pd;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.max.sd", 20)) return Intrinsic::x86_sse2_max_sd;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.mfence", 20)) return Intrinsic::x86_sse2_mfence;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.min.pd", 20)) return Intrinsic::x86_sse2_min_pd;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.min.sd", 20)) return Intrinsic::x86_sse2_min_sd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.movmsk.pd", 23)) return Intrinsic::x86_sse2_movmsk_pd;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.movnt.dq", 22)) return Intrinsic::x86_sse2_movnt_dq;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.movnt.i", 21)) return Intrinsic::x86_sse2_movnt_i;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.movnt.pd", 22)) return Intrinsic::x86_sse2_movnt_pd;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.mul.sd", 20)) return Intrinsic::x86_sse2_mul_sd;
    if (Len == 26 && !memcmp(Name, "llvm.x86.sse2.packssdw.128", 26)) return Intrinsic::x86_sse2_packssdw_128;
    if (Len == 26 && !memcmp(Name, "llvm.x86.sse2.packsswb.128", 26)) return Intrinsic::x86_sse2_packsswb_128;
    if (Len == 26 && !memcmp(Name, "llvm.x86.sse2.packuswb.128", 26)) return Intrinsic::x86_sse2_packuswb_128;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.padds.b", 21)) return Intrinsic::x86_sse2_padds_b;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.padds.w", 21)) return Intrinsic::x86_sse2_padds_w;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.paddus.b", 22)) return Intrinsic::x86_sse2_paddus_b;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.paddus.w", 22)) return Intrinsic::x86_sse2_paddus_w;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.pavg.b", 20)) return Intrinsic::x86_sse2_pavg_b;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.pavg.w", 20)) return Intrinsic::x86_sse2_pavg_w;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpeq.b", 22)) return Intrinsic::x86_sse2_pcmpeq_b;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpeq.d", 22)) return Intrinsic::x86_sse2_pcmpeq_d;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpeq.w", 22)) return Intrinsic::x86_sse2_pcmpeq_w;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpgt.b", 22)) return Intrinsic::x86_sse2_pcmpgt_b;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpgt.d", 22)) return Intrinsic::x86_sse2_pcmpgt_d;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpgt.w", 22)) return Intrinsic::x86_sse2_pcmpgt_w;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pmadd.wd", 22)) return Intrinsic::x86_sse2_pmadd_wd;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pmaxs.w", 21)) return Intrinsic::x86_sse2_pmaxs_w;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pmaxu.b", 21)) return Intrinsic::x86_sse2_pmaxu_b;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pmins.w", 21)) return Intrinsic::x86_sse2_pmins_w;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pminu.b", 21)) return Intrinsic::x86_sse2_pminu_b;
    if (Len == 26 && !memcmp(Name, "llvm.x86.sse2.pmovmskb.128", 26)) return Intrinsic::x86_sse2_pmovmskb_128;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pmulh.w", 21)) return Intrinsic::x86_sse2_pmulh_w;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pmulhu.w", 22)) return Intrinsic::x86_sse2_pmulhu_w;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pmulu.dq", 22)) return Intrinsic::x86_sse2_pmulu_dq;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psad.bw", 21)) return Intrinsic::x86_sse2_psad_bw;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psll.d", 20)) return Intrinsic::x86_sse2_psll_d;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psll.dq", 21)) return Intrinsic::x86_sse2_psll_dq;
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.psll.dq.bs", 24)) return Intrinsic::x86_sse2_psll_dq_bs;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psll.q", 20)) return Intrinsic::x86_sse2_psll_q;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psll.w", 20)) return Intrinsic::x86_sse2_psll_w;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pslli.d", 21)) return Intrinsic::x86_sse2_pslli_d;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pslli.q", 21)) return Intrinsic::x86_sse2_pslli_q;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pslli.w", 21)) return Intrinsic::x86_sse2_pslli_w;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psra.d", 20)) return Intrinsic::x86_sse2_psra_d;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psra.w", 20)) return Intrinsic::x86_sse2_psra_w;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrai.d", 21)) return Intrinsic::x86_sse2_psrai_d;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrai.w", 21)) return Intrinsic::x86_sse2_psrai_w;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psrl.d", 20)) return Intrinsic::x86_sse2_psrl_d;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrl.dq", 21)) return Intrinsic::x86_sse2_psrl_dq;
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.psrl.dq.bs", 24)) return Intrinsic::x86_sse2_psrl_dq_bs;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psrl.q", 20)) return Intrinsic::x86_sse2_psrl_q;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psrl.w", 20)) return Intrinsic::x86_sse2_psrl_w;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrli.d", 21)) return Intrinsic::x86_sse2_psrli_d;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrli.q", 21)) return Intrinsic::x86_sse2_psrli_q;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrli.w", 21)) return Intrinsic::x86_sse2_psrli_w;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psubs.b", 21)) return Intrinsic::x86_sse2_psubs_b;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psubs.w", 21)) return Intrinsic::x86_sse2_psubs_w;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.psubus.b", 22)) return Intrinsic::x86_sse2_psubus_b;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.psubus.w", 22)) return Intrinsic::x86_sse2_psubus_w;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.sqrt.pd", 21)) return Intrinsic::x86_sse2_sqrt_pd;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.sqrt.sd", 21)) return Intrinsic::x86_sse2_sqrt_sd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.storel.dq", 23)) return Intrinsic::x86_sse2_storel_dq;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.storeu.dq", 23)) return Intrinsic::x86_sse2_storeu_dq;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.storeu.pd", 23)) return Intrinsic::x86_sse2_storeu_pd;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.sub.sd", 20)) return Intrinsic::x86_sse2_sub_sd;
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.ucomieq.sd", 24)) return Intrinsic::x86_sse2_ucomieq_sd;
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.ucomige.sd", 24)) return Intrinsic::x86_sse2_ucomige_sd;
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.ucomigt.sd", 24)) return Intrinsic::x86_sse2_ucomigt_sd;
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.ucomile.sd", 24)) return Intrinsic::x86_sse2_ucomile_sd;
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.ucomilt.sd", 24)) return Intrinsic::x86_sse2_ucomilt_sd;
    if (Len == 25 && !memcmp(Name, "llvm.x86.sse2.ucomineq.sd", 25)) return Intrinsic::x86_sse2_ucomineq_sd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse3.addsub.pd", 23)) return Intrinsic::x86_sse3_addsub_pd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse3.addsub.ps", 23)) return Intrinsic::x86_sse3_addsub_ps;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse3.hadd.pd", 21)) return Intrinsic::x86_sse3_hadd_pd;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse3.hadd.ps", 21)) return Intrinsic::x86_sse3_hadd_ps;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse3.hsub.pd", 21)) return Intrinsic::x86_sse3_hsub_pd;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse3.hsub.ps", 21)) return Intrinsic::x86_sse3_hsub_ps;
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse3.ldu.dq", 20)) return Intrinsic::x86_sse3_ldu_dq;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse3.monitor", 21)) return Intrinsic::x86_sse3_monitor;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse3.mwait", 19)) return Intrinsic::x86_sse3_mwait;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse41.blendpd", 22)) return Intrinsic::x86_sse41_blendpd;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse41.blendps", 22)) return Intrinsic::x86_sse41_blendps;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.blendvpd", 23)) return Intrinsic::x86_sse41_blendvpd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.blendvps", 23)) return Intrinsic::x86_sse41_blendvps;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse41.dppd", 19)) return Intrinsic::x86_sse41_dppd;
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse41.dpps", 19)) return Intrinsic::x86_sse41_dpps;
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse41.extractps", 24)) return Intrinsic::x86_sse41_extractps;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.insertps", 23)) return Intrinsic::x86_sse41_insertps;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.movntdqa", 23)) return Intrinsic::x86_sse41_movntdqa;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse41.mpsadbw", 22)) return Intrinsic::x86_sse41_mpsadbw;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.packusdw", 23)) return Intrinsic::x86_sse41_packusdw;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pblendvb", 23)) return Intrinsic::x86_sse41_pblendvb;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse41.pblendw", 22)) return Intrinsic::x86_sse41_pblendw;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse41.pcmpeqq", 22)) return Intrinsic::x86_sse41_pcmpeqq;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pextrb", 21)) return Intrinsic::x86_sse41_pextrb;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pextrd", 21)) return Intrinsic::x86_sse41_pextrd;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pextrq", 21)) return Intrinsic::x86_sse41_pextrq;
    if (Len == 25 && !memcmp(Name, "llvm.x86.sse41.phminposuw", 25)) return Intrinsic::x86_sse41_phminposuw;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmaxsb", 21)) return Intrinsic::x86_sse41_pmaxsb;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmaxsd", 21)) return Intrinsic::x86_sse41_pmaxsd;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmaxud", 21)) return Intrinsic::x86_sse41_pmaxud;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmaxuw", 21)) return Intrinsic::x86_sse41_pmaxuw;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pminsb", 21)) return Intrinsic::x86_sse41_pminsb;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pminsd", 21)) return Intrinsic::x86_sse41_pminsd;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pminud", 21)) return Intrinsic::x86_sse41_pminud;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pminuw", 21)) return Intrinsic::x86_sse41_pminuw;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxbd", 23)) return Intrinsic::x86_sse41_pmovsxbd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxbq", 23)) return Intrinsic::x86_sse41_pmovsxbq;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxbw", 23)) return Intrinsic::x86_sse41_pmovsxbw;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxdq", 23)) return Intrinsic::x86_sse41_pmovsxdq;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxwd", 23)) return Intrinsic::x86_sse41_pmovsxwd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxwq", 23)) return Intrinsic::x86_sse41_pmovsxwq;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxbd", 23)) return Intrinsic::x86_sse41_pmovzxbd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxbq", 23)) return Intrinsic::x86_sse41_pmovzxbq;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxbw", 23)) return Intrinsic::x86_sse41_pmovzxbw;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxdq", 23)) return Intrinsic::x86_sse41_pmovzxdq;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxwd", 23)) return Intrinsic::x86_sse41_pmovzxwd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxwq", 23)) return Intrinsic::x86_sse41_pmovzxwq;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmuldq", 21)) return Intrinsic::x86_sse41_pmuldq;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.ptestc", 21)) return Intrinsic::x86_sse41_ptestc;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.ptestnzc", 23)) return Intrinsic::x86_sse41_ptestnzc;
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.ptestz", 21)) return Intrinsic::x86_sse41_ptestz;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.round.pd", 23)) return Intrinsic::x86_sse41_round_pd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.round.ps", 23)) return Intrinsic::x86_sse41_round_ps;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.round.sd", 23)) return Intrinsic::x86_sse41_round_sd;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.round.ss", 23)) return Intrinsic::x86_sse41_round_ss;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse42.crc32.16", 23)) return Intrinsic::x86_sse42_crc32_16;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse42.crc32.32", 23)) return Intrinsic::x86_sse42_crc32_32;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse42.crc32.8", 22)) return Intrinsic::x86_sse42_crc32_8;
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse42.crc64.64", 23)) return Intrinsic::x86_sse42_crc64_64;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse42.crc64.8", 22)) return Intrinsic::x86_sse42_crc64_8;
    if (Len == 27 && !memcmp(Name, "llvm.x86.sse42.pcmpestri128", 27)) return Intrinsic::x86_sse42_pcmpestri128;
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpestria128", 28)) return Intrinsic::x86_sse42_pcmpestria128;
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpestric128", 28)) return Intrinsic::x86_sse42_pcmpestric128;
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpestrio128", 28)) return Intrinsic::x86_sse42_pcmpestrio128;
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpestris128", 28)) return Intrinsic::x86_sse42_pcmpestris128;
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpestriz128", 28)) return Intrinsic::x86_sse42_pcmpestriz128;
    if (Len == 27 && !memcmp(Name, "llvm.x86.sse42.pcmpestrm128", 27)) return Intrinsic::x86_sse42_pcmpestrm128;
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse42.pcmpgtq", 22)) return Intrinsic::x86_sse42_pcmpgtq;
    if (Len == 27 && !memcmp(Name, "llvm.x86.sse42.pcmpistri128", 27)) return Intrinsic::x86_sse42_pcmpistri128;
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpistria128", 28)) return Intrinsic::x86_sse42_pcmpistria128;
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpistric128", 28)) return Intrinsic::x86_sse42_pcmpistric128;
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpistrio128", 28)) return Intrinsic::x86_sse42_pcmpistrio128;
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpistris128", 28)) return Intrinsic::x86_sse42_pcmpistris128;
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpistriz128", 28)) return Intrinsic::x86_sse42_pcmpistriz128;
    if (Len == 27 && !memcmp(Name, "llvm.x86.sse42.pcmpistrm128", 27)) return Intrinsic::x86_sse42_pcmpistrm128;
    if (Len == 21 && !memcmp(Name, "llvm.x86.ssse3.pabs.b", 21)) return Intrinsic::x86_ssse3_pabs_b;
    if (Len == 25 && !memcmp(Name, "llvm.x86.ssse3.pabs.b.128", 25)) return Intrinsic::x86_ssse3_pabs_b_128;
    if (Len == 21 && !memcmp(Name, "llvm.x86.ssse3.pabs.d", 21)) return Intrinsic::x86_ssse3_pabs_d;
    if (Len == 25 && !memcmp(Name, "llvm.x86.ssse3.pabs.d.128", 25)) return Intrinsic::x86_ssse3_pabs_d_128;
    if (Len == 21 && !memcmp(Name, "llvm.x86.ssse3.pabs.w", 21)) return Intrinsic::x86_ssse3_pabs_w;
    if (Len == 25 && !memcmp(Name, "llvm.x86.ssse3.pabs.w.128", 25)) return Intrinsic::x86_ssse3_pabs_w_128;
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.phadd.d", 22)) return Intrinsic::x86_ssse3_phadd_d;
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.phadd.d.128", 26)) return Intrinsic::x86_ssse3_phadd_d_128;
    if (Len == 23 && !memcmp(Name, "llvm.x86.ssse3.phadd.sw", 23)) return Intrinsic::x86_ssse3_phadd_sw;
    if (Len == 27 && !memcmp(Name, "llvm.x86.ssse3.phadd.sw.128", 27)) return Intrinsic::x86_ssse3_phadd_sw_128;
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.phadd.w", 22)) return Intrinsic::x86_ssse3_phadd_w;
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.phadd.w.128", 26)) return Intrinsic::x86_ssse3_phadd_w_128;
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.phsub.d", 22)) return Intrinsic::x86_ssse3_phsub_d;
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.phsub.d.128", 26)) return Intrinsic::x86_ssse3_phsub_d_128;
    if (Len == 23 && !memcmp(Name, "llvm.x86.ssse3.phsub.sw", 23)) return Intrinsic::x86_ssse3_phsub_sw;
    if (Len == 27 && !memcmp(Name, "llvm.x86.ssse3.phsub.sw.128", 27)) return Intrinsic::x86_ssse3_phsub_sw_128;
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.phsub.w", 22)) return Intrinsic::x86_ssse3_phsub_w;
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.phsub.w.128", 26)) return Intrinsic::x86_ssse3_phsub_w_128;
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.pmadd.ub.sw", 26)) return Intrinsic::x86_ssse3_pmadd_ub_sw;
    if (Len == 30 && !memcmp(Name, "llvm.x86.ssse3.pmadd.ub.sw.128", 30)) return Intrinsic::x86_ssse3_pmadd_ub_sw_128;
    if (Len == 25 && !memcmp(Name, "llvm.x86.ssse3.pmul.hr.sw", 25)) return Intrinsic::x86_ssse3_pmul_hr_sw;
    if (Len == 29 && !memcmp(Name, "llvm.x86.ssse3.pmul.hr.sw.128", 29)) return Intrinsic::x86_ssse3_pmul_hr_sw_128;
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.pshuf.b", 22)) return Intrinsic::x86_ssse3_pshuf_b;
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.pshuf.b.128", 26)) return Intrinsic::x86_ssse3_pshuf_b_128;
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.pshuf.w", 22)) return Intrinsic::x86_ssse3_pshuf_w;
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.psign.b", 22)) return Intrinsic::x86_ssse3_psign_b;
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.psign.b.128", 26)) return Intrinsic::x86_ssse3_psign_b_128;
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.psign.d", 22)) return Intrinsic::x86_ssse3_psign_d;
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.psign.d.128", 26)) return Intrinsic::x86_ssse3_psign_d_128;
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.psign.w", 22)) return Intrinsic::x86_ssse3_psign_w;
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.psign.w.128", 26)) return Intrinsic::x86_ssse3_psign_w_128;
    if (Len == 17 && !memcmp(Name, "llvm.xcore.bitrev", 17)) return Intrinsic::xcore_bitrev;
    if (Len == 16 && !memcmp(Name, "llvm.xcore.getid", 16)) return Intrinsic::xcore_getid;
  }
#endif

// Verifier::visitIntrinsicFunctionCall code.
#ifdef GET_INTRINSIC_VERIFIER
  switch (ID) {
  default: assert(0 && "Invalid intrinsic!");
  case Intrinsic::eh_unwind_init:		// llvm.eh.unwind.init
  case Intrinsic::ppc_altivec_dssall:		// llvm.ppc.altivec.dssall
  case Intrinsic::ppc_sync:		// llvm.ppc.sync
  case Intrinsic::trap:		// llvm.trap
  case Intrinsic::x86_avx_vzeroall:		// llvm.x86.avx.vzeroall
  case Intrinsic::x86_avx_vzeroupper:		// llvm.x86.avx.vzeroupper
  case Intrinsic::x86_mmx_emms:		// llvm.x86.mmx.emms
  case Intrinsic::x86_mmx_femms:		// llvm.x86.mmx.femms
  case Intrinsic::x86_sse2_lfence:		// llvm.x86.sse2.lfence
  case Intrinsic::x86_sse2_mfence:		// llvm.x86.sse2.mfence
  case Intrinsic::x86_sse_sfence:		// llvm.x86.sse.sfence
    VerifyIntrinsicPrototype(ID, IF, 0, 0);
    break;
  case Intrinsic::memcpy:		// llvm.memcpy
  case Intrinsic::memmove:		// llvm.memmove
    VerifyIntrinsicPrototype(ID, IF, 0, 5, MVT::iPTRAny, MVT::iPTRAny, MVT::iAny, MVT::i32, MVT::i1);
    break;
  case Intrinsic::memset:		// llvm.memset
    VerifyIntrinsicPrototype(ID, IF, 0, 5, MVT::iPTRAny, MVT::i8, MVT::iAny, MVT::i32, MVT::i1);
    break;
  case Intrinsic::invariant_end:		// llvm.invariant.end
    VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::i64, MVT::iPTR);
    break;
  case Intrinsic::memory_barrier:		// llvm.memory.barrier
    VerifyIntrinsicPrototype(ID, IF, 0, 5, MVT::i1, MVT::i1, MVT::i1, MVT::i1, MVT::i1);
    break;
  case Intrinsic::arm_set_fpscr:		// llvm.arm.set.fpscr
  case Intrinsic::eh_sjlj_callsite:		// llvm.eh.sjlj.callsite
  case Intrinsic::pcmarker:		// llvm.pcmarker
  case Intrinsic::ppc_altivec_dss:		// llvm.ppc.altivec.dss
    VerifyIntrinsicPrototype(ID, IF, 0, 1, MVT::i32);
    break;
  case Intrinsic::x86_sse3_mwait:		// llvm.x86.sse3.mwait
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::i32, MVT::i32);
    break;
  case Intrinsic::eh_return_i32:		// llvm.eh.return.i32
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::i32, MVT::iPTR);
    break;
  case Intrinsic::eh_return_i64:		// llvm.eh.return.i64
  case Intrinsic::lifetime_end:		// llvm.lifetime.end
  case Intrinsic::lifetime_start:		// llvm.lifetime.start
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::i64, MVT::iPTR);
    break;
  case Intrinsic::x86_int:		// llvm.x86.int
    VerifyIntrinsicPrototype(ID, IF, 0, 1, MVT::i8);
    break;
  case Intrinsic::dbg_value:		// llvm.dbg.value
    VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::Metadata, MVT::i64, MVT::Metadata);
    break;
  case Intrinsic::dbg_declare:		// llvm.dbg.declare
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::Metadata, MVT::Metadata);
    break;
  case Intrinsic::eh_sjlj_longjmp:		// llvm.eh.sjlj.longjmp
  case Intrinsic::ppc_dcba:		// llvm.ppc.dcba
  case Intrinsic::ppc_dcbf:		// llvm.ppc.dcbf
  case Intrinsic::ppc_dcbi:		// llvm.ppc.dcbi
  case Intrinsic::ppc_dcbst:		// llvm.ppc.dcbst
  case Intrinsic::ppc_dcbt:		// llvm.ppc.dcbt
  case Intrinsic::ppc_dcbtst:		// llvm.ppc.dcbtst
  case Intrinsic::ppc_dcbz:		// llvm.ppc.dcbz
  case Intrinsic::ppc_dcbzl:		// llvm.ppc.dcbzl
  case Intrinsic::stackrestore:		// llvm.stackrestore
  case Intrinsic::vaend:		// llvm.va_end
  case Intrinsic::vastart:		// llvm.va_start
  case Intrinsic::x86_sse2_clflush:		// llvm.x86.sse2.clflush
  case Intrinsic::x86_sse_ldmxcsr:		// llvm.x86.sse.ldmxcsr
  case Intrinsic::x86_sse_stmxcsr:		// llvm.x86.sse.stmxcsr
    VerifyIntrinsicPrototype(ID, IF, 0, 1, MVT::iPTR);
    break;
  case Intrinsic::arm_neon_vst2:		// llvm.arm.neon.vst2
    VerifyIntrinsicPrototype(ID, IF, 0, 4, MVT::iPTR, MVT::vAny, ~1, MVT::i32);
    break;
  case Intrinsic::arm_neon_vst3:		// llvm.arm.neon.vst3
    VerifyIntrinsicPrototype(ID, IF, 0, 5, MVT::iPTR, MVT::vAny, ~1, ~1, MVT::i32);
    break;
  case Intrinsic::arm_neon_vst4:		// llvm.arm.neon.vst4
    VerifyIntrinsicPrototype(ID, IF, 0, 6, MVT::iPTR, MVT::vAny, ~1, ~1, ~1, MVT::i32);
    break;
  case Intrinsic::arm_neon_vst2lane:		// llvm.arm.neon.vst2lane
    VerifyIntrinsicPrototype(ID, IF, 0, 5, MVT::iPTR, MVT::vAny, ~1, MVT::i32, MVT::i32);
    break;
  case Intrinsic::arm_neon_vst3lane:		// llvm.arm.neon.vst3lane
    VerifyIntrinsicPrototype(ID, IF, 0, 6, MVT::iPTR, MVT::vAny, ~1, ~1, MVT::i32, MVT::i32);
    break;
  case Intrinsic::arm_neon_vst4lane:		// llvm.arm.neon.vst4lane
    VerifyIntrinsicPrototype(ID, IF, 0, 7, MVT::iPTR, MVT::vAny, ~1, ~1, ~1, MVT::i32, MVT::i32);
    break;
  case Intrinsic::arm_neon_vst1:		// llvm.arm.neon.vst1
    VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::vAny, MVT::i32);
    break;
  case Intrinsic::longjmp:		// llvm.longjmp
  case Intrinsic::siglongjmp:		// llvm.siglongjmp
  case Intrinsic::x86_sse2_movnt_i:		// llvm.x86.sse2.movnt.i
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::i32);
    break;
  case Intrinsic::ppc_altivec_dst:		// llvm.ppc.altivec.dst
  case Intrinsic::ppc_altivec_dstst:		// llvm.ppc.altivec.dstst
  case Intrinsic::ppc_altivec_dststt:		// llvm.ppc.altivec.dststt
  case Intrinsic::ppc_altivec_dstt:		// llvm.ppc.altivec.dstt
  case Intrinsic::prefetch:		// llvm.prefetch
  case Intrinsic::x86_sse3_monitor:		// llvm.x86.sse3.monitor
    VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::i32, MVT::i32);
    break;
  case Intrinsic::vacopy:		// llvm.va_copy
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::iPTR);
    break;
  case Intrinsic::var_annotation:		// llvm.var.annotation
    VerifyIntrinsicPrototype(ID, IF, 0, 4, MVT::iPTR, MVT::iPTR, MVT::iPTR, MVT::i32);
    break;
  case Intrinsic::gcwrite:		// llvm.gcwrite
    VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::iPTR, MVT::iPTR);
    break;
  case Intrinsic::stackprotector:		// llvm.stackprotector
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::iPTR);
    break;
  case Intrinsic::x86_sse2_storeu_dq:		// llvm.x86.sse2.storeu.dq
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v16i8);
    break;
  case Intrinsic::x86_mmx_movnt_dq:		// llvm.x86.mmx.movnt.dq
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v1i64);
    break;
  case Intrinsic::x86_sse2_movnt_pd:		// llvm.x86.sse2.movnt.pd
  case Intrinsic::x86_sse2_storeu_pd:		// llvm.x86.sse2.storeu.pd
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v2f64);
    break;
  case Intrinsic::x86_avx_maskstore_pd:		// llvm.x86.avx.maskstore.pd
    VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v2f64, MVT::v2f64);
    break;
  case Intrinsic::x86_sse2_movnt_dq:		// llvm.x86.sse2.movnt.dq
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v2i64);
    break;
  case Intrinsic::x86_avx_storeu_dq_256:		// llvm.x86.avx.storeu.dq.256
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v32i8);
    break;
  case Intrinsic::x86_sse_movnt_ps:		// llvm.x86.sse.movnt.ps
  case Intrinsic::x86_sse_storeu_ps:		// llvm.x86.sse.storeu.ps
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v4f32);
    break;
  case Intrinsic::x86_avx_maskstore_ps:		// llvm.x86.avx.maskstore.ps
    VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v4f32, MVT::v4f32);
    break;
  case Intrinsic::x86_avx_movnt_pd_256:		// llvm.x86.avx.movnt.pd.256
  case Intrinsic::x86_avx_storeu_pd_256:		// llvm.x86.avx.storeu.pd.256
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v4f64);
    break;
  case Intrinsic::x86_avx_maskstore_pd_256:		// llvm.x86.avx.maskstore.pd.256
    VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v4f64, MVT::v4f64);
    break;
  case Intrinsic::x86_sse2_storel_dq:		// llvm.x86.sse2.storel.dq
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v4i32);
    break;
  case Intrinsic::x86_avx_movnt_dq_256:		// llvm.x86.avx.movnt.dq.256
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v4i64);
    break;
  case Intrinsic::x86_avx_movnt_ps_256:		// llvm.x86.avx.movnt.ps.256
  case Intrinsic::x86_avx_storeu_ps_256:		// llvm.x86.avx.storeu.ps.256
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v8f32);
    break;
  case Intrinsic::x86_avx_maskstore_ps_256:		// llvm.x86.avx.maskstore.ps.256
    VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v8f32, MVT::v8f32);
    break;
  case Intrinsic::gcroot:		// llvm.gcroot
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::iPTR);
    break;
  case Intrinsic::ppc_altivec_stvebx:		// llvm.ppc.altivec.stvebx
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::v16i8, MVT::iPTR);
    break;
  case Intrinsic::x86_sse2_maskmov_dqu:		// llvm.x86.sse2.maskmov.dqu
    VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::v16i8, MVT::v16i8, MVT::iPTR);
    break;
  case Intrinsic::ppc_altivec_mtvscr:		// llvm.ppc.altivec.mtvscr
    VerifyIntrinsicPrototype(ID, IF, 0, 1, MVT::v4i32);
    break;
  case Intrinsic::ppc_altivec_stvewx:		// llvm.ppc.altivec.stvewx
  case Intrinsic::ppc_altivec_stvx:		// llvm.ppc.altivec.stvx
  case Intrinsic::ppc_altivec_stvxl:		// llvm.ppc.altivec.stvxl
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::v4i32, MVT::iPTR);
    break;
  case Intrinsic::ppc_altivec_stvehx:		// llvm.ppc.altivec.stvehx
    VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::v8i16, MVT::iPTR);
    break;
  case Intrinsic::x86_mmx_maskmovq:		// llvm.x86.mmx.maskmovq
    VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::v8i8, MVT::v8i8, MVT::iPTR);
    break;
  case Intrinsic::ptr_annotation:		// llvm.ptr.annotation
    VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::iPTRAny, ~0, MVT::iPTR, MVT::iPTR, MVT::i32);
    break;
  case Intrinsic::sin:		// llvm.sin
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
    break;
  case Intrinsic::cos:		// llvm.cos
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
    break;
  case Intrinsic::pow:		// llvm.pow
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::fAny, ~0, ~0);
    break;
  case Intrinsic::log:		// llvm.log
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
    break;
  case Intrinsic::log10:		// llvm.log10
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
    break;
  case Intrinsic::log2:		// llvm.log2
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
    break;
  case Intrinsic::exp:		// llvm.exp
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
    break;
  case Intrinsic::exp2:		// llvm.exp2
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
    break;
  case Intrinsic::sqrt:		// llvm.sqrt
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
    break;
  case Intrinsic::powi:		// llvm.powi
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::fAny, ~0, MVT::i32);
    break;
  case Intrinsic::convertff:		// llvm.convertff
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::fAny, MVT::fAny, MVT::i32, MVT::i32);
    break;
  case Intrinsic::arm_neon_vcvtfxs2fp:		// llvm.arm.neon.vcvtfxs2fp
  case Intrinsic::arm_neon_vcvtfxu2fp:		// llvm.arm.neon.vcvtfxu2fp
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::fAny, MVT::iAny, MVT::i32);
    break;
  case Intrinsic::convertfsi:		// llvm.convertfsi
  case Intrinsic::convertfui:		// llvm.convertfui
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::fAny, MVT::iAny, MVT::i32, MVT::i32);
    break;
  case Intrinsic::bswap:		// llvm.bswap
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iAny, ~0);
    break;
  case Intrinsic::ctpop:		// llvm.ctpop
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iAny, ~0);
    break;
  case Intrinsic::ctlz:		// llvm.ctlz
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iAny, ~0);
    break;
  case Intrinsic::cttz:		// llvm.cttz
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iAny, ~0);
    break;
  case Intrinsic::annotation:		// llvm.annotation
    VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::iAny, ~0, MVT::iPTR, MVT::iPTR, MVT::i32);
    break;
  case Intrinsic::atomic_cmp_swap:		// llvm.atomic.cmp.swap
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::iAny, MVT::iPTRAny, ~0, ~0);
    break;
  case Intrinsic::atomic_load_add:		// llvm.atomic.load.add
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
    break;
  case Intrinsic::atomic_swap:		// llvm.atomic.swap
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
    break;
  case Intrinsic::atomic_load_sub:		// llvm.atomic.load.sub
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
    break;
  case Intrinsic::atomic_load_and:		// llvm.atomic.load.and
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
    break;
  case Intrinsic::atomic_load_or:		// llvm.atomic.load.or
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
    break;
  case Intrinsic::atomic_load_xor:		// llvm.atomic.load.xor
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
    break;
  case Intrinsic::atomic_load_nand:		// llvm.atomic.load.nand
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
    break;
  case Intrinsic::atomic_load_min:		// llvm.atomic.load.min
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
    break;
  case Intrinsic::atomic_load_max:		// llvm.atomic.load.max
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
    break;
  case Intrinsic::atomic_load_umin:		// llvm.atomic.load.umin
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
    break;
  case Intrinsic::atomic_load_umax:		// llvm.atomic.load.umax
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
    break;
  case Intrinsic::arm_neon_vcvtfp2fxs:		// llvm.arm.neon.vcvtfp2fxs
  case Intrinsic::arm_neon_vcvtfp2fxu:		// llvm.arm.neon.vcvtfp2fxu
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::fAny, MVT::i32);
    break;
  case Intrinsic::convertsif:		// llvm.convertsif
  case Intrinsic::convertuif:		// llvm.convertuif
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::iAny, MVT::fAny, MVT::i32, MVT::i32);
    break;
  case Intrinsic::convertss:		// llvm.convertss
  case Intrinsic::convertsu:		// llvm.convertsu
  case Intrinsic::convertus:		// llvm.convertus
  case Intrinsic::convertuu:		// llvm.convertuu
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::iAny, MVT::iAny, MVT::i32, MVT::i32);
    break;
  case Intrinsic::objectsize:		// llvm.objectsize
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTR, MVT::i1);
    break;
  case Intrinsic::sadd_with_overflow:		// llvm.sadd.with.overflow
    VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
    break;
  case Intrinsic::uadd_with_overflow:		// llvm.uadd.with.overflow
    VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
    break;
  case Intrinsic::ssub_with_overflow:		// llvm.ssub.with.overflow
    VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
    break;
  case Intrinsic::usub_with_overflow:		// llvm.usub.with.overflow
    VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
    break;
  case Intrinsic::smul_with_overflow:		// llvm.smul.with.overflow
    VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
    break;
  case Intrinsic::umul_with_overflow:		// llvm.umul.with.overflow
    VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
    break;
  case Intrinsic::arm_neon_vqdmlal:		// llvm.arm.neon.vqdmlal
  case Intrinsic::arm_neon_vqdmlsl:		// llvm.arm.neon.vqdmlsl
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::vAny, ~0, ~(TruncatedElementVectorType | 0), ~(TruncatedElementVectorType | 0));
    break;
  case Intrinsic::arm_neon_vpadals:		// llvm.arm.neon.vpadals
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~0, MVT::vAny);
    break;
  case Intrinsic::arm_neon_vpadalu:		// llvm.arm.neon.vpadalu
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~0, MVT::vAny);
    break;
  case Intrinsic::arm_neon_vabs:		// llvm.arm.neon.vabs
  case Intrinsic::arm_neon_vcls:		// llvm.arm.neon.vcls
  case Intrinsic::arm_neon_vclz:		// llvm.arm.neon.vclz
  case Intrinsic::arm_neon_vcnt:		// llvm.arm.neon.vcnt
  case Intrinsic::arm_neon_vqabs:		// llvm.arm.neon.vqabs
  case Intrinsic::arm_neon_vqneg:		// llvm.arm.neon.vqneg
  case Intrinsic::arm_neon_vrecpe:		// llvm.arm.neon.vrecpe
  case Intrinsic::arm_neon_vrsqrte:		// llvm.arm.neon.vrsqrte
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::vAny, ~0);
    break;
  case Intrinsic::arm_neon_vqmovns:		// llvm.arm.neon.vqmovns
  case Intrinsic::arm_neon_vqmovnsu:		// llvm.arm.neon.vqmovnsu
  case Intrinsic::arm_neon_vqmovnu:		// llvm.arm.neon.vqmovnu
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::vAny, ~(ExtendedElementVectorType | 0));
    break;
  case Intrinsic::arm_neon_vabds:		// llvm.arm.neon.vabds
  case Intrinsic::arm_neon_vabdu:		// llvm.arm.neon.vabdu
  case Intrinsic::arm_neon_vhadds:		// llvm.arm.neon.vhadds
  case Intrinsic::arm_neon_vhaddu:		// llvm.arm.neon.vhaddu
  case Intrinsic::arm_neon_vhsubs:		// llvm.arm.neon.vhsubs
  case Intrinsic::arm_neon_vhsubu:		// llvm.arm.neon.vhsubu
  case Intrinsic::arm_neon_vmaxs:		// llvm.arm.neon.vmaxs
  case Intrinsic::arm_neon_vmaxu:		// llvm.arm.neon.vmaxu
  case Intrinsic::arm_neon_vmins:		// llvm.arm.neon.vmins
  case Intrinsic::arm_neon_vminu:		// llvm.arm.neon.vminu
  case Intrinsic::arm_neon_vmulp:		// llvm.arm.neon.vmulp
  case Intrinsic::arm_neon_vpadd:		// llvm.arm.neon.vpadd
  case Intrinsic::arm_neon_vpmaxs:		// llvm.arm.neon.vpmaxs
  case Intrinsic::arm_neon_vpmaxu:		// llvm.arm.neon.vpmaxu
  case Intrinsic::arm_neon_vpmins:		// llvm.arm.neon.vpmins
  case Intrinsic::arm_neon_vpminu:		// llvm.arm.neon.vpminu
  case Intrinsic::arm_neon_vqadds:		// llvm.arm.neon.vqadds
  case Intrinsic::arm_neon_vqaddu:		// llvm.arm.neon.vqaddu
  case Intrinsic::arm_neon_vqdmulh:		// llvm.arm.neon.vqdmulh
  case Intrinsic::arm_neon_vqrdmulh:		// llvm.arm.neon.vqrdmulh
  case Intrinsic::arm_neon_vqrshifts:		// llvm.arm.neon.vqrshifts
  case Intrinsic::arm_neon_vqrshiftu:		// llvm.arm.neon.vqrshiftu
  case Intrinsic::arm_neon_vqshifts:		// llvm.arm.neon.vqshifts
  case Intrinsic::arm_neon_vqshiftsu:		// llvm.arm.neon.vqshiftsu
  case Intrinsic::arm_neon_vqshiftu:		// llvm.arm.neon.vqshiftu
  case Intrinsic::arm_neon_vqsubs:		// llvm.arm.neon.vqsubs
  case Intrinsic::arm_neon_vqsubu:		// llvm.arm.neon.vqsubu
  case Intrinsic::arm_neon_vrecps:		// llvm.arm.neon.vrecps
  case Intrinsic::arm_neon_vrhadds:		// llvm.arm.neon.vrhadds
  case Intrinsic::arm_neon_vrhaddu:		// llvm.arm.neon.vrhaddu
  case Intrinsic::arm_neon_vrshifts:		// llvm.arm.neon.vrshifts
  case Intrinsic::arm_neon_vrshiftu:		// llvm.arm.neon.vrshiftu
  case Intrinsic::arm_neon_vrsqrts:		// llvm.arm.neon.vrsqrts
  case Intrinsic::arm_neon_vshifts:		// llvm.arm.neon.vshifts
  case Intrinsic::arm_neon_vshiftu:		// llvm.arm.neon.vshiftu
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~0, ~0);
    break;
  case Intrinsic::arm_neon_vaddhn:		// llvm.arm.neon.vaddhn
  case Intrinsic::arm_neon_vqrshiftns:		// llvm.arm.neon.vqrshiftns
  case Intrinsic::arm_neon_vqrshiftnsu:		// llvm.arm.neon.vqrshiftnsu
  case Intrinsic::arm_neon_vqrshiftnu:		// llvm.arm.neon.vqrshiftnu
  case Intrinsic::arm_neon_vqshiftns:		// llvm.arm.neon.vqshiftns
  case Intrinsic::arm_neon_vqshiftnsu:		// llvm.arm.neon.vqshiftnsu
  case Intrinsic::arm_neon_vqshiftnu:		// llvm.arm.neon.vqshiftnu
  case Intrinsic::arm_neon_vraddhn:		// llvm.arm.neon.vraddhn
  case Intrinsic::arm_neon_vrshiftn:		// llvm.arm.neon.vrshiftn
  case Intrinsic::arm_neon_vrsubhn:		// llvm.arm.neon.vrsubhn
  case Intrinsic::arm_neon_vshiftn:		// llvm.arm.neon.vshiftn
  case Intrinsic::arm_neon_vsubhn:		// llvm.arm.neon.vsubhn
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~(ExtendedElementVectorType | 0), ~(ExtendedElementVectorType | 0));
    break;
  case Intrinsic::arm_neon_vmullp:		// llvm.arm.neon.vmullp
  case Intrinsic::arm_neon_vqdmull:		// llvm.arm.neon.vqdmull
  case Intrinsic::arm_neon_vshiftls:		// llvm.arm.neon.vshiftls
  case Intrinsic::arm_neon_vshiftlu:		// llvm.arm.neon.vshiftlu
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~(TruncatedElementVectorType | 0), ~(TruncatedElementVectorType | 0));
    break;
  case Intrinsic::arm_neon_vshiftins:		// llvm.arm.neon.vshiftins
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::vAny, ~0, ~0, ~0);
    break;
  case Intrinsic::arm_neon_vpaddls:		// llvm.arm.neon.vpaddls
  case Intrinsic::arm_neon_vpaddlu:		// llvm.arm.neon.vpaddlu
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::vAny, MVT::vAny);
    break;
  case Intrinsic::arm_neon_vld1:		// llvm.arm.neon.vld1
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, MVT::iPTR, MVT::i32);
    break;
  case Intrinsic::arm_neon_vld2:		// llvm.arm.neon.vld2
    VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::vAny, ~0, MVT::iPTR, MVT::i32);
    break;
  case Intrinsic::arm_neon_vld3:		// llvm.arm.neon.vld3
    VerifyIntrinsicPrototype(ID, IF, 3, 2, MVT::vAny, ~0, ~0, MVT::iPTR, MVT::i32);
    break;
  case Intrinsic::arm_neon_vld4:		// llvm.arm.neon.vld4
    VerifyIntrinsicPrototype(ID, IF, 4, 2, MVT::vAny, ~0, ~0, ~0, MVT::iPTR, MVT::i32);
    break;
  case Intrinsic::arm_neon_vld2lane:		// llvm.arm.neon.vld2lane
    VerifyIntrinsicPrototype(ID, IF, 2, 5, MVT::vAny, ~0, MVT::iPTR, ~0, ~0, MVT::i32, MVT::i32);
    break;
  case Intrinsic::arm_neon_vld3lane:		// llvm.arm.neon.vld3lane
    VerifyIntrinsicPrototype(ID, IF, 3, 6, MVT::vAny, ~0, ~0, MVT::iPTR, ~0, ~0, ~0, MVT::i32, MVT::i32);
    break;
  case Intrinsic::arm_neon_vld4lane:		// llvm.arm.neon.vld4lane
    VerifyIntrinsicPrototype(ID, IF, 4, 7, MVT::vAny, ~0, ~0, ~0, MVT::iPTR, ~0, ~0, ~0, ~0, MVT::i32, MVT::i32);
    break;
  case Intrinsic::invariant_start:		// llvm.invariant.start
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iPTR, MVT::i64, MVT::iPTR);
    break;
  case Intrinsic::arm_vcvtr:		// llvm.arm.vcvtr
  case Intrinsic::arm_vcvtru:		// llvm.arm.vcvtru
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::f32, MVT::fAny);
    break;
  case Intrinsic::convert_from_fp16:		// llvm.convert.from.fp16
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::f32, MVT::i16);
    break;
  case Intrinsic::convert_to_fp16:		// llvm.convert.to.fp16
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i16, MVT::f32);
    break;
  case Intrinsic::arm_get_fpscr:		// llvm.arm.get.fpscr
  case Intrinsic::flt_rounds:		// llvm.flt.rounds
  case Intrinsic::xcore_getid:		// llvm.xcore.getid
    VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::i32);
    break;
  case Intrinsic::xcore_bitrev:		// llvm.xcore.bitrev
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::i32);
    break;
  case Intrinsic::x86_sse42_crc32_16:		// llvm.x86.sse42.crc32.16
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::i32, MVT::i16);
    break;
  case Intrinsic::arm_qadd:		// llvm.arm.qadd
  case Intrinsic::arm_qsub:		// llvm.arm.qsub
  case Intrinsic::arm_ssat:		// llvm.arm.ssat
  case Intrinsic::arm_usat:		// llvm.arm.usat
  case Intrinsic::x86_sse42_crc32_32:		// llvm.x86.sse42.crc32.32
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::i32, MVT::i32);
    break;
  case Intrinsic::x86_sse42_crc32_8:		// llvm.x86.sse42.crc32.8
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::i32, MVT::i8);
    break;
  case Intrinsic::ppc_altivec_vcmpequb_p:		// llvm.ppc.altivec.vcmpequb.p
  case Intrinsic::ppc_altivec_vcmpgtsb_p:		// llvm.ppc.altivec.vcmpgtsb.p
  case Intrinsic::ppc_altivec_vcmpgtub_p:		// llvm.ppc.altivec.vcmpgtub.p
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v16i8, MVT::v16i8);
    break;
  case Intrinsic::ppc_altivec_vcmpbfp_p:		// llvm.ppc.altivec.vcmpbfp.p
  case Intrinsic::ppc_altivec_vcmpeqfp_p:		// llvm.ppc.altivec.vcmpeqfp.p
  case Intrinsic::ppc_altivec_vcmpgefp_p:		// llvm.ppc.altivec.vcmpgefp.p
  case Intrinsic::ppc_altivec_vcmpgtfp_p:		// llvm.ppc.altivec.vcmpgtfp.p
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v4f32, MVT::v4f32);
    break;
  case Intrinsic::ppc_altivec_vcmpequw_p:		// llvm.ppc.altivec.vcmpequw.p
  case Intrinsic::ppc_altivec_vcmpgtsw_p:		// llvm.ppc.altivec.vcmpgtsw.p
  case Intrinsic::ppc_altivec_vcmpgtuw_p:		// llvm.ppc.altivec.vcmpgtuw.p
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v4i32, MVT::v4i32);
    break;
  case Intrinsic::ppc_altivec_vcmpequh_p:		// llvm.ppc.altivec.vcmpequh.p
  case Intrinsic::ppc_altivec_vcmpgtsh_p:		// llvm.ppc.altivec.vcmpgtsh.p
  case Intrinsic::ppc_altivec_vcmpgtuh_p:		// llvm.ppc.altivec.vcmpgtuh.p
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v8i16, MVT::v8i16);
    break;
  case Intrinsic::eh_sjlj_setjmp:		// llvm.eh.sjlj.setjmp
  case Intrinsic::eh_typeid_for:		// llvm.eh.typeid.for
  case Intrinsic::setjmp:		// llvm.setjmp
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::iPTR);
    break;
  case Intrinsic::sigsetjmp:		// llvm.sigsetjmp
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::iPTR, MVT::i32);
    break;
  case Intrinsic::eh_selector:		// llvm.eh.selector
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::iPTR, MVT::iPTR, MVT::isVoid);
    break;
  case Intrinsic::x86_sse2_pmovmskb_128:		// llvm.x86.sse2.pmovmskb.128
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v16i8);
    break;
  case Intrinsic::x86_sse41_pextrb:		// llvm.x86.sse41.pextrb
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v16i8, MVT::i32);
    break;
  case Intrinsic::x86_sse42_pcmpestri128:		// llvm.x86.sse42.pcmpestri128
  case Intrinsic::x86_sse42_pcmpestria128:		// llvm.x86.sse42.pcmpestria128
  case Intrinsic::x86_sse42_pcmpestric128:		// llvm.x86.sse42.pcmpestric128
  case Intrinsic::x86_sse42_pcmpestrio128:		// llvm.x86.sse42.pcmpestrio128
  case Intrinsic::x86_sse42_pcmpestris128:		// llvm.x86.sse42.pcmpestris128
  case Intrinsic::x86_sse42_pcmpestriz128:		// llvm.x86.sse42.pcmpestriz128
    VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::i32, MVT::v16i8, MVT::i32, MVT::v16i8, MVT::i32, MVT::i8);
    break;
  case Intrinsic::x86_sse42_pcmpistri128:		// llvm.x86.sse42.pcmpistri128
  case Intrinsic::x86_sse42_pcmpistria128:		// llvm.x86.sse42.pcmpistria128
  case Intrinsic::x86_sse42_pcmpistric128:		// llvm.x86.sse42.pcmpistric128
  case Intrinsic::x86_sse42_pcmpistrio128:		// llvm.x86.sse42.pcmpistrio128
  case Intrinsic::x86_sse42_pcmpistris128:		// llvm.x86.sse42.pcmpistris128
  case Intrinsic::x86_sse42_pcmpistriz128:		// llvm.x86.sse42.pcmpistriz128
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::v16i8, MVT::v16i8, MVT::i8);
    break;
  case Intrinsic::x86_mmx_cvtsi64_si32:		// llvm.x86.mmx.cvtsi64.si32
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v1i64);
    break;
  case Intrinsic::x86_mmx_pextr_w:		// llvm.x86.mmx.pextr.w
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v1i64, MVT::i32);
    break;
  case Intrinsic::x86_sse2_cvtsd2si:		// llvm.x86.sse2.cvtsd2si
  case Intrinsic::x86_sse2_cvttsd2si:		// llvm.x86.sse2.cvttsd2si
  case Intrinsic::x86_sse2_movmsk_pd:		// llvm.x86.sse2.movmsk.pd
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v2f64);
    break;
  case Intrinsic::x86_avx_vtestc_pd:		// llvm.x86.avx.vtestc.pd
  case Intrinsic::x86_avx_vtestnzc_pd:		// llvm.x86.avx.vtestnzc.pd
  case Intrinsic::x86_avx_vtestz_pd:		// llvm.x86.avx.vtestz.pd
  case Intrinsic::x86_sse2_comieq_sd:		// llvm.x86.sse2.comieq.sd
  case Intrinsic::x86_sse2_comige_sd:		// llvm.x86.sse2.comige.sd
  case Intrinsic::x86_sse2_comigt_sd:		// llvm.x86.sse2.comigt.sd
  case Intrinsic::x86_sse2_comile_sd:		// llvm.x86.sse2.comile.sd
  case Intrinsic::x86_sse2_comilt_sd:		// llvm.x86.sse2.comilt.sd
  case Intrinsic::x86_sse2_comineq_sd:		// llvm.x86.sse2.comineq.sd
  case Intrinsic::x86_sse2_ucomieq_sd:		// llvm.x86.sse2.ucomieq.sd
  case Intrinsic::x86_sse2_ucomige_sd:		// llvm.x86.sse2.ucomige.sd
  case Intrinsic::x86_sse2_ucomigt_sd:		// llvm.x86.sse2.ucomigt.sd
  case Intrinsic::x86_sse2_ucomile_sd:		// llvm.x86.sse2.ucomile.sd
  case Intrinsic::x86_sse2_ucomilt_sd:		// llvm.x86.sse2.ucomilt.sd
  case Intrinsic::x86_sse2_ucomineq_sd:		// llvm.x86.sse2.ucomineq.sd
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v2f64, MVT::v2f64);
    break;
  case Intrinsic::x86_sse_cvtss2si:		// llvm.x86.sse.cvtss2si
  case Intrinsic::x86_sse_cvttss2si:		// llvm.x86.sse.cvttss2si
  case Intrinsic::x86_sse_movmsk_ps:		// llvm.x86.sse.movmsk.ps
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v4f32);
    break;
  case Intrinsic::x86_sse41_extractps:		// llvm.x86.sse41.extractps
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4f32, MVT::i32);
    break;
  case Intrinsic::x86_avx_vtestc_ps:		// llvm.x86.avx.vtestc.ps
  case Intrinsic::x86_avx_vtestnzc_ps:		// llvm.x86.avx.vtestnzc.ps
  case Intrinsic::x86_avx_vtestz_ps:		// llvm.x86.avx.vtestz.ps
  case Intrinsic::x86_sse41_ptestc:		// llvm.x86.sse41.ptestc
  case Intrinsic::x86_sse41_ptestnzc:		// llvm.x86.sse41.ptestnzc
  case Intrinsic::x86_sse41_ptestz:		// llvm.x86.sse41.ptestz
  case Intrinsic::x86_sse_comieq_ss:		// llvm.x86.sse.comieq.ss
  case Intrinsic::x86_sse_comige_ss:		// llvm.x86.sse.comige.ss
  case Intrinsic::x86_sse_comigt_ss:		// llvm.x86.sse.comigt.ss
  case Intrinsic::x86_sse_comile_ss:		// llvm.x86.sse.comile.ss
  case Intrinsic::x86_sse_comilt_ss:		// llvm.x86.sse.comilt.ss
  case Intrinsic::x86_sse_comineq_ss:		// llvm.x86.sse.comineq.ss
  case Intrinsic::x86_sse_ucomieq_ss:		// llvm.x86.sse.ucomieq.ss
  case Intrinsic::x86_sse_ucomige_ss:		// llvm.x86.sse.ucomige.ss
  case Intrinsic::x86_sse_ucomigt_ss:		// llvm.x86.sse.ucomigt.ss
  case Intrinsic::x86_sse_ucomile_ss:		// llvm.x86.sse.ucomile.ss
  case Intrinsic::x86_sse_ucomilt_ss:		// llvm.x86.sse.ucomilt.ss
  case Intrinsic::x86_sse_ucomineq_ss:		// llvm.x86.sse.ucomineq.ss
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4f32, MVT::v4f32);
    break;
  case Intrinsic::x86_avx_movmsk_pd_256:		// llvm.x86.avx.movmsk.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v4f64);
    break;
  case Intrinsic::x86_avx_vtestc_pd_256:		// llvm.x86.avx.vtestc.pd.256
  case Intrinsic::x86_avx_vtestnzc_pd_256:		// llvm.x86.avx.vtestnzc.pd.256
  case Intrinsic::x86_avx_vtestz_pd_256:		// llvm.x86.avx.vtestz.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4f64, MVT::v4f64);
    break;
  case Intrinsic::x86_sse41_pextrd:		// llvm.x86.sse41.pextrd
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4i32, MVT::i32);
    break;
  case Intrinsic::x86_avx_ptestc_256:		// llvm.x86.avx.ptestc.256
  case Intrinsic::x86_avx_ptestnzc_256:		// llvm.x86.avx.ptestnzc.256
  case Intrinsic::x86_avx_ptestz_256:		// llvm.x86.avx.ptestz.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4i64, MVT::v4i64);
    break;
  case Intrinsic::x86_avx_movmsk_ps_256:		// llvm.x86.avx.movmsk.ps.256
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v8f32);
    break;
  case Intrinsic::x86_avx_vtestc_ps_256:		// llvm.x86.avx.vtestc.ps.256
  case Intrinsic::x86_avx_vtestnzc_ps_256:		// llvm.x86.avx.vtestnzc.ps.256
  case Intrinsic::x86_avx_vtestz_ps_256:		// llvm.x86.avx.vtestz.ps.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v8f32, MVT::v8f32);
    break;
  case Intrinsic::x86_mmx_pmovmskb:		// llvm.x86.mmx.pmovmskb
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v8i8);
    break;
  case Intrinsic::readcyclecounter:		// llvm.readcyclecounter
    VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::i64);
    break;
  case Intrinsic::alpha_umulh:		// llvm.alpha.umulh
  case Intrinsic::x86_sse42_crc64_64:		// llvm.x86.sse42.crc64.64
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i64, MVT::i64, MVT::i64);
    break;
  case Intrinsic::x86_sse42_crc64_8:		// llvm.x86.sse42.crc64.8
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i64, MVT::i64, MVT::i8);
    break;
  case Intrinsic::x86_sse2_cvtsd2si64:		// llvm.x86.sse2.cvtsd2si64
  case Intrinsic::x86_sse2_cvttsd2si64:		// llvm.x86.sse2.cvttsd2si64
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i64, MVT::v2f64);
    break;
  case Intrinsic::x86_sse41_pextrq:		// llvm.x86.sse41.pextrq
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i64, MVT::v2i64, MVT::i32);
    break;
  case Intrinsic::x86_sse_cvtss2si64:		// llvm.x86.sse.cvtss2si64
  case Intrinsic::x86_sse_cvttss2si64:		// llvm.x86.sse.cvttss2si64
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i64, MVT::v4f32);
    break;
  case Intrinsic::arm_thread_pointer:		// llvm.arm.thread.pointer
  case Intrinsic::eh_exception:		// llvm.eh.exception
  case Intrinsic::eh_sjlj_lsda:		// llvm.eh.sjlj.lsda
  case Intrinsic::stacksave:		// llvm.stacksave
    VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::iPTR);
    break;
  case Intrinsic::eh_dwarf_cfa:		// llvm.eh.dwarf.cfa
  case Intrinsic::frameaddress:		// llvm.frameaddress
  case Intrinsic::returnaddress:		// llvm.returnaddress
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iPTR, MVT::i32);
    break;
  case Intrinsic::init_trampoline:		// llvm.init.trampoline
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::iPTR, MVT::iPTR, MVT::iPTR, MVT::iPTR);
    break;
  case Intrinsic::gcread:		// llvm.gcread
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iPTR, MVT::iPTR, MVT::iPTR);
    break;
  case Intrinsic::ppc_altivec_lvebx:		// llvm.ppc.altivec.lvebx
  case Intrinsic::ppc_altivec_lvsl:		// llvm.ppc.altivec.lvsl
  case Intrinsic::ppc_altivec_lvsr:		// llvm.ppc.altivec.lvsr
  case Intrinsic::x86_sse2_loadu_dq:		// llvm.x86.sse2.loadu.dq
  case Intrinsic::x86_sse3_ldu_dq:		// llvm.x86.sse3.ldu.dq
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v16i8, MVT::iPTR);
    break;
  case Intrinsic::x86_ssse3_pabs_b_128:		// llvm.x86.ssse3.pabs.b.128
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v16i8, MVT::v16i8);
    break;
  case Intrinsic::spu_si_shlqbii:		// llvm.spu.si.shlqbii
  case Intrinsic::spu_si_shlqbyi:		// llvm.spu.si.shlqbyi
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v16i8, MVT::i8);
    break;
  case Intrinsic::x86_sse42_pcmpestrm128:		// llvm.x86.sse42.pcmpestrm128
    VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::v16i8, MVT::v16i8, MVT::i32, MVT::v16i8, MVT::i32, MVT::i8);
    break;
  case Intrinsic::spu_si_andbi:		// llvm.spu.si.andbi
  case Intrinsic::spu_si_ceqbi:		// llvm.spu.si.ceqbi
  case Intrinsic::spu_si_cgtbi:		// llvm.spu.si.cgtbi
  case Intrinsic::spu_si_clgtbi:		// llvm.spu.si.clgtbi
  case Intrinsic::spu_si_orbi:		// llvm.spu.si.orbi
  case Intrinsic::spu_si_xorbi:		// llvm.spu.si.xorbi
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v16i8, MVT::i8);
    break;
  case Intrinsic::ppc_altivec_vaddsbs:		// llvm.ppc.altivec.vaddsbs
  case Intrinsic::ppc_altivec_vaddubs:		// llvm.ppc.altivec.vaddubs
  case Intrinsic::ppc_altivec_vavgsb:		// llvm.ppc.altivec.vavgsb
  case Intrinsic::ppc_altivec_vavgub:		// llvm.ppc.altivec.vavgub
  case Intrinsic::ppc_altivec_vcmpequb:		// llvm.ppc.altivec.vcmpequb
  case Intrinsic::ppc_altivec_vcmpgtsb:		// llvm.ppc.altivec.vcmpgtsb
  case Intrinsic::ppc_altivec_vcmpgtub:		// llvm.ppc.altivec.vcmpgtub
  case Intrinsic::ppc_altivec_vmaxsb:		// llvm.ppc.altivec.vmaxsb
  case Intrinsic::ppc_altivec_vmaxub:		// llvm.ppc.altivec.vmaxub
  case Intrinsic::ppc_altivec_vminsb:		// llvm.ppc.altivec.vminsb
  case Intrinsic::ppc_altivec_vminub:		// llvm.ppc.altivec.vminub
  case Intrinsic::ppc_altivec_vrlb:		// llvm.ppc.altivec.vrlb
  case Intrinsic::ppc_altivec_vslb:		// llvm.ppc.altivec.vslb
  case Intrinsic::ppc_altivec_vsrab:		// llvm.ppc.altivec.vsrab
  case Intrinsic::ppc_altivec_vsrb:		// llvm.ppc.altivec.vsrb
  case Intrinsic::ppc_altivec_vsubsbs:		// llvm.ppc.altivec.vsubsbs
  case Intrinsic::ppc_altivec_vsububs:		// llvm.ppc.altivec.vsububs
  case Intrinsic::spu_si_ceqb:		// llvm.spu.si.ceqb
  case Intrinsic::spu_si_cgtb:		// llvm.spu.si.cgtb
  case Intrinsic::spu_si_clgtb:		// llvm.spu.si.clgtb
  case Intrinsic::x86_sse2_padds_b:		// llvm.x86.sse2.padds.b
  case Intrinsic::x86_sse2_paddus_b:		// llvm.x86.sse2.paddus.b
  case Intrinsic::x86_sse2_pavg_b:		// llvm.x86.sse2.pavg.b
  case Intrinsic::x86_sse2_pcmpeq_b:		// llvm.x86.sse2.pcmpeq.b
  case Intrinsic::x86_sse2_pcmpgt_b:		// llvm.x86.sse2.pcmpgt.b
  case Intrinsic::x86_sse2_pmaxu_b:		// llvm.x86.sse2.pmaxu.b
  case Intrinsic::x86_sse2_pminu_b:		// llvm.x86.sse2.pminu.b
  case Intrinsic::x86_sse2_psubs_b:		// llvm.x86.sse2.psubs.b
  case Intrinsic::x86_sse2_psubus_b:		// llvm.x86.sse2.psubus.b
  case Intrinsic::x86_sse41_pmaxsb:		// llvm.x86.sse41.pmaxsb
  case Intrinsic::x86_sse41_pminsb:		// llvm.x86.sse41.pminsb
  case Intrinsic::x86_ssse3_pshuf_b_128:		// llvm.x86.ssse3.pshuf.b.128
  case Intrinsic::x86_ssse3_psign_b_128:		// llvm.x86.ssse3.psign.b.128
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v16i8, MVT::v16i8);
    break;
  case Intrinsic::x86_sse41_mpsadbw:		// llvm.x86.sse41.mpsadbw
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v16i8, MVT::v16i8, MVT::v16i8, MVT::i32);
    break;
  case Intrinsic::x86_sse42_pcmpistrm128:		// llvm.x86.sse42.pcmpistrm128
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v16i8, MVT::v16i8, MVT::v16i8, MVT::i8);
    break;
  case Intrinsic::x86_sse41_pblendvb:		// llvm.x86.sse41.pblendvb
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v16i8, MVT::v16i8, MVT::v16i8, MVT::v16i8);
    break;
  case Intrinsic::ppc_altivec_vpkswss:		// llvm.ppc.altivec.vpkswss
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v4i32, MVT::v4i32);
    break;
  case Intrinsic::ppc_altivec_vpkshss:		// llvm.ppc.altivec.vpkshss
  case Intrinsic::ppc_altivec_vpkshus:		// llvm.ppc.altivec.vpkshus
  case Intrinsic::ppc_altivec_vpkuhus:		// llvm.ppc.altivec.vpkuhus
  case Intrinsic::x86_sse2_packsswb_128:		// llvm.x86.sse2.packsswb.128
  case Intrinsic::x86_sse2_packuswb_128:		// llvm.x86.sse2.packuswb.128
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v8i16, MVT::v8i16);
    break;
  case Intrinsic::x86_mmx_cvtsi32_si64:		// llvm.x86.mmx.cvtsi32.si64
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v1i64, MVT::i32);
    break;
  case Intrinsic::x86_mmx_pslli_q:		// llvm.x86.mmx.pslli.q
  case Intrinsic::x86_mmx_psrli_q:		// llvm.x86.mmx.psrli.q
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v1i64, MVT::v1i64, MVT::i32);
    break;
  case Intrinsic::x86_mmx_pinsr_w:		// llvm.x86.mmx.pinsr.w
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v1i64, MVT::v1i64, MVT::i32, MVT::i32);
    break;
  case Intrinsic::x86_mmx_padd_q:		// llvm.x86.mmx.padd.q
  case Intrinsic::x86_mmx_pand:		// llvm.x86.mmx.pand
  case Intrinsic::x86_mmx_pandn:		// llvm.x86.mmx.pandn
  case Intrinsic::x86_mmx_por:		// llvm.x86.mmx.por
  case Intrinsic::x86_mmx_psll_q:		// llvm.x86.mmx.psll.q
  case Intrinsic::x86_mmx_psrl_q:		// llvm.x86.mmx.psrl.q
  case Intrinsic::x86_mmx_psub_q:		// llvm.x86.mmx.psub.q
  case Intrinsic::x86_mmx_pxor:		// llvm.x86.mmx.pxor
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v1i64, MVT::v1i64, MVT::v1i64);
    break;
  case Intrinsic::x86_sse2_loadu_pd:		// llvm.x86.sse2.loadu.pd
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::iPTR);
    break;
  case Intrinsic::x86_avx_maskload_pd:		// llvm.x86.avx.maskload.pd
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::iPTR, MVT::v2f64);
    break;
  case Intrinsic::x86_sse2_sqrt_pd:		// llvm.x86.sse2.sqrt.pd
  case Intrinsic::x86_sse2_sqrt_sd:		// llvm.x86.sse2.sqrt.sd
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::v2f64);
    break;
  case Intrinsic::x86_sse2_cvtsi2sd:		// llvm.x86.sse2.cvtsi2sd
  case Intrinsic::x86_sse41_round_pd:		// llvm.x86.sse41.round.pd
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::i32);
    break;
  case Intrinsic::x86_sse2_cvtsi642sd:		// llvm.x86.sse2.cvtsi642sd
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::i64);
    break;
  case Intrinsic::x86_avx_vpermil_pd:		// llvm.x86.avx.vpermil.pd
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::i8);
    break;
  case Intrinsic::spu_si_dfa:		// llvm.spu.si.dfa
  case Intrinsic::spu_si_dfm:		// llvm.spu.si.dfm
  case Intrinsic::spu_si_dfma:		// llvm.spu.si.dfma
  case Intrinsic::spu_si_dfms:		// llvm.spu.si.dfms
  case Intrinsic::spu_si_dfnma:		// llvm.spu.si.dfnma
  case Intrinsic::spu_si_dfnms:		// llvm.spu.si.dfnms
  case Intrinsic::spu_si_dfs:		// llvm.spu.si.dfs
  case Intrinsic::x86_sse2_add_sd:		// llvm.x86.sse2.add.sd
  case Intrinsic::x86_sse2_div_sd:		// llvm.x86.sse2.div.sd
  case Intrinsic::x86_sse2_max_pd:		// llvm.x86.sse2.max.pd
  case Intrinsic::x86_sse2_max_sd:		// llvm.x86.sse2.max.sd
  case Intrinsic::x86_sse2_min_pd:		// llvm.x86.sse2.min.pd
  case Intrinsic::x86_sse2_min_sd:		// llvm.x86.sse2.min.sd
  case Intrinsic::x86_sse2_mul_sd:		// llvm.x86.sse2.mul.sd
  case Intrinsic::x86_sse2_sub_sd:		// llvm.x86.sse2.sub.sd
  case Intrinsic::x86_sse3_addsub_pd:		// llvm.x86.sse3.addsub.pd
  case Intrinsic::x86_sse3_hadd_pd:		// llvm.x86.sse3.hadd.pd
  case Intrinsic::x86_sse3_hsub_pd:		// llvm.x86.sse3.hsub.pd
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::v2f64);
    break;
  case Intrinsic::x86_sse41_blendpd:		// llvm.x86.sse41.blendpd
  case Intrinsic::x86_sse41_dppd:		// llvm.x86.sse41.dppd
  case Intrinsic::x86_sse41_round_sd:		// llvm.x86.sse41.round.sd
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v2f64, MVT::v2f64, MVT::v2f64, MVT::i32);
    break;
  case Intrinsic::x86_sse2_cmp_pd:		// llvm.x86.sse2.cmp.pd
  case Intrinsic::x86_sse2_cmp_sd:		// llvm.x86.sse2.cmp.sd
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v2f64, MVT::v2f64, MVT::v2f64, MVT::i8);
    break;
  case Intrinsic::x86_sse41_blendvpd:		// llvm.x86.sse41.blendvpd
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v2f64, MVT::v2f64, MVT::v2f64, MVT::v2f64);
    break;
  case Intrinsic::x86_avx_vpermilvar_pd:		// llvm.x86.avx.vpermilvar.pd
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::v2i64);
    break;
  case Intrinsic::x86_sse2_cvtss2sd:		// llvm.x86.sse2.cvtss2sd
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::v4f32);
    break;
  case Intrinsic::x86_sse_cvtpi2pd:		// llvm.x86.sse.cvtpi2pd
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::v2i32);
    break;
  case Intrinsic::x86_sse2_cvtps2pd:		// llvm.x86.sse2.cvtps2pd
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::v4f32);
    break;
  case Intrinsic::x86_avx_vextractf128_pd_256:		// llvm.x86.avx.vextractf128.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v4f64, MVT::i8);
    break;
  case Intrinsic::x86_sse2_cvtdq2pd:		// llvm.x86.sse2.cvtdq2pd
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::v4i32);
    break;
  case Intrinsic::x86_mmx_vec_init_d:		// llvm.x86.mmx.vec.init.d
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::i32, MVT::i32);
    break;
  case Intrinsic::arm_neon_vacged:		// llvm.arm.neon.vacged
  case Intrinsic::arm_neon_vacgtd:		// llvm.arm.neon.vacgtd
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v2f32, MVT::v2f32);
    break;
  case Intrinsic::x86_sse_cvtpd2pi:		// llvm.x86.sse.cvtpd2pi
  case Intrinsic::x86_sse_cvttpd2pi:		// llvm.x86.sse.cvttpd2pi
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i32, MVT::v2f64);
    break;
  case Intrinsic::x86_ssse3_pabs_d:		// llvm.x86.ssse3.pabs.d
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i32, MVT::v2i32);
    break;
  case Intrinsic::x86_mmx_pslli_d:		// llvm.x86.mmx.pslli.d
  case Intrinsic::x86_mmx_psrai_d:		// llvm.x86.mmx.psrai.d
  case Intrinsic::x86_mmx_psrli_d:		// llvm.x86.mmx.psrli.d
  case Intrinsic::x86_mmx_vec_ext_d:		// llvm.x86.mmx.vec.ext.d
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v2i32, MVT::i32);
    break;
  case Intrinsic::x86_mmx_psll_d:		// llvm.x86.mmx.psll.d
  case Intrinsic::x86_mmx_psra_d:		// llvm.x86.mmx.psra.d
  case Intrinsic::x86_mmx_psrl_d:		// llvm.x86.mmx.psrl.d
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v2i32, MVT::v1i64);
    break;
  case Intrinsic::x86_mmx_padd_d:		// llvm.x86.mmx.padd.d
  case Intrinsic::x86_mmx_pcmpeq_d:		// llvm.x86.mmx.pcmpeq.d
  case Intrinsic::x86_mmx_pcmpgt_d:		// llvm.x86.mmx.pcmpgt.d
  case Intrinsic::x86_mmx_pmulu_dq:		// llvm.x86.mmx.pmulu.dq
  case Intrinsic::x86_mmx_psub_d:		// llvm.x86.mmx.psub.d
  case Intrinsic::x86_mmx_punpckhdq:		// llvm.x86.mmx.punpckhdq
  case Intrinsic::x86_mmx_punpckldq:		// llvm.x86.mmx.punpckldq
  case Intrinsic::x86_ssse3_phadd_d:		// llvm.x86.ssse3.phadd.d
  case Intrinsic::x86_ssse3_phsub_d:		// llvm.x86.ssse3.phsub.d
  case Intrinsic::x86_ssse3_psign_d:		// llvm.x86.ssse3.psign.d
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v2i32, MVT::v2i32);
    break;
  case Intrinsic::x86_sse_cvtps2pi:		// llvm.x86.sse.cvtps2pi
  case Intrinsic::x86_sse_cvttps2pi:		// llvm.x86.sse.cvttps2pi
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i32, MVT::v4f32);
    break;
  case Intrinsic::x86_mmx_pmadd_wd:		// llvm.x86.mmx.pmadd.wd
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v4i16, MVT::v4i16);
    break;
  case Intrinsic::x86_sse41_movntdqa:		// llvm.x86.sse41.movntdqa
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::iPTR);
    break;
  case Intrinsic::x86_sse41_pmovsxbq:		// llvm.x86.sse41.pmovsxbq
  case Intrinsic::x86_sse41_pmovzxbq:		// llvm.x86.sse41.pmovzxbq
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::v16i8);
    break;
  case Intrinsic::x86_sse2_psad_bw:		// llvm.x86.sse2.psad.bw
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v16i8, MVT::v16i8);
    break;
  case Intrinsic::x86_aesni_aesimc:		// llvm.x86.aesni.aesimc
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::v2i64);
    break;
  case Intrinsic::x86_sse2_psll_dq:		// llvm.x86.sse2.psll.dq
  case Intrinsic::x86_sse2_psll_dq_bs:		// llvm.x86.sse2.psll.dq.bs
  case Intrinsic::x86_sse2_pslli_q:		// llvm.x86.sse2.pslli.q
  case Intrinsic::x86_sse2_psrl_dq:		// llvm.x86.sse2.psrl.dq
  case Intrinsic::x86_sse2_psrl_dq_bs:		// llvm.x86.sse2.psrl.dq.bs
  case Intrinsic::x86_sse2_psrli_q:		// llvm.x86.sse2.psrli.q
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v2i64, MVT::i32);
    break;
  case Intrinsic::x86_aesni_aeskeygenassist:		// llvm.x86.aesni.aeskeygenassist
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v2i64, MVT::i8);
    break;
  case Intrinsic::x86_aesni_aesdec:		// llvm.x86.aesni.aesdec
  case Intrinsic::x86_aesni_aesdeclast:		// llvm.x86.aesni.aesdeclast
  case Intrinsic::x86_aesni_aesenc:		// llvm.x86.aesni.aesenc
  case Intrinsic::x86_aesni_aesenclast:		// llvm.x86.aesni.aesenclast
  case Intrinsic::x86_sse2_psll_q:		// llvm.x86.sse2.psll.q
  case Intrinsic::x86_sse2_psrl_q:		// llvm.x86.sse2.psrl.q
  case Intrinsic::x86_sse41_pcmpeqq:		// llvm.x86.sse41.pcmpeqq
  case Intrinsic::x86_sse42_pcmpgtq:		// llvm.x86.sse42.pcmpgtq
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v2i64, MVT::v2i64);
    break;
  case Intrinsic::x86_sse41_pmovsxdq:		// llvm.x86.sse41.pmovsxdq
  case Intrinsic::x86_sse41_pmovzxdq:		// llvm.x86.sse41.pmovzxdq
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::v4i32);
    break;
  case Intrinsic::x86_sse2_pmulu_dq:		// llvm.x86.sse2.pmulu.dq
  case Intrinsic::x86_sse41_pmuldq:		// llvm.x86.sse41.pmuldq
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v4i32, MVT::v4i32);
    break;
  case Intrinsic::x86_sse41_pmovsxwq:		// llvm.x86.sse41.pmovsxwq
  case Intrinsic::x86_sse41_pmovzxwq:		// llvm.x86.sse41.pmovzxwq
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::v8i16);
    break;
  case Intrinsic::x86_avx_ldu_dq_256:		// llvm.x86.avx.ldu.dq.256
  case Intrinsic::x86_avx_loadu_dq_256:		// llvm.x86.avx.loadu.dq.256
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v32i8, MVT::iPTR);
    break;
  case Intrinsic::x86_avx_vbroadcastss:		// llvm.x86.avx.vbroadcastss
  case Intrinsic::x86_sse_loadu_ps:		// llvm.x86.sse.loadu.ps
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::iPTR);
    break;
  case Intrinsic::x86_avx_maskload_ps:		// llvm.x86.avx.maskload.ps
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::iPTR, MVT::v4f32);
    break;
  case Intrinsic::x86_sse2_cvtpd2ps:		// llvm.x86.sse2.cvtpd2ps
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v2f64);
    break;
  case Intrinsic::ppc_altivec_vexptefp:		// llvm.ppc.altivec.vexptefp
  case Intrinsic::ppc_altivec_vlogefp:		// llvm.ppc.altivec.vlogefp
  case Intrinsic::ppc_altivec_vrefp:		// llvm.ppc.altivec.vrefp
  case Intrinsic::ppc_altivec_vrfim:		// llvm.ppc.altivec.vrfim
  case Intrinsic::ppc_altivec_vrfin:		// llvm.ppc.altivec.vrfin
  case Intrinsic::ppc_altivec_vrfip:		// llvm.ppc.altivec.vrfip
  case Intrinsic::ppc_altivec_vrfiz:		// llvm.ppc.altivec.vrfiz
  case Intrinsic::ppc_altivec_vrsqrtefp:		// llvm.ppc.altivec.vrsqrtefp
  case Intrinsic::x86_sse_rcp_ps:		// llvm.x86.sse.rcp.ps
  case Intrinsic::x86_sse_rcp_ss:		// llvm.x86.sse.rcp.ss
  case Intrinsic::x86_sse_rsqrt_ps:		// llvm.x86.sse.rsqrt.ps
  case Intrinsic::x86_sse_rsqrt_ss:		// llvm.x86.sse.rsqrt.ss
  case Intrinsic::x86_sse_sqrt_ps:		// llvm.x86.sse.sqrt.ps
  case Intrinsic::x86_sse_sqrt_ss:		// llvm.x86.sse.sqrt.ss
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v4f32);
    break;
  case Intrinsic::x86_sse41_round_ps:		// llvm.x86.sse41.round.ps
  case Intrinsic::x86_sse_cvtsi2ss:		// llvm.x86.sse.cvtsi2ss
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::i32);
    break;
  case Intrinsic::x86_sse_cvtsi642ss:		// llvm.x86.sse.cvtsi642ss
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::i64);
    break;
  case Intrinsic::x86_avx_vpermil_ps:		// llvm.x86.avx.vpermil.ps
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::i8);
    break;
  case Intrinsic::x86_sse2_cvtsd2ss:		// llvm.x86.sse2.cvtsd2ss
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::v2f64);
    break;
  case Intrinsic::x86_sse_cvtpi2ps:		// llvm.x86.sse.cvtpi2ps
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::v2i32);
    break;
  case Intrinsic::ppc_altivec_vmaxfp:		// llvm.ppc.altivec.vmaxfp
  case Intrinsic::ppc_altivec_vminfp:		// llvm.ppc.altivec.vminfp
  case Intrinsic::spu_si_fa:		// llvm.spu.si.fa
  case Intrinsic::spu_si_fceq:		// llvm.spu.si.fceq
  case Intrinsic::spu_si_fcgt:		// llvm.spu.si.fcgt
  case Intrinsic::spu_si_fcmeq:		// llvm.spu.si.fcmeq
  case Intrinsic::spu_si_fcmgt:		// llvm.spu.si.fcmgt
  case Intrinsic::spu_si_fm:		// llvm.spu.si.fm
  case Intrinsic::spu_si_fs:		// llvm.spu.si.fs
  case Intrinsic::x86_sse3_addsub_ps:		// llvm.x86.sse3.addsub.ps
  case Intrinsic::x86_sse3_hadd_ps:		// llvm.x86.sse3.hadd.ps
  case Intrinsic::x86_sse3_hsub_ps:		// llvm.x86.sse3.hsub.ps
  case Intrinsic::x86_sse_add_ss:		// llvm.x86.sse.add.ss
  case Intrinsic::x86_sse_div_ss:		// llvm.x86.sse.div.ss
  case Intrinsic::x86_sse_max_ps:		// llvm.x86.sse.max.ps
  case Intrinsic::x86_sse_max_ss:		// llvm.x86.sse.max.ss
  case Intrinsic::x86_sse_min_ps:		// llvm.x86.sse.min.ps
  case Intrinsic::x86_sse_min_ss:		// llvm.x86.sse.min.ss
  case Intrinsic::x86_sse_mul_ss:		// llvm.x86.sse.mul.ss
  case Intrinsic::x86_sse_sub_ss:		// llvm.x86.sse.sub.ss
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::v4f32);
    break;
  case Intrinsic::x86_sse41_blendps:		// llvm.x86.sse41.blendps
  case Intrinsic::x86_sse41_dpps:		// llvm.x86.sse41.dpps
  case Intrinsic::x86_sse41_insertps:		// llvm.x86.sse41.insertps
  case Intrinsic::x86_sse41_round_ss:		// llvm.x86.sse41.round.ss
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f32, MVT::v4f32, MVT::v4f32, MVT::i32);
    break;
  case Intrinsic::x86_sse_cmp_ps:		// llvm.x86.sse.cmp.ps
  case Intrinsic::x86_sse_cmp_ss:		// llvm.x86.sse.cmp.ss
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f32, MVT::v4f32, MVT::v4f32, MVT::i8);
    break;
  case Intrinsic::ppc_altivec_vmaddfp:		// llvm.ppc.altivec.vmaddfp
  case Intrinsic::ppc_altivec_vnmsubfp:		// llvm.ppc.altivec.vnmsubfp
  case Intrinsic::spu_si_fma:		// llvm.spu.si.fma
  case Intrinsic::spu_si_fms:		// llvm.spu.si.fms
  case Intrinsic::spu_si_fnms:		// llvm.spu.si.fnms
  case Intrinsic::x86_sse41_blendvps:		// llvm.x86.sse41.blendvps
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f32, MVT::v4f32, MVT::v4f32, MVT::v4f32);
    break;
  case Intrinsic::x86_avx_vpermilvar_ps:		// llvm.x86.avx.vpermilvar.ps
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::v4i32);
    break;
  case Intrinsic::x86_avx_cvt_pd2_ps_256:		// llvm.x86.avx.cvt.pd2.ps.256
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v4f64);
    break;
  case Intrinsic::x86_sse2_cvtdq2ps:		// llvm.x86.sse2.cvtdq2ps
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v4i32);
    break;
  case Intrinsic::ppc_altivec_vcfsx:		// llvm.ppc.altivec.vcfsx
  case Intrinsic::ppc_altivec_vcfux:		// llvm.ppc.altivec.vcfux
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4i32, MVT::i32);
    break;
  case Intrinsic::x86_avx_vextractf128_ps_256:		// llvm.x86.avx.vextractf128.ps.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v8f32, MVT::i8);
    break;
  case Intrinsic::x86_avx_loadu_pd_256:		// llvm.x86.avx.loadu.pd.256
  case Intrinsic::x86_avx_vbroadcast_sd_256:		// llvm.x86.avx.vbroadcast.sd.256
  case Intrinsic::x86_avx_vbroadcastf128_pd_256:		// llvm.x86.avx.vbroadcastf128.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f64, MVT::iPTR);
    break;
  case Intrinsic::x86_avx_maskload_pd_256:		// llvm.x86.avx.maskload.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f64, MVT::iPTR, MVT::v4f64);
    break;
  case Intrinsic::x86_avx_cvt_ps2_pd_256:		// llvm.x86.avx.cvt.ps2.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f64, MVT::v4f32);
    break;
  case Intrinsic::x86_avx_sqrt_pd_256:		// llvm.x86.avx.sqrt.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f64, MVT::v4f64);
    break;
  case Intrinsic::x86_avx_round_pd_256:		// llvm.x86.avx.round.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f64, MVT::v4f64, MVT::i32);
    break;
  case Intrinsic::x86_avx_vpermil_pd_256:		// llvm.x86.avx.vpermil.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f64, MVT::v4f64, MVT::i8);
    break;
  case Intrinsic::x86_avx_vinsertf128_pd_256:		// llvm.x86.avx.vinsertf128.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f64, MVT::v4f64, MVT::v2f64, MVT::i8);
    break;
  case Intrinsic::x86_avx_addsub_pd_256:		// llvm.x86.avx.addsub.pd.256
  case Intrinsic::x86_avx_hadd_pd_256:		// llvm.x86.avx.hadd.pd.256
  case Intrinsic::x86_avx_hsub_pd_256:		// llvm.x86.avx.hsub.pd.256
  case Intrinsic::x86_avx_max_pd_256:		// llvm.x86.avx.max.pd.256
  case Intrinsic::x86_avx_min_pd_256:		// llvm.x86.avx.min.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f64, MVT::v4f64, MVT::v4f64);
    break;
  case Intrinsic::x86_avx_blend_pd_256:		// llvm.x86.avx.blend.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f64, MVT::v4f64, MVT::v4f64, MVT::i32);
    break;
  case Intrinsic::x86_avx_cmp_pd_256:		// llvm.x86.avx.cmp.pd.256
  case Intrinsic::x86_avx_vperm2f128_pd_256:		// llvm.x86.avx.vperm2f128.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f64, MVT::v4f64, MVT::v4f64, MVT::i8);
    break;
  case Intrinsic::x86_avx_blendv_pd_256:		// llvm.x86.avx.blendv.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f64, MVT::v4f64, MVT::v4f64, MVT::v4f64);
    break;
  case Intrinsic::x86_avx_vpermilvar_pd_256:		// llvm.x86.avx.vpermilvar.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f64, MVT::v4f64, MVT::v4i64);
    break;
  case Intrinsic::x86_avx_cvtdq2_pd_256:		// llvm.x86.avx.cvtdq2.pd.256
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f64, MVT::v4i32);
    break;
  case Intrinsic::x86_mmx_vec_init_w:		// llvm.x86.mmx.vec.init.w
    VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::v4i16, MVT::i16, MVT::i16, MVT::i16, MVT::i16);
    break;
  case Intrinsic::x86_mmx_packssdw:		// llvm.x86.mmx.packssdw
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i16, MVT::v2i32, MVT::v2i32);
    break;
  case Intrinsic::x86_ssse3_pabs_w:		// llvm.x86.ssse3.pabs.w
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i16, MVT::v4i16);
    break;
  case Intrinsic::x86_mmx_pslli_w:		// llvm.x86.mmx.pslli.w
  case Intrinsic::x86_mmx_psrai_w:		// llvm.x86.mmx.psrai.w
  case Intrinsic::x86_mmx_psrli_w:		// llvm.x86.mmx.psrli.w
  case Intrinsic::x86_ssse3_pshuf_w:		// llvm.x86.ssse3.pshuf.w
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i16, MVT::v4i16, MVT::i32);
    break;
  case Intrinsic::x86_mmx_psll_w:		// llvm.x86.mmx.psll.w
  case Intrinsic::x86_mmx_psra_w:		// llvm.x86.mmx.psra.w
  case Intrinsic::x86_mmx_psrl_w:		// llvm.x86.mmx.psrl.w
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i16, MVT::v4i16, MVT::v1i64);
    break;
  case Intrinsic::x86_mmx_padd_w:		// llvm.x86.mmx.padd.w
  case Intrinsic::x86_mmx_padds_w:		// llvm.x86.mmx.padds.w
  case Intrinsic::x86_mmx_paddus_w:		// llvm.x86.mmx.paddus.w
  case Intrinsic::x86_mmx_pavg_w:		// llvm.x86.mmx.pavg.w
  case Intrinsic::x86_mmx_pcmpeq_w:		// llvm.x86.mmx.pcmpeq.w
  case Intrinsic::x86_mmx_pcmpgt_w:		// llvm.x86.mmx.pcmpgt.w
  case Intrinsic::x86_mmx_pmaxs_w:		// llvm.x86.mmx.pmaxs.w
  case Intrinsic::x86_mmx_pmins_w:		// llvm.x86.mmx.pmins.w
  case Intrinsic::x86_mmx_pmulh_w:		// llvm.x86.mmx.pmulh.w
  case Intrinsic::x86_mmx_pmulhu_w:		// llvm.x86.mmx.pmulhu.w
  case Intrinsic::x86_mmx_pmull_w:		// llvm.x86.mmx.pmull.w
  case Intrinsic::x86_mmx_psub_w:		// llvm.x86.mmx.psub.w
  case Intrinsic::x86_mmx_psubs_w:		// llvm.x86.mmx.psubs.w
  case Intrinsic::x86_mmx_psubus_w:		// llvm.x86.mmx.psubus.w
  case Intrinsic::x86_mmx_punpckhwd:		// llvm.x86.mmx.punpckhwd
  case Intrinsic::x86_mmx_punpcklwd:		// llvm.x86.mmx.punpcklwd
  case Intrinsic::x86_ssse3_phadd_sw:		// llvm.x86.ssse3.phadd.sw
  case Intrinsic::x86_ssse3_phadd_w:		// llvm.x86.ssse3.phadd.w
  case Intrinsic::x86_ssse3_phsub_sw:		// llvm.x86.ssse3.phsub.sw
  case Intrinsic::x86_ssse3_phsub_w:		// llvm.x86.ssse3.phsub.w
  case Intrinsic::x86_ssse3_pmadd_ub_sw:		// llvm.x86.ssse3.pmadd.ub.sw
  case Intrinsic::x86_ssse3_pmul_hr_sw:		// llvm.x86.ssse3.pmul.hr.sw
  case Intrinsic::x86_ssse3_psign_w:		// llvm.x86.ssse3.psign.w
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i16, MVT::v4i16, MVT::v4i16);
    break;
  case Intrinsic::x86_mmx_psad_bw:		// llvm.x86.mmx.psad.bw
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i16, MVT::v8i8, MVT::v8i8);
    break;
  case Intrinsic::ppc_altivec_lvewx:		// llvm.ppc.altivec.lvewx
  case Intrinsic::ppc_altivec_lvx:		// llvm.ppc.altivec.lvx
  case Intrinsic::ppc_altivec_lvxl:		// llvm.ppc.altivec.lvxl
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::iPTR);
    break;
  case Intrinsic::x86_sse41_pmovsxbd:		// llvm.x86.sse41.pmovsxbd
  case Intrinsic::x86_sse41_pmovzxbd:		// llvm.x86.sse41.pmovzxbd
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v16i8);
    break;
  case Intrinsic::ppc_altivec_vmsummbm:		// llvm.ppc.altivec.vmsummbm
  case Intrinsic::ppc_altivec_vmsumubm:		// llvm.ppc.altivec.vmsumubm
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v16i8, MVT::v16i8, MVT::v4i32);
    break;
  case Intrinsic::ppc_altivec_vsum4sbs:		// llvm.ppc.altivec.vsum4sbs
  case Intrinsic::ppc_altivec_vsum4ubs:		// llvm.ppc.altivec.vsum4ubs
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v16i8, MVT::v4i32);
    break;
  case Intrinsic::x86_sse2_cvtpd2dq:		// llvm.x86.sse2.cvtpd2dq
  case Intrinsic::x86_sse2_cvttpd2dq:		// llvm.x86.sse2.cvttpd2dq
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v2f64);
    break;
  case Intrinsic::x86_sse2_cvtps2dq:		// llvm.x86.sse2.cvtps2dq
  case Intrinsic::x86_sse2_cvttps2dq:		// llvm.x86.sse2.cvttps2dq
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v4f32);
    break;
  case Intrinsic::ppc_altivec_vctsxs:		// llvm.ppc.altivec.vctsxs
  case Intrinsic::ppc_altivec_vctuxs:		// llvm.ppc.altivec.vctuxs
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4f32, MVT::i32);
    break;
  case Intrinsic::arm_neon_vacgeq:		// llvm.arm.neon.vacgeq
  case Intrinsic::arm_neon_vacgtq:		// llvm.arm.neon.vacgtq
  case Intrinsic::ppc_altivec_vcmpbfp:		// llvm.ppc.altivec.vcmpbfp
  case Intrinsic::ppc_altivec_vcmpeqfp:		// llvm.ppc.altivec.vcmpeqfp
  case Intrinsic::ppc_altivec_vcmpgefp:		// llvm.ppc.altivec.vcmpgefp
  case Intrinsic::ppc_altivec_vcmpgtfp:		// llvm.ppc.altivec.vcmpgtfp
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4f32, MVT::v4f32);
    break;
  case Intrinsic::x86_avx_cvt_pd2dq_256:		// llvm.x86.avx.cvt.pd2dq.256
  case Intrinsic::x86_avx_cvtt_pd2dq_256:		// llvm.x86.avx.cvtt.pd2dq.256
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v4f64);
    break;
  case Intrinsic::x86_ssse3_pabs_d_128:		// llvm.x86.ssse3.pabs.d.128
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v4i32);
    break;
  case Intrinsic::spu_si_shli:		// llvm.spu.si.shli
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::i8);
    break;
  case Intrinsic::spu_si_ai:		// llvm.spu.si.ai
  case Intrinsic::spu_si_andi:		// llvm.spu.si.andi
  case Intrinsic::spu_si_ceqi:		// llvm.spu.si.ceqi
  case Intrinsic::spu_si_cgti:		// llvm.spu.si.cgti
  case Intrinsic::spu_si_clgti:		// llvm.spu.si.clgti
  case Intrinsic::spu_si_ori:		// llvm.spu.si.ori
  case Intrinsic::spu_si_sfi:		// llvm.spu.si.sfi
  case Intrinsic::spu_si_xori:		// llvm.spu.si.xori
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::i16);
    break;
  case Intrinsic::x86_sse2_pslli_d:		// llvm.x86.sse2.pslli.d
  case Intrinsic::x86_sse2_psrai_d:		// llvm.x86.sse2.psrai.d
  case Intrinsic::x86_sse2_psrli_d:		// llvm.x86.sse2.psrli.d
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::i32);
    break;
  case Intrinsic::ppc_altivec_vaddcuw:		// llvm.ppc.altivec.vaddcuw
  case Intrinsic::ppc_altivec_vaddsws:		// llvm.ppc.altivec.vaddsws
  case Intrinsic::ppc_altivec_vadduws:		// llvm.ppc.altivec.vadduws
  case Intrinsic::ppc_altivec_vavgsw:		// llvm.ppc.altivec.vavgsw
  case Intrinsic::ppc_altivec_vavguw:		// llvm.ppc.altivec.vavguw
  case Intrinsic::ppc_altivec_vcmpequw:		// llvm.ppc.altivec.vcmpequw
  case Intrinsic::ppc_altivec_vcmpgtsw:		// llvm.ppc.altivec.vcmpgtsw
  case Intrinsic::ppc_altivec_vcmpgtuw:		// llvm.ppc.altivec.vcmpgtuw
  case Intrinsic::ppc_altivec_vmaxsw:		// llvm.ppc.altivec.vmaxsw
  case Intrinsic::ppc_altivec_vmaxuw:		// llvm.ppc.altivec.vmaxuw
  case Intrinsic::ppc_altivec_vminsw:		// llvm.ppc.altivec.vminsw
  case Intrinsic::ppc_altivec_vminuw:		// llvm.ppc.altivec.vminuw
  case Intrinsic::ppc_altivec_vrlw:		// llvm.ppc.altivec.vrlw
  case Intrinsic::ppc_altivec_vsl:		// llvm.ppc.altivec.vsl
  case Intrinsic::ppc_altivec_vslo:		// llvm.ppc.altivec.vslo
  case Intrinsic::ppc_altivec_vslw:		// llvm.ppc.altivec.vslw
  case Intrinsic::ppc_altivec_vsr:		// llvm.ppc.altivec.vsr
  case Intrinsic::ppc_altivec_vsraw:		// llvm.ppc.altivec.vsraw
  case Intrinsic::ppc_altivec_vsro:		// llvm.ppc.altivec.vsro
  case Intrinsic::ppc_altivec_vsrw:		// llvm.ppc.altivec.vsrw
  case Intrinsic::ppc_altivec_vsubcuw:		// llvm.ppc.altivec.vsubcuw
  case Intrinsic::ppc_altivec_vsubsws:		// llvm.ppc.altivec.vsubsws
  case Intrinsic::ppc_altivec_vsubuws:		// llvm.ppc.altivec.vsubuws
  case Intrinsic::ppc_altivec_vsum2sws:		// llvm.ppc.altivec.vsum2sws
  case Intrinsic::ppc_altivec_vsumsws:		// llvm.ppc.altivec.vsumsws
  case Intrinsic::spu_si_a:		// llvm.spu.si.a
  case Intrinsic::spu_si_addx:		// llvm.spu.si.addx
  case Intrinsic::spu_si_and:		// llvm.spu.si.and
  case Intrinsic::spu_si_andc:		// llvm.spu.si.andc
  case Intrinsic::spu_si_bg:		// llvm.spu.si.bg
  case Intrinsic::spu_si_bgx:		// llvm.spu.si.bgx
  case Intrinsic::spu_si_ceq:		// llvm.spu.si.ceq
  case Intrinsic::spu_si_cg:		// llvm.spu.si.cg
  case Intrinsic::spu_si_cgt:		// llvm.spu.si.cgt
  case Intrinsic::spu_si_cgx:		// llvm.spu.si.cgx
  case Intrinsic::spu_si_clgt:		// llvm.spu.si.clgt
  case Intrinsic::spu_si_nand:		// llvm.spu.si.nand
  case Intrinsic::spu_si_nor:		// llvm.spu.si.nor
  case Intrinsic::spu_si_or:		// llvm.spu.si.or
  case Intrinsic::spu_si_orc:		// llvm.spu.si.orc
  case Intrinsic::spu_si_sf:		// llvm.spu.si.sf
  case Intrinsic::spu_si_sfx:		// llvm.spu.si.sfx
  case Intrinsic::spu_si_xor:		// llvm.spu.si.xor
  case Intrinsic::x86_sse2_pcmpeq_d:		// llvm.x86.sse2.pcmpeq.d
  case Intrinsic::x86_sse2_pcmpgt_d:		// llvm.x86.sse2.pcmpgt.d
  case Intrinsic::x86_sse2_psll_d:		// llvm.x86.sse2.psll.d
  case Intrinsic::x86_sse2_psra_d:		// llvm.x86.sse2.psra.d
  case Intrinsic::x86_sse2_psrl_d:		// llvm.x86.sse2.psrl.d
  case Intrinsic::x86_sse41_pmaxsd:		// llvm.x86.sse41.pmaxsd
  case Intrinsic::x86_sse41_pmaxud:		// llvm.x86.sse41.pmaxud
  case Intrinsic::x86_sse41_pminsd:		// llvm.x86.sse41.pminsd
  case Intrinsic::x86_sse41_pminud:		// llvm.x86.sse41.pminud
  case Intrinsic::x86_ssse3_phadd_d_128:		// llvm.x86.ssse3.phadd.d.128
  case Intrinsic::x86_ssse3_phadd_sw_128:		// llvm.x86.ssse3.phadd.sw.128
  case Intrinsic::x86_ssse3_phsub_d_128:		// llvm.x86.ssse3.phsub.d.128
  case Intrinsic::x86_ssse3_psign_d_128:		// llvm.x86.ssse3.psign.d.128
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::v4i32);
    break;
  case Intrinsic::ppc_altivec_vperm:		// llvm.ppc.altivec.vperm
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v4i32, MVT::v4i32, MVT::v16i8);
    break;
  case Intrinsic::ppc_altivec_vsel:		// llvm.ppc.altivec.vsel
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v4i32, MVT::v4i32, MVT::v4i32);
    break;
  case Intrinsic::spu_si_mpyh:		// llvm.spu.si.mpyh
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::v8i16);
    break;
  case Intrinsic::ppc_altivec_vupkhpx:		// llvm.ppc.altivec.vupkhpx
  case Intrinsic::ppc_altivec_vupkhsh:		// llvm.ppc.altivec.vupkhsh
  case Intrinsic::ppc_altivec_vupklpx:		// llvm.ppc.altivec.vupklpx
  case Intrinsic::ppc_altivec_vupklsh:		// llvm.ppc.altivec.vupklsh
  case Intrinsic::x86_sse41_pmovsxwd:		// llvm.x86.sse41.pmovsxwd
  case Intrinsic::x86_sse41_pmovzxwd:		// llvm.x86.sse41.pmovzxwd
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v8i16);
    break;
  case Intrinsic::spu_si_mpyi:		// llvm.spu.si.mpyi
  case Intrinsic::spu_si_mpyui:		// llvm.spu.si.mpyui
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v8i16, MVT::i16);
    break;
  case Intrinsic::ppc_altivec_vsum4shs:		// llvm.ppc.altivec.vsum4shs
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v8i16, MVT::v4i32);
    break;
  case Intrinsic::ppc_altivec_vmulesh:		// llvm.ppc.altivec.vmulesh
  case Intrinsic::ppc_altivec_vmuleuh:		// llvm.ppc.altivec.vmuleuh
  case Intrinsic::ppc_altivec_vmulosh:		// llvm.ppc.altivec.vmulosh
  case Intrinsic::ppc_altivec_vmulouh:		// llvm.ppc.altivec.vmulouh
  case Intrinsic::spu_si_mpy:		// llvm.spu.si.mpy
  case Intrinsic::spu_si_mpyhh:		// llvm.spu.si.mpyhh
  case Intrinsic::spu_si_mpyhha:		// llvm.spu.si.mpyhha
  case Intrinsic::spu_si_mpyhhau:		// llvm.spu.si.mpyhhau
  case Intrinsic::spu_si_mpyhhu:		// llvm.spu.si.mpyhhu
  case Intrinsic::spu_si_mpys:		// llvm.spu.si.mpys
  case Intrinsic::spu_si_mpyu:		// llvm.spu.si.mpyu
  case Intrinsic::x86_sse2_pmadd_wd:		// llvm.x86.sse2.pmadd.wd
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v8i16, MVT::v8i16);
    break;
  case Intrinsic::ppc_altivec_vmsumshm:		// llvm.ppc.altivec.vmsumshm
  case Intrinsic::ppc_altivec_vmsumshs:		// llvm.ppc.altivec.vmsumshs
  case Intrinsic::ppc_altivec_vmsumuhm:		// llvm.ppc.altivec.vmsumuhm
  case Intrinsic::ppc_altivec_vmsumuhs:		// llvm.ppc.altivec.vmsumuhs
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v8i16, MVT::v8i16, MVT::v4i32);
    break;
  case Intrinsic::spu_si_mpya:		// llvm.spu.si.mpya
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v8i16, MVT::v8i16, MVT::v8i16);
    break;
  case Intrinsic::x86_avx_vextractf128_si_256:		// llvm.x86.avx.vextractf128.si.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v8i32, MVT::i8);
    break;
  case Intrinsic::x86_avx_loadu_ps_256:		// llvm.x86.avx.loadu.ps.256
  case Intrinsic::x86_avx_vbroadcastf128_ps_256:		// llvm.x86.avx.vbroadcastf128.ps.256
  case Intrinsic::x86_avx_vbroadcastss_256:		// llvm.x86.avx.vbroadcastss.256
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8f32, MVT::iPTR);
    break;
  case Intrinsic::x86_avx_maskload_ps_256:		// llvm.x86.avx.maskload.ps.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8f32, MVT::iPTR, MVT::v8f32);
    break;
  case Intrinsic::x86_avx_rcp_ps_256:		// llvm.x86.avx.rcp.ps.256
  case Intrinsic::x86_avx_rsqrt_ps_256:		// llvm.x86.avx.rsqrt.ps.256
  case Intrinsic::x86_avx_sqrt_ps_256:		// llvm.x86.avx.sqrt.ps.256
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8f32, MVT::v8f32);
    break;
  case Intrinsic::x86_avx_round_ps_256:		// llvm.x86.avx.round.ps.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8f32, MVT::v8f32, MVT::i32);
    break;
  case Intrinsic::x86_avx_vpermil_ps_256:		// llvm.x86.avx.vpermil.ps.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8f32, MVT::v8f32, MVT::i8);
    break;
  case Intrinsic::x86_avx_vinsertf128_ps_256:		// llvm.x86.avx.vinsertf128.ps.256
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8f32, MVT::v8f32, MVT::v4f32, MVT::i8);
    break;
  case Intrinsic::x86_avx_addsub_ps_256:		// llvm.x86.avx.addsub.ps.256
  case Intrinsic::x86_avx_hadd_ps_256:		// llvm.x86.avx.hadd.ps.256
  case Intrinsic::x86_avx_hsub_ps_256:		// llvm.x86.avx.hsub.ps.256
  case Intrinsic::x86_avx_max_ps_256:		// llvm.x86.avx.max.ps.256
  case Intrinsic::x86_avx_min_ps_256:		// llvm.x86.avx.min.ps.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8f32, MVT::v8f32, MVT::v8f32);
    break;
  case Intrinsic::x86_avx_blend_ps_256:		// llvm.x86.avx.blend.ps.256
  case Intrinsic::x86_avx_dp_ps_256:		// llvm.x86.avx.dp.ps.256
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8f32, MVT::v8f32, MVT::v8f32, MVT::i32);
    break;
  case Intrinsic::x86_avx_cmp_ps_256:		// llvm.x86.avx.cmp.ps.256
  case Intrinsic::x86_avx_vperm2f128_ps_256:		// llvm.x86.avx.vperm2f128.ps.256
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8f32, MVT::v8f32, MVT::v8f32, MVT::i8);
    break;
  case Intrinsic::x86_avx_blendv_ps_256:		// llvm.x86.avx.blendv.ps.256
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8f32, MVT::v8f32, MVT::v8f32, MVT::v8f32);
    break;
  case Intrinsic::x86_avx_vpermilvar_ps_256:		// llvm.x86.avx.vpermilvar.ps.256
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8f32, MVT::v8f32, MVT::v8i32);
    break;
  case Intrinsic::x86_avx_cvtdq2_ps_256:		// llvm.x86.avx.cvtdq2.ps.256
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8f32, MVT::v8i32);
    break;
  case Intrinsic::ppc_altivec_mfvscr:		// llvm.ppc.altivec.mfvscr
    VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::v8i16);
    break;
  case Intrinsic::ppc_altivec_lvehx:		// llvm.ppc.altivec.lvehx
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i16, MVT::iPTR);
    break;
  case Intrinsic::ppc_altivec_vupkhsb:		// llvm.ppc.altivec.vupkhsb
  case Intrinsic::ppc_altivec_vupklsb:		// llvm.ppc.altivec.vupklsb
  case Intrinsic::x86_sse41_pmovsxbw:		// llvm.x86.sse41.pmovsxbw
  case Intrinsic::x86_sse41_pmovzxbw:		// llvm.x86.sse41.pmovzxbw
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i16, MVT::v16i8);
    break;
  case Intrinsic::ppc_altivec_vmulesb:		// llvm.ppc.altivec.vmulesb
  case Intrinsic::ppc_altivec_vmuleub:		// llvm.ppc.altivec.vmuleub
  case Intrinsic::ppc_altivec_vmulosb:		// llvm.ppc.altivec.vmulosb
  case Intrinsic::ppc_altivec_vmuloub:		// llvm.ppc.altivec.vmuloub
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v16i8, MVT::v16i8);
    break;
  case Intrinsic::ppc_altivec_vpkpx:		// llvm.ppc.altivec.vpkpx
  case Intrinsic::ppc_altivec_vpkswus:		// llvm.ppc.altivec.vpkswus
  case Intrinsic::ppc_altivec_vpkuwus:		// llvm.ppc.altivec.vpkuwus
  case Intrinsic::x86_sse2_packssdw_128:		// llvm.x86.sse2.packssdw.128
  case Intrinsic::x86_sse41_packusdw:		// llvm.x86.sse41.packusdw
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v4i32, MVT::v4i32);
    break;
  case Intrinsic::x86_sse41_phminposuw:		// llvm.x86.sse41.phminposuw
  case Intrinsic::x86_ssse3_pabs_w_128:		// llvm.x86.ssse3.pabs.w.128
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i16, MVT::v8i16);
    break;
  case Intrinsic::spu_si_ahi:		// llvm.spu.si.ahi
  case Intrinsic::spu_si_andhi:		// llvm.spu.si.andhi
  case Intrinsic::spu_si_ceqhi:		// llvm.spu.si.ceqhi
  case Intrinsic::spu_si_cgthi:		// llvm.spu.si.cgthi
  case Intrinsic::spu_si_clgthi:		// llvm.spu.si.clgthi
  case Intrinsic::spu_si_fsmbi:		// llvm.spu.si.fsmbi
  case Intrinsic::spu_si_orhi:		// llvm.spu.si.orhi
  case Intrinsic::spu_si_sfhi:		// llvm.spu.si.sfhi
  case Intrinsic::spu_si_xorhi:		// llvm.spu.si.xorhi
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v8i16, MVT::i16);
    break;
  case Intrinsic::spu_si_shlqbi:		// llvm.spu.si.shlqbi
  case Intrinsic::spu_si_shlqby:		// llvm.spu.si.shlqby
  case Intrinsic::x86_sse2_pslli_w:		// llvm.x86.sse2.pslli.w
  case Intrinsic::x86_sse2_psrai_w:		// llvm.x86.sse2.psrai.w
  case Intrinsic::x86_sse2_psrli_w:		// llvm.x86.sse2.psrli.w
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v8i16, MVT::i32);
    break;
  case Intrinsic::ppc_altivec_vaddshs:		// llvm.ppc.altivec.vaddshs
  case Intrinsic::ppc_altivec_vadduhs:		// llvm.ppc.altivec.vadduhs
  case Intrinsic::ppc_altivec_vavgsh:		// llvm.ppc.altivec.vavgsh
  case Intrinsic::ppc_altivec_vavguh:		// llvm.ppc.altivec.vavguh
  case Intrinsic::ppc_altivec_vcmpequh:		// llvm.ppc.altivec.vcmpequh
  case Intrinsic::ppc_altivec_vcmpgtsh:		// llvm.ppc.altivec.vcmpgtsh
  case Intrinsic::ppc_altivec_vcmpgtuh:		// llvm.ppc.altivec.vcmpgtuh
  case Intrinsic::ppc_altivec_vmaxsh:		// llvm.ppc.altivec.vmaxsh
  case Intrinsic::ppc_altivec_vmaxuh:		// llvm.ppc.altivec.vmaxuh
  case Intrinsic::ppc_altivec_vminsh:		// llvm.ppc.altivec.vminsh
  case Intrinsic::ppc_altivec_vminuh:		// llvm.ppc.altivec.vminuh
  case Intrinsic::ppc_altivec_vrlh:		// llvm.ppc.altivec.vrlh
  case Intrinsic::ppc_altivec_vslh:		// llvm.ppc.altivec.vslh
  case Intrinsic::ppc_altivec_vsrah:		// llvm.ppc.altivec.vsrah
  case Intrinsic::ppc_altivec_vsrh:		// llvm.ppc.altivec.vsrh
  case Intrinsic::ppc_altivec_vsubshs:		// llvm.ppc.altivec.vsubshs
  case Intrinsic::ppc_altivec_vsubuhs:		// llvm.ppc.altivec.vsubuhs
  case Intrinsic::spu_si_ah:		// llvm.spu.si.ah
  case Intrinsic::spu_si_ceqh:		// llvm.spu.si.ceqh
  case Intrinsic::spu_si_cgth:		// llvm.spu.si.cgth
  case Intrinsic::spu_si_clgth:		// llvm.spu.si.clgth
  case Intrinsic::spu_si_sfh:		// llvm.spu.si.sfh
  case Intrinsic::x86_sse2_padds_w:		// llvm.x86.sse2.padds.w
  case Intrinsic::x86_sse2_paddus_w:		// llvm.x86.sse2.paddus.w
  case Intrinsic::x86_sse2_pavg_w:		// llvm.x86.sse2.pavg.w
  case Intrinsic::x86_sse2_pcmpeq_w:		// llvm.x86.sse2.pcmpeq.w
  case Intrinsic::x86_sse2_pcmpgt_w:		// llvm.x86.sse2.pcmpgt.w
  case Intrinsic::x86_sse2_pmaxs_w:		// llvm.x86.sse2.pmaxs.w
  case Intrinsic::x86_sse2_pmins_w:		// llvm.x86.sse2.pmins.w
  case Intrinsic::x86_sse2_pmulh_w:		// llvm.x86.sse2.pmulh.w
  case Intrinsic::x86_sse2_pmulhu_w:		// llvm.x86.sse2.pmulhu.w
  case Intrinsic::x86_sse2_psll_w:		// llvm.x86.sse2.psll.w
  case Intrinsic::x86_sse2_psra_w:		// llvm.x86.sse2.psra.w
  case Intrinsic::x86_sse2_psrl_w:		// llvm.x86.sse2.psrl.w
  case Intrinsic::x86_sse2_psubs_w:		// llvm.x86.sse2.psubs.w
  case Intrinsic::x86_sse2_psubus_w:		// llvm.x86.sse2.psubus.w
  case Intrinsic::x86_sse41_pmaxuw:		// llvm.x86.sse41.pmaxuw
  case Intrinsic::x86_sse41_pminuw:		// llvm.x86.sse41.pminuw
  case Intrinsic::x86_ssse3_phadd_w_128:		// llvm.x86.ssse3.phadd.w.128
  case Intrinsic::x86_ssse3_phsub_sw_128:		// llvm.x86.ssse3.phsub.sw.128
  case Intrinsic::x86_ssse3_phsub_w_128:		// llvm.x86.ssse3.phsub.w.128
  case Intrinsic::x86_ssse3_pmadd_ub_sw_128:		// llvm.x86.ssse3.pmadd.ub.sw.128
  case Intrinsic::x86_ssse3_pmul_hr_sw_128:		// llvm.x86.ssse3.pmul.hr.sw.128
  case Intrinsic::x86_ssse3_psign_w_128:		// llvm.x86.ssse3.psign.w.128
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v8i16, MVT::v8i16);
    break;
  case Intrinsic::x86_sse41_pblendw:		// llvm.x86.sse41.pblendw
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i16, MVT::v8i16, MVT::v8i16, MVT::i32);
    break;
  case Intrinsic::ppc_altivec_vmhaddshs:		// llvm.ppc.altivec.vmhaddshs
  case Intrinsic::ppc_altivec_vmhraddshs:		// llvm.ppc.altivec.vmhraddshs
  case Intrinsic::ppc_altivec_vmladduhm:		// llvm.ppc.altivec.vmladduhm
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i16, MVT::v8i16, MVT::v8i16, MVT::v8i16);
    break;
  case Intrinsic::x86_avx_cvt_ps2dq_256:		// llvm.x86.avx.cvt.ps2dq.256
  case Intrinsic::x86_avx_cvtt_ps2dq_256:		// llvm.x86.avx.cvtt.ps2dq.256
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i32, MVT::v8f32);
    break;
  case Intrinsic::x86_avx_vinsertf128_si_256:		// llvm.x86.avx.vinsertf128.si.256
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i32, MVT::v8i32, MVT::v4i32, MVT::i8);
    break;
  case Intrinsic::x86_avx_vperm2f128_si_256:		// llvm.x86.avx.vperm2f128.si.256
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i32, MVT::v8i32, MVT::v8i32, MVT::i8);
    break;
  case Intrinsic::x86_mmx_vec_init_b:		// llvm.x86.mmx.vec.init.b
    VerifyIntrinsicPrototype(ID, IF, 1, 8, MVT::v8i8, MVT::i8, MVT::i8, MVT::i8, MVT::i8, MVT::i8, MVT::i8, MVT::i8, MVT::i8);
    break;
  case Intrinsic::x86_mmx_packsswb:		// llvm.x86.mmx.packsswb
  case Intrinsic::x86_mmx_packuswb:		// llvm.x86.mmx.packuswb
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i8, MVT::v4i16, MVT::v4i16);
    break;
  case Intrinsic::x86_ssse3_pabs_b:		// llvm.x86.ssse3.pabs.b
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i8, MVT::v8i8);
    break;
  case Intrinsic::arm_neon_vtbl1:		// llvm.arm.neon.vtbl1
  case Intrinsic::x86_mmx_padd_b:		// llvm.x86.mmx.padd.b
  case Intrinsic::x86_mmx_padds_b:		// llvm.x86.mmx.padds.b
  case Intrinsic::x86_mmx_paddus_b:		// llvm.x86.mmx.paddus.b
  case Intrinsic::x86_mmx_pavg_b:		// llvm.x86.mmx.pavg.b
  case Intrinsic::x86_mmx_pcmpeq_b:		// llvm.x86.mmx.pcmpeq.b
  case Intrinsic::x86_mmx_pcmpgt_b:		// llvm.x86.mmx.pcmpgt.b
  case Intrinsic::x86_mmx_pmaxu_b:		// llvm.x86.mmx.pmaxu.b
  case Intrinsic::x86_mmx_pminu_b:		// llvm.x86.mmx.pminu.b
  case Intrinsic::x86_mmx_psub_b:		// llvm.x86.mmx.psub.b
  case Intrinsic::x86_mmx_psubs_b:		// llvm.x86.mmx.psubs.b
  case Intrinsic::x86_mmx_psubus_b:		// llvm.x86.mmx.psubus.b
  case Intrinsic::x86_mmx_punpckhbw:		// llvm.x86.mmx.punpckhbw
  case Intrinsic::x86_mmx_punpcklbw:		// llvm.x86.mmx.punpcklbw
  case Intrinsic::x86_ssse3_pshuf_b:		// llvm.x86.ssse3.pshuf.b
  case Intrinsic::x86_ssse3_psign_b:		// llvm.x86.ssse3.psign.b
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i8, MVT::v8i8, MVT::v8i8);
    break;
  case Intrinsic::arm_neon_vtbl2:		// llvm.arm.neon.vtbl2
  case Intrinsic::arm_neon_vtbx1:		// llvm.arm.neon.vtbx1
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8);
    break;
  case Intrinsic::arm_neon_vtbl3:		// llvm.arm.neon.vtbl3
  case Intrinsic::arm_neon_vtbx2:		// llvm.arm.neon.vtbx2
    VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8);
    break;
  case Intrinsic::arm_neon_vtbl4:		// llvm.arm.neon.vtbl4
  case Intrinsic::arm_neon_vtbx3:		// llvm.arm.neon.vtbx3
    VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8);
    break;
  case Intrinsic::arm_neon_vtbx4:		// llvm.arm.neon.vtbx4
    VerifyIntrinsicPrototype(ID, IF, 1, 6, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8);
    break;
  }
#endif

// Code for generating Intrinsic function declarations.
#ifdef GET_INTRINSIC_GENERATOR
  switch (id) {
  default: assert(0 && "Invalid intrinsic!");
  case Intrinsic::eh_unwind_init:		// llvm.eh.unwind.init
  case Intrinsic::ppc_altivec_dssall:		// llvm.ppc.altivec.dssall
  case Intrinsic::ppc_sync:		// llvm.ppc.sync
  case Intrinsic::trap:		// llvm.trap
  case Intrinsic::x86_avx_vzeroall:		// llvm.x86.avx.vzeroall
  case Intrinsic::x86_avx_vzeroupper:		// llvm.x86.avx.vzeroupper
  case Intrinsic::x86_mmx_emms:		// llvm.x86.mmx.emms
  case Intrinsic::x86_mmx_femms:		// llvm.x86.mmx.femms
  case Intrinsic::x86_sse2_lfence:		// llvm.x86.sse2.lfence
  case Intrinsic::x86_sse2_mfence:		// llvm.x86.sse2.mfence
  case Intrinsic::x86_sse_sfence:		// llvm.x86.sse.sfence
    ResultTy = Type::getVoidTy(Context);
    break;
  case Intrinsic::memcpy:		// llvm.memcpy
  case Intrinsic::memmove:		// llvm.memmove
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back((0 < numTys) ? Tys[0] : PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(Tys[2]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 1));
    break;
  case Intrinsic::memset:		// llvm.memset
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back((0 < numTys) ? Tys[0] : PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(IntegerType::get(Context, 8));
    ArgTys.push_back(Tys[1]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 1));
    break;
  case Intrinsic::invariant_end:		// llvm.invariant.end
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(StructType::get(Context)));
    ArgTys.push_back(IntegerType::get(Context, 64));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::memory_barrier:		// llvm.memory.barrier
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(IntegerType::get(Context, 1));
    ArgTys.push_back(IntegerType::get(Context, 1));
    ArgTys.push_back(IntegerType::get(Context, 1));
    ArgTys.push_back(IntegerType::get(Context, 1));
    ArgTys.push_back(IntegerType::get(Context, 1));
    break;
  case Intrinsic::arm_set_fpscr:		// llvm.arm.set.fpscr
  case Intrinsic::eh_sjlj_callsite:		// llvm.eh.sjlj.callsite
  case Intrinsic::pcmarker:		// llvm.pcmarker
  case Intrinsic::ppc_altivec_dss:		// llvm.ppc.altivec.dss
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_sse3_mwait:		// llvm.x86.sse3.mwait
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::eh_return_i32:		// llvm.eh.return.i32
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::eh_return_i64:		// llvm.eh.return.i64
  case Intrinsic::lifetime_end:		// llvm.lifetime.end
  case Intrinsic::lifetime_start:		// llvm.lifetime.start
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(IntegerType::get(Context, 64));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::x86_int:		// llvm.x86.int
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::dbg_value:		// llvm.dbg.value
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(Type::getMetadataTy(Context));
    ArgTys.push_back(IntegerType::get(Context, 64));
    ArgTys.push_back(Type::getMetadataTy(Context));
    break;
  case Intrinsic::dbg_declare:		// llvm.dbg.declare
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(Type::getMetadataTy(Context));
    ArgTys.push_back(Type::getMetadataTy(Context));
    break;
  case Intrinsic::eh_sjlj_longjmp:		// llvm.eh.sjlj.longjmp
  case Intrinsic::ppc_dcba:		// llvm.ppc.dcba
  case Intrinsic::ppc_dcbf:		// llvm.ppc.dcbf
  case Intrinsic::ppc_dcbi:		// llvm.ppc.dcbi
  case Intrinsic::ppc_dcbst:		// llvm.ppc.dcbst
  case Intrinsic::ppc_dcbt:		// llvm.ppc.dcbt
  case Intrinsic::ppc_dcbtst:		// llvm.ppc.dcbtst
  case Intrinsic::ppc_dcbz:		// llvm.ppc.dcbz
  case Intrinsic::ppc_dcbzl:		// llvm.ppc.dcbzl
  case Intrinsic::stackrestore:		// llvm.stackrestore
  case Intrinsic::vaend:		// llvm.va_end
  case Intrinsic::vastart:		// llvm.va_start
  case Intrinsic::x86_sse2_clflush:		// llvm.x86.sse2.clflush
  case Intrinsic::x86_sse_ldmxcsr:		// llvm.x86.sse.ldmxcsr
  case Intrinsic::x86_sse_stmxcsr:		// llvm.x86.sse.stmxcsr
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::arm_neon_vst2:		// llvm.arm.neon.vst2
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::arm_neon_vst3:		// llvm.arm.neon.vst3
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::arm_neon_vst4:		// llvm.arm.neon.vst4
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::arm_neon_vst2lane:		// llvm.arm.neon.vst2lane
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::arm_neon_vst3lane:		// llvm.arm.neon.vst3lane
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::arm_neon_vst4lane:		// llvm.arm.neon.vst4lane
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::arm_neon_vst1:		// llvm.arm.neon.vst1
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::longjmp:		// llvm.longjmp
  case Intrinsic::siglongjmp:		// llvm.siglongjmp
  case Intrinsic::x86_sse2_movnt_i:		// llvm.x86.sse2.movnt.i
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::ppc_altivec_dst:		// llvm.ppc.altivec.dst
  case Intrinsic::ppc_altivec_dstst:		// llvm.ppc.altivec.dstst
  case Intrinsic::ppc_altivec_dststt:		// llvm.ppc.altivec.dststt
  case Intrinsic::ppc_altivec_dstt:		// llvm.ppc.altivec.dstt
  case Intrinsic::prefetch:		// llvm.prefetch
  case Intrinsic::x86_sse3_monitor:		// llvm.x86.sse3.monitor
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::vacopy:		// llvm.va_copy
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::var_annotation:		// llvm.var.annotation
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::gcwrite:		// llvm.gcwrite
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8))));
    break;
  case Intrinsic::stackprotector:		// llvm.stackprotector
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8))));
    break;
  case Intrinsic::x86_sse2_storeu_dq:		// llvm.x86.sse2.storeu.dq
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    break;
  case Intrinsic::x86_mmx_movnt_dq:		// llvm.x86.mmx.movnt.dq
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
    break;
  case Intrinsic::x86_sse2_movnt_pd:		// llvm.x86.sse2.movnt.pd
  case Intrinsic::x86_sse2_storeu_pd:		// llvm.x86.sse2.storeu.pd
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    break;
  case Intrinsic::x86_avx_maskstore_pd:		// llvm.x86.avx.maskstore.pd
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    break;
  case Intrinsic::x86_sse2_movnt_dq:		// llvm.x86.sse2.movnt.dq
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
    break;
  case Intrinsic::x86_avx_storeu_dq_256:		// llvm.x86.avx.storeu.dq.256
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32));
    break;
  case Intrinsic::x86_sse_movnt_ps:		// llvm.x86.sse.movnt.ps
  case Intrinsic::x86_sse_storeu_ps:		// llvm.x86.sse.storeu.ps
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::x86_avx_maskstore_ps:		// llvm.x86.avx.maskstore.ps
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::x86_avx_movnt_pd_256:		// llvm.x86.avx.movnt.pd.256
  case Intrinsic::x86_avx_storeu_pd_256:		// llvm.x86.avx.storeu.pd.256
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    break;
  case Intrinsic::x86_avx_maskstore_pd_256:		// llvm.x86.avx.maskstore.pd.256
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    break;
  case Intrinsic::x86_sse2_storel_dq:		// llvm.x86.sse2.storel.dq
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::x86_avx_movnt_dq_256:		// llvm.x86.avx.movnt.dq.256
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
    break;
  case Intrinsic::x86_avx_movnt_ps_256:		// llvm.x86.avx.movnt.ps.256
  case Intrinsic::x86_avx_storeu_ps_256:		// llvm.x86.avx.storeu.ps.256
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    break;
  case Intrinsic::x86_avx_maskstore_ps_256:		// llvm.x86.avx.maskstore.ps.256
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    break;
  case Intrinsic::gcroot:		// llvm.gcroot
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8))));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::ppc_altivec_stvebx:		// llvm.ppc.altivec.stvebx
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::x86_sse2_maskmov_dqu:		// llvm.x86.sse2.maskmov.dqu
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::ppc_altivec_mtvscr:		// llvm.ppc.altivec.mtvscr
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::ppc_altivec_stvewx:		// llvm.ppc.altivec.stvewx
  case Intrinsic::ppc_altivec_stvx:		// llvm.ppc.altivec.stvx
  case Intrinsic::ppc_altivec_stvxl:		// llvm.ppc.altivec.stvxl
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::ppc_altivec_stvehx:		// llvm.ppc.altivec.stvehx
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::x86_mmx_maskmovq:		// llvm.x86.mmx.maskmovq
    ResultTy = Type::getVoidTy(Context);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::ptr_annotation:		// llvm.ptr.annotation
    ResultTy = (0 < numTys) ? Tys[0] : PointerType::getUnqual(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::sin:		// llvm.sin
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::cos:		// llvm.cos
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::pow:		// llvm.pow
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::log:		// llvm.log
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::log10:		// llvm.log10
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::log2:		// llvm.log2
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::exp:		// llvm.exp
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::exp2:		// llvm.exp2
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::sqrt:		// llvm.sqrt
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::powi:		// llvm.powi
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::convertff:		// llvm.convertff
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[1]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::arm_neon_vcvtfxs2fp:		// llvm.arm.neon.vcvtfxs2fp
  case Intrinsic::arm_neon_vcvtfxu2fp:		// llvm.arm.neon.vcvtfxu2fp
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[1]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::convertfsi:		// llvm.convertfsi
  case Intrinsic::convertfui:		// llvm.convertfui
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[1]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::bswap:		// llvm.bswap
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::ctpop:		// llvm.ctpop
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::ctlz:		// llvm.ctlz
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::cttz:		// llvm.cttz
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::annotation:		// llvm.annotation
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::atomic_cmp_swap:		// llvm.atomic.cmp.swap
    ResultTy = Tys[0];
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::atomic_load_add:		// llvm.atomic.load.add
    ResultTy = Tys[0];
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::atomic_swap:		// llvm.atomic.swap
    ResultTy = Tys[0];
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::atomic_load_sub:		// llvm.atomic.load.sub
    ResultTy = Tys[0];
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::atomic_load_and:		// llvm.atomic.load.and
    ResultTy = Tys[0];
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::atomic_load_or:		// llvm.atomic.load.or
    ResultTy = Tys[0];
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::atomic_load_xor:		// llvm.atomic.load.xor
    ResultTy = Tys[0];
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::atomic_load_nand:		// llvm.atomic.load.nand
    ResultTy = Tys[0];
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::atomic_load_min:		// llvm.atomic.load.min
    ResultTy = Tys[0];
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::atomic_load_max:		// llvm.atomic.load.max
    ResultTy = Tys[0];
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::atomic_load_umin:		// llvm.atomic.load.umin
    ResultTy = Tys[0];
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::atomic_load_umax:		// llvm.atomic.load.umax
    ResultTy = Tys[0];
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::arm_neon_vcvtfp2fxs:		// llvm.arm.neon.vcvtfp2fxs
  case Intrinsic::arm_neon_vcvtfp2fxu:		// llvm.arm.neon.vcvtfp2fxu
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[1]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::convertsif:		// llvm.convertsif
  case Intrinsic::convertuif:		// llvm.convertuif
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[1]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::convertss:		// llvm.convertss
  case Intrinsic::convertsu:		// llvm.convertsu
  case Intrinsic::convertus:		// llvm.convertus
  case Intrinsic::convertuu:		// llvm.convertuu
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[1]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::objectsize:		// llvm.objectsize
    ResultTy = Tys[0];
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(IntegerType::get(Context, 1));
    break;
  case Intrinsic::sadd_with_overflow:		// llvm.sadd.with.overflow
    ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1),  NULL);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::uadd_with_overflow:		// llvm.uadd.with.overflow
    ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1),  NULL);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::ssub_with_overflow:		// llvm.ssub.with.overflow
    ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1),  NULL);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::usub_with_overflow:		// llvm.usub.with.overflow
    ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1),  NULL);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::smul_with_overflow:		// llvm.smul.with.overflow
    ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1),  NULL);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::umul_with_overflow:		// llvm.umul.with.overflow
    ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1),  NULL);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::arm_neon_vqdmlal:		// llvm.arm.neon.vqdmlal
  case Intrinsic::arm_neon_vqdmlsl:		// llvm.arm.neon.vqdmlsl
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0])));
    ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0])));
    break;
  case Intrinsic::arm_neon_vpadals:		// llvm.arm.neon.vpadals
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[1]);
    break;
  case Intrinsic::arm_neon_vpadalu:		// llvm.arm.neon.vpadalu
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[1]);
    break;
  case Intrinsic::arm_neon_vabs:		// llvm.arm.neon.vabs
  case Intrinsic::arm_neon_vcls:		// llvm.arm.neon.vcls
  case Intrinsic::arm_neon_vclz:		// llvm.arm.neon.vclz
  case Intrinsic::arm_neon_vcnt:		// llvm.arm.neon.vcnt
  case Intrinsic::arm_neon_vqabs:		// llvm.arm.neon.vqabs
  case Intrinsic::arm_neon_vqneg:		// llvm.arm.neon.vqneg
  case Intrinsic::arm_neon_vrecpe:		// llvm.arm.neon.vrecpe
  case Intrinsic::arm_neon_vrsqrte:		// llvm.arm.neon.vrsqrte
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::arm_neon_vqmovns:		// llvm.arm.neon.vqmovns
  case Intrinsic::arm_neon_vqmovnsu:		// llvm.arm.neon.vqmovnsu
  case Intrinsic::arm_neon_vqmovnu:		// llvm.arm.neon.vqmovnu
    ResultTy = Tys[0];
    ArgTys.push_back(VectorType::getExtendedElementVectorType(dyn_cast<VectorType>(Tys[0])));
    break;
  case Intrinsic::arm_neon_vabds:		// llvm.arm.neon.vabds
  case Intrinsic::arm_neon_vabdu:		// llvm.arm.neon.vabdu
  case Intrinsic::arm_neon_vhadds:		// llvm.arm.neon.vhadds
  case Intrinsic::arm_neon_vhaddu:		// llvm.arm.neon.vhaddu
  case Intrinsic::arm_neon_vhsubs:		// llvm.arm.neon.vhsubs
  case Intrinsic::arm_neon_vhsubu:		// llvm.arm.neon.vhsubu
  case Intrinsic::arm_neon_vmaxs:		// llvm.arm.neon.vmaxs
  case Intrinsic::arm_neon_vmaxu:		// llvm.arm.neon.vmaxu
  case Intrinsic::arm_neon_vmins:		// llvm.arm.neon.vmins
  case Intrinsic::arm_neon_vminu:		// llvm.arm.neon.vminu
  case Intrinsic::arm_neon_vmulp:		// llvm.arm.neon.vmulp
  case Intrinsic::arm_neon_vpadd:		// llvm.arm.neon.vpadd
  case Intrinsic::arm_neon_vpmaxs:		// llvm.arm.neon.vpmaxs
  case Intrinsic::arm_neon_vpmaxu:		// llvm.arm.neon.vpmaxu
  case Intrinsic::arm_neon_vpmins:		// llvm.arm.neon.vpmins
  case Intrinsic::arm_neon_vpminu:		// llvm.arm.neon.vpminu
  case Intrinsic::arm_neon_vqadds:		// llvm.arm.neon.vqadds
  case Intrinsic::arm_neon_vqaddu:		// llvm.arm.neon.vqaddu
  case Intrinsic::arm_neon_vqdmulh:		// llvm.arm.neon.vqdmulh
  case Intrinsic::arm_neon_vqrdmulh:		// llvm.arm.neon.vqrdmulh
  case Intrinsic::arm_neon_vqrshifts:		// llvm.arm.neon.vqrshifts
  case Intrinsic::arm_neon_vqrshiftu:		// llvm.arm.neon.vqrshiftu
  case Intrinsic::arm_neon_vqshifts:		// llvm.arm.neon.vqshifts
  case Intrinsic::arm_neon_vqshiftsu:		// llvm.arm.neon.vqshiftsu
  case Intrinsic::arm_neon_vqshiftu:		// llvm.arm.neon.vqshiftu
  case Intrinsic::arm_neon_vqsubs:		// llvm.arm.neon.vqsubs
  case Intrinsic::arm_neon_vqsubu:		// llvm.arm.neon.vqsubu
  case Intrinsic::arm_neon_vrecps:		// llvm.arm.neon.vrecps
  case Intrinsic::arm_neon_vrhadds:		// llvm.arm.neon.vrhadds
  case Intrinsic::arm_neon_vrhaddu:		// llvm.arm.neon.vrhaddu
  case Intrinsic::arm_neon_vrshifts:		// llvm.arm.neon.vrshifts
  case Intrinsic::arm_neon_vrshiftu:		// llvm.arm.neon.vrshiftu
  case Intrinsic::arm_neon_vrsqrts:		// llvm.arm.neon.vrsqrts
  case Intrinsic::arm_neon_vshifts:		// llvm.arm.neon.vshifts
  case Intrinsic::arm_neon_vshiftu:		// llvm.arm.neon.vshiftu
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::arm_neon_vaddhn:		// llvm.arm.neon.vaddhn
  case Intrinsic::arm_neon_vqrshiftns:		// llvm.arm.neon.vqrshiftns
  case Intrinsic::arm_neon_vqrshiftnsu:		// llvm.arm.neon.vqrshiftnsu
  case Intrinsic::arm_neon_vqrshiftnu:		// llvm.arm.neon.vqrshiftnu
  case Intrinsic::arm_neon_vqshiftns:		// llvm.arm.neon.vqshiftns
  case Intrinsic::arm_neon_vqshiftnsu:		// llvm.arm.neon.vqshiftnsu
  case Intrinsic::arm_neon_vqshiftnu:		// llvm.arm.neon.vqshiftnu
  case Intrinsic::arm_neon_vraddhn:		// llvm.arm.neon.vraddhn
  case Intrinsic::arm_neon_vrshiftn:		// llvm.arm.neon.vrshiftn
  case Intrinsic::arm_neon_vrsubhn:		// llvm.arm.neon.vrsubhn
  case Intrinsic::arm_neon_vshiftn:		// llvm.arm.neon.vshiftn
  case Intrinsic::arm_neon_vsubhn:		// llvm.arm.neon.vsubhn
    ResultTy = Tys[0];
    ArgTys.push_back(VectorType::getExtendedElementVectorType(dyn_cast<VectorType>(Tys[0])));
    ArgTys.push_back(VectorType::getExtendedElementVectorType(dyn_cast<VectorType>(Tys[0])));
    break;
  case Intrinsic::arm_neon_vmullp:		// llvm.arm.neon.vmullp
  case Intrinsic::arm_neon_vqdmull:		// llvm.arm.neon.vqdmull
  case Intrinsic::arm_neon_vshiftls:		// llvm.arm.neon.vshiftls
  case Intrinsic::arm_neon_vshiftlu:		// llvm.arm.neon.vshiftlu
    ResultTy = Tys[0];
    ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0])));
    ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0])));
    break;
  case Intrinsic::arm_neon_vshiftins:		// llvm.arm.neon.vshiftins
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::arm_neon_vpaddls:		// llvm.arm.neon.vpaddls
  case Intrinsic::arm_neon_vpaddlu:		// llvm.arm.neon.vpaddlu
    ResultTy = Tys[0];
    ArgTys.push_back(Tys[1]);
    break;
  case Intrinsic::arm_neon_vld1:		// llvm.arm.neon.vld1
    ResultTy = Tys[0];
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::arm_neon_vld2:		// llvm.arm.neon.vld2
    ResultTy = StructType::get(Context, Tys[0], Tys[0],  NULL);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::arm_neon_vld3:		// llvm.arm.neon.vld3
    ResultTy = StructType::get(Context, Tys[0], Tys[0], Tys[0],  NULL);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::arm_neon_vld4:		// llvm.arm.neon.vld4
    ResultTy = StructType::get(Context, Tys[0], Tys[0], Tys[0], Tys[0],  NULL);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::arm_neon_vld2lane:		// llvm.arm.neon.vld2lane
    ResultTy = StructType::get(Context, Tys[0], Tys[0],  NULL);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::arm_neon_vld3lane:		// llvm.arm.neon.vld3lane
    ResultTy = StructType::get(Context, Tys[0], Tys[0], Tys[0],  NULL);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::arm_neon_vld4lane:		// llvm.arm.neon.vld4lane
    ResultTy = StructType::get(Context, Tys[0], Tys[0], Tys[0], Tys[0],  NULL);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(Tys[0]);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::invariant_start:		// llvm.invariant.start
    ResultTy = PointerType::getUnqual(StructType::get(Context));
    ArgTys.push_back(IntegerType::get(Context, 64));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::arm_vcvtr:		// llvm.arm.vcvtr
  case Intrinsic::arm_vcvtru:		// llvm.arm.vcvtru
    ResultTy = Type::getFloatTy(Context);
    ArgTys.push_back(Tys[0]);
    break;
  case Intrinsic::convert_from_fp16:		// llvm.convert.from.fp16
    ResultTy = Type::getFloatTy(Context);
    ArgTys.push_back(IntegerType::get(Context, 16));
    break;
  case Intrinsic::convert_to_fp16:		// llvm.convert.to.fp16
    ResultTy = IntegerType::get(Context, 16);
    ArgTys.push_back(Type::getFloatTy(Context));
    break;
  case Intrinsic::arm_get_fpscr:		// llvm.arm.get.fpscr
  case Intrinsic::flt_rounds:		// llvm.flt.rounds
  case Intrinsic::xcore_getid:		// llvm.xcore.getid
    ResultTy = IntegerType::get(Context, 32);
    break;
  case Intrinsic::xcore_bitrev:		// llvm.xcore.bitrev
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_sse42_crc32_16:		// llvm.x86.sse42.crc32.16
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 16));
    break;
  case Intrinsic::arm_qadd:		// llvm.arm.qadd
  case Intrinsic::arm_qsub:		// llvm.arm.qsub
  case Intrinsic::arm_ssat:		// llvm.arm.ssat
  case Intrinsic::arm_usat:		// llvm.arm.usat
  case Intrinsic::x86_sse42_crc32_32:		// llvm.x86.sse42.crc32.32
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_sse42_crc32_8:		// llvm.x86.sse42.crc32.8
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::ppc_altivec_vcmpequb_p:		// llvm.ppc.altivec.vcmpequb.p
  case Intrinsic::ppc_altivec_vcmpgtsb_p:		// llvm.ppc.altivec.vcmpgtsb.p
  case Intrinsic::ppc_altivec_vcmpgtub_p:		// llvm.ppc.altivec.vcmpgtub.p
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    break;
  case Intrinsic::ppc_altivec_vcmpbfp_p:		// llvm.ppc.altivec.vcmpbfp.p
  case Intrinsic::ppc_altivec_vcmpeqfp_p:		// llvm.ppc.altivec.vcmpeqfp.p
  case Intrinsic::ppc_altivec_vcmpgefp_p:		// llvm.ppc.altivec.vcmpgefp.p
  case Intrinsic::ppc_altivec_vcmpgtfp_p:		// llvm.ppc.altivec.vcmpgtfp.p
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::ppc_altivec_vcmpequw_p:		// llvm.ppc.altivec.vcmpequw.p
  case Intrinsic::ppc_altivec_vcmpgtsw_p:		// llvm.ppc.altivec.vcmpgtsw.p
  case Intrinsic::ppc_altivec_vcmpgtuw_p:		// llvm.ppc.altivec.vcmpgtuw.p
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::ppc_altivec_vcmpequh_p:		// llvm.ppc.altivec.vcmpequh.p
  case Intrinsic::ppc_altivec_vcmpgtsh_p:		// llvm.ppc.altivec.vcmpgtsh.p
  case Intrinsic::ppc_altivec_vcmpgtuh_p:		// llvm.ppc.altivec.vcmpgtuh.p
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    break;
  case Intrinsic::eh_sjlj_setjmp:		// llvm.eh.sjlj.setjmp
  case Intrinsic::eh_typeid_for:		// llvm.eh.typeid.for
  case Intrinsic::setjmp:		// llvm.setjmp
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::sigsetjmp:		// llvm.sigsetjmp
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::eh_selector:		// llvm.eh.selector
    IsVarArg = true;
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::x86_sse2_pmovmskb_128:		// llvm.x86.sse2.pmovmskb.128
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    break;
  case Intrinsic::x86_sse41_pextrb:		// llvm.x86.sse41.pextrb
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_sse42_pcmpestri128:		// llvm.x86.sse42.pcmpestri128
  case Intrinsic::x86_sse42_pcmpestria128:		// llvm.x86.sse42.pcmpestria128
  case Intrinsic::x86_sse42_pcmpestric128:		// llvm.x86.sse42.pcmpestric128
  case Intrinsic::x86_sse42_pcmpestrio128:		// llvm.x86.sse42.pcmpestrio128
  case Intrinsic::x86_sse42_pcmpestris128:		// llvm.x86.sse42.pcmpestris128
  case Intrinsic::x86_sse42_pcmpestriz128:		// llvm.x86.sse42.pcmpestriz128
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_sse42_pcmpistri128:		// llvm.x86.sse42.pcmpistri128
  case Intrinsic::x86_sse42_pcmpistria128:		// llvm.x86.sse42.pcmpistria128
  case Intrinsic::x86_sse42_pcmpistric128:		// llvm.x86.sse42.pcmpistric128
  case Intrinsic::x86_sse42_pcmpistrio128:		// llvm.x86.sse42.pcmpistrio128
  case Intrinsic::x86_sse42_pcmpistris128:		// llvm.x86.sse42.pcmpistris128
  case Intrinsic::x86_sse42_pcmpistriz128:		// llvm.x86.sse42.pcmpistriz128
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_mmx_cvtsi64_si32:		// llvm.x86.mmx.cvtsi64.si32
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
    break;
  case Intrinsic::x86_mmx_pextr_w:		// llvm.x86.mmx.pextr.w
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_sse2_cvtsd2si:		// llvm.x86.sse2.cvtsd2si
  case Intrinsic::x86_sse2_cvttsd2si:		// llvm.x86.sse2.cvttsd2si
  case Intrinsic::x86_sse2_movmsk_pd:		// llvm.x86.sse2.movmsk.pd
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    break;
  case Intrinsic::x86_avx_vtestc_pd:		// llvm.x86.avx.vtestc.pd
  case Intrinsic::x86_avx_vtestnzc_pd:		// llvm.x86.avx.vtestnzc.pd
  case Intrinsic::x86_avx_vtestz_pd:		// llvm.x86.avx.vtestz.pd
  case Intrinsic::x86_sse2_comieq_sd:		// llvm.x86.sse2.comieq.sd
  case Intrinsic::x86_sse2_comige_sd:		// llvm.x86.sse2.comige.sd
  case Intrinsic::x86_sse2_comigt_sd:		// llvm.x86.sse2.comigt.sd
  case Intrinsic::x86_sse2_comile_sd:		// llvm.x86.sse2.comile.sd
  case Intrinsic::x86_sse2_comilt_sd:		// llvm.x86.sse2.comilt.sd
  case Intrinsic::x86_sse2_comineq_sd:		// llvm.x86.sse2.comineq.sd
  case Intrinsic::x86_sse2_ucomieq_sd:		// llvm.x86.sse2.ucomieq.sd
  case Intrinsic::x86_sse2_ucomige_sd:		// llvm.x86.sse2.ucomige.sd
  case Intrinsic::x86_sse2_ucomigt_sd:		// llvm.x86.sse2.ucomigt.sd
  case Intrinsic::x86_sse2_ucomile_sd:		// llvm.x86.sse2.ucomile.sd
  case Intrinsic::x86_sse2_ucomilt_sd:		// llvm.x86.sse2.ucomilt.sd
  case Intrinsic::x86_sse2_ucomineq_sd:		// llvm.x86.sse2.ucomineq.sd
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    break;
  case Intrinsic::x86_sse_cvtss2si:		// llvm.x86.sse.cvtss2si
  case Intrinsic::x86_sse_cvttss2si:		// llvm.x86.sse.cvttss2si
  case Intrinsic::x86_sse_movmsk_ps:		// llvm.x86.sse.movmsk.ps
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::x86_sse41_extractps:		// llvm.x86.sse41.extractps
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_avx_vtestc_ps:		// llvm.x86.avx.vtestc.ps
  case Intrinsic::x86_avx_vtestnzc_ps:		// llvm.x86.avx.vtestnzc.ps
  case Intrinsic::x86_avx_vtestz_ps:		// llvm.x86.avx.vtestz.ps
  case Intrinsic::x86_sse41_ptestc:		// llvm.x86.sse41.ptestc
  case Intrinsic::x86_sse41_ptestnzc:		// llvm.x86.sse41.ptestnzc
  case Intrinsic::x86_sse41_ptestz:		// llvm.x86.sse41.ptestz
  case Intrinsic::x86_sse_comieq_ss:		// llvm.x86.sse.comieq.ss
  case Intrinsic::x86_sse_comige_ss:		// llvm.x86.sse.comige.ss
  case Intrinsic::x86_sse_comigt_ss:		// llvm.x86.sse.comigt.ss
  case Intrinsic::x86_sse_comile_ss:		// llvm.x86.sse.comile.ss
  case Intrinsic::x86_sse_comilt_ss:		// llvm.x86.sse.comilt.ss
  case Intrinsic::x86_sse_comineq_ss:		// llvm.x86.sse.comineq.ss
  case Intrinsic::x86_sse_ucomieq_ss:		// llvm.x86.sse.ucomieq.ss
  case Intrinsic::x86_sse_ucomige_ss:		// llvm.x86.sse.ucomige.ss
  case Intrinsic::x86_sse_ucomigt_ss:		// llvm.x86.sse.ucomigt.ss
  case Intrinsic::x86_sse_ucomile_ss:		// llvm.x86.sse.ucomile.ss
  case Intrinsic::x86_sse_ucomilt_ss:		// llvm.x86.sse.ucomilt.ss
  case Intrinsic::x86_sse_ucomineq_ss:		// llvm.x86.sse.ucomineq.ss
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::x86_avx_movmsk_pd_256:		// llvm.x86.avx.movmsk.pd.256
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    break;
  case Intrinsic::x86_avx_vtestc_pd_256:		// llvm.x86.avx.vtestc.pd.256
  case Intrinsic::x86_avx_vtestnzc_pd_256:		// llvm.x86.avx.vtestnzc.pd.256
  case Intrinsic::x86_avx_vtestz_pd_256:		// llvm.x86.avx.vtestz.pd.256
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    break;
  case Intrinsic::x86_sse41_pextrd:		// llvm.x86.sse41.pextrd
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_avx_ptestc_256:		// llvm.x86.avx.ptestc.256
  case Intrinsic::x86_avx_ptestnzc_256:		// llvm.x86.avx.ptestnzc.256
  case Intrinsic::x86_avx_ptestz_256:		// llvm.x86.avx.ptestz.256
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
    break;
  case Intrinsic::x86_avx_movmsk_ps_256:		// llvm.x86.avx.movmsk.ps.256
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    break;
  case Intrinsic::x86_avx_vtestc_ps_256:		// llvm.x86.avx.vtestc.ps.256
  case Intrinsic::x86_avx_vtestnzc_ps_256:		// llvm.x86.avx.vtestnzc.ps.256
  case Intrinsic::x86_avx_vtestz_ps_256:		// llvm.x86.avx.vtestz.ps.256
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    break;
  case Intrinsic::x86_mmx_pmovmskb:		// llvm.x86.mmx.pmovmskb
    ResultTy = IntegerType::get(Context, 32);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    break;
  case Intrinsic::readcyclecounter:		// llvm.readcyclecounter
    ResultTy = IntegerType::get(Context, 64);
    break;
  case Intrinsic::alpha_umulh:		// llvm.alpha.umulh
  case Intrinsic::x86_sse42_crc64_64:		// llvm.x86.sse42.crc64.64
    ResultTy = IntegerType::get(Context, 64);
    ArgTys.push_back(IntegerType::get(Context, 64));
    ArgTys.push_back(IntegerType::get(Context, 64));
    break;
  case Intrinsic::x86_sse42_crc64_8:		// llvm.x86.sse42.crc64.8
    ResultTy = IntegerType::get(Context, 64);
    ArgTys.push_back(IntegerType::get(Context, 64));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_sse2_cvtsd2si64:		// llvm.x86.sse2.cvtsd2si64
  case Intrinsic::x86_sse2_cvttsd2si64:		// llvm.x86.sse2.cvttsd2si64
    ResultTy = IntegerType::get(Context, 64);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    break;
  case Intrinsic::x86_sse41_pextrq:		// llvm.x86.sse41.pextrq
    ResultTy = IntegerType::get(Context, 64);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_sse_cvtss2si64:		// llvm.x86.sse.cvtss2si64
  case Intrinsic::x86_sse_cvttss2si64:		// llvm.x86.sse.cvttss2si64
    ResultTy = IntegerType::get(Context, 64);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::arm_thread_pointer:		// llvm.arm.thread.pointer
  case Intrinsic::eh_exception:		// llvm.eh.exception
  case Intrinsic::eh_sjlj_lsda:		// llvm.eh.sjlj.lsda
  case Intrinsic::stacksave:		// llvm.stacksave
    ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8));
    break;
  case Intrinsic::eh_dwarf_cfa:		// llvm.eh.dwarf.cfa
  case Intrinsic::frameaddress:		// llvm.frameaddress
  case Intrinsic::returnaddress:		// llvm.returnaddress
    ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::init_trampoline:		// llvm.init.trampoline
    ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::gcread:		// llvm.gcread
    ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8));
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8))));
    break;
  case Intrinsic::ppc_altivec_lvebx:		// llvm.ppc.altivec.lvebx
  case Intrinsic::ppc_altivec_lvsl:		// llvm.ppc.altivec.lvsl
  case Intrinsic::ppc_altivec_lvsr:		// llvm.ppc.altivec.lvsr
  case Intrinsic::x86_sse2_loadu_dq:		// llvm.x86.sse2.loadu.dq
  case Intrinsic::x86_sse3_ldu_dq:		// llvm.x86.sse3.ldu.dq
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::x86_ssse3_pabs_b_128:		// llvm.x86.ssse3.pabs.b.128
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    break;
  case Intrinsic::spu_si_shlqbii:		// llvm.spu.si.shlqbii
  case Intrinsic::spu_si_shlqbyi:		// llvm.spu.si.shlqbyi
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_sse42_pcmpestrm128:		// llvm.x86.sse42.pcmpestrm128
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::spu_si_andbi:		// llvm.spu.si.andbi
  case Intrinsic::spu_si_ceqbi:		// llvm.spu.si.ceqbi
  case Intrinsic::spu_si_cgtbi:		// llvm.spu.si.cgtbi
  case Intrinsic::spu_si_clgtbi:		// llvm.spu.si.clgtbi
  case Intrinsic::spu_si_orbi:		// llvm.spu.si.orbi
  case Intrinsic::spu_si_xorbi:		// llvm.spu.si.xorbi
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::ppc_altivec_vaddsbs:		// llvm.ppc.altivec.vaddsbs
  case Intrinsic::ppc_altivec_vaddubs:		// llvm.ppc.altivec.vaddubs
  case Intrinsic::ppc_altivec_vavgsb:		// llvm.ppc.altivec.vavgsb
  case Intrinsic::ppc_altivec_vavgub:		// llvm.ppc.altivec.vavgub
  case Intrinsic::ppc_altivec_vcmpequb:		// llvm.ppc.altivec.vcmpequb
  case Intrinsic::ppc_altivec_vcmpgtsb:		// llvm.ppc.altivec.vcmpgtsb
  case Intrinsic::ppc_altivec_vcmpgtub:		// llvm.ppc.altivec.vcmpgtub
  case Intrinsic::ppc_altivec_vmaxsb:		// llvm.ppc.altivec.vmaxsb
  case Intrinsic::ppc_altivec_vmaxub:		// llvm.ppc.altivec.vmaxub
  case Intrinsic::ppc_altivec_vminsb:		// llvm.ppc.altivec.vminsb
  case Intrinsic::ppc_altivec_vminub:		// llvm.ppc.altivec.vminub
  case Intrinsic::ppc_altivec_vrlb:		// llvm.ppc.altivec.vrlb
  case Intrinsic::ppc_altivec_vslb:		// llvm.ppc.altivec.vslb
  case Intrinsic::ppc_altivec_vsrab:		// llvm.ppc.altivec.vsrab
  case Intrinsic::ppc_altivec_vsrb:		// llvm.ppc.altivec.vsrb
  case Intrinsic::ppc_altivec_vsubsbs:		// llvm.ppc.altivec.vsubsbs
  case Intrinsic::ppc_altivec_vsububs:		// llvm.ppc.altivec.vsububs
  case Intrinsic::spu_si_ceqb:		// llvm.spu.si.ceqb
  case Intrinsic::spu_si_cgtb:		// llvm.spu.si.cgtb
  case Intrinsic::spu_si_clgtb:		// llvm.spu.si.clgtb
  case Intrinsic::x86_sse2_padds_b:		// llvm.x86.sse2.padds.b
  case Intrinsic::x86_sse2_paddus_b:		// llvm.x86.sse2.paddus.b
  case Intrinsic::x86_sse2_pavg_b:		// llvm.x86.sse2.pavg.b
  case Intrinsic::x86_sse2_pcmpeq_b:		// llvm.x86.sse2.pcmpeq.b
  case Intrinsic::x86_sse2_pcmpgt_b:		// llvm.x86.sse2.pcmpgt.b
  case Intrinsic::x86_sse2_pmaxu_b:		// llvm.x86.sse2.pmaxu.b
  case Intrinsic::x86_sse2_pminu_b:		// llvm.x86.sse2.pminu.b
  case Intrinsic::x86_sse2_psubs_b:		// llvm.x86.sse2.psubs.b
  case Intrinsic::x86_sse2_psubus_b:		// llvm.x86.sse2.psubus.b
  case Intrinsic::x86_sse41_pmaxsb:		// llvm.x86.sse41.pmaxsb
  case Intrinsic::x86_sse41_pminsb:		// llvm.x86.sse41.pminsb
  case Intrinsic::x86_ssse3_pshuf_b_128:		// llvm.x86.ssse3.pshuf.b.128
  case Intrinsic::x86_ssse3_psign_b_128:		// llvm.x86.ssse3.psign.b.128
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    break;
  case Intrinsic::x86_sse41_mpsadbw:		// llvm.x86.sse41.mpsadbw
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_sse42_pcmpistrm128:		// llvm.x86.sse42.pcmpistrm128
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_sse41_pblendvb:		// llvm.x86.sse41.pblendvb
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    break;
  case Intrinsic::ppc_altivec_vpkswss:		// llvm.ppc.altivec.vpkswss
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::ppc_altivec_vpkshss:		// llvm.ppc.altivec.vpkshss
  case Intrinsic::ppc_altivec_vpkshus:		// llvm.ppc.altivec.vpkshus
  case Intrinsic::ppc_altivec_vpkuhus:		// llvm.ppc.altivec.vpkuhus
  case Intrinsic::x86_sse2_packsswb_128:		// llvm.x86.sse2.packsswb.128
  case Intrinsic::x86_sse2_packuswb_128:		// llvm.x86.sse2.packuswb.128
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    break;
  case Intrinsic::x86_mmx_cvtsi32_si64:		// llvm.x86.mmx.cvtsi32.si64
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 1);
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_mmx_pslli_q:		// llvm.x86.mmx.pslli.q
  case Intrinsic::x86_mmx_psrli_q:		// llvm.x86.mmx.psrli.q
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 1);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_mmx_pinsr_w:		// llvm.x86.mmx.pinsr.w
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 1);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_mmx_padd_q:		// llvm.x86.mmx.padd.q
  case Intrinsic::x86_mmx_pand:		// llvm.x86.mmx.pand
  case Intrinsic::x86_mmx_pandn:		// llvm.x86.mmx.pandn
  case Intrinsic::x86_mmx_por:		// llvm.x86.mmx.por
  case Intrinsic::x86_mmx_psll_q:		// llvm.x86.mmx.psll.q
  case Intrinsic::x86_mmx_psrl_q:		// llvm.x86.mmx.psrl.q
  case Intrinsic::x86_mmx_psub_q:		// llvm.x86.mmx.psub.q
  case Intrinsic::x86_mmx_pxor:		// llvm.x86.mmx.pxor
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 1);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
    break;
  case Intrinsic::x86_sse2_loadu_pd:		// llvm.x86.sse2.loadu.pd
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::x86_avx_maskload_pd:		// llvm.x86.avx.maskload.pd
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    break;
  case Intrinsic::x86_sse2_sqrt_pd:		// llvm.x86.sse2.sqrt.pd
  case Intrinsic::x86_sse2_sqrt_sd:		// llvm.x86.sse2.sqrt.sd
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    break;
  case Intrinsic::x86_sse2_cvtsi2sd:		// llvm.x86.sse2.cvtsi2sd
  case Intrinsic::x86_sse41_round_pd:		// llvm.x86.sse41.round.pd
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_sse2_cvtsi642sd:		// llvm.x86.sse2.cvtsi642sd
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    ArgTys.push_back(IntegerType::get(Context, 64));
    break;
  case Intrinsic::x86_avx_vpermil_pd:		// llvm.x86.avx.vpermil.pd
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::spu_si_dfa:		// llvm.spu.si.dfa
  case Intrinsic::spu_si_dfm:		// llvm.spu.si.dfm
  case Intrinsic::spu_si_dfma:		// llvm.spu.si.dfma
  case Intrinsic::spu_si_dfms:		// llvm.spu.si.dfms
  case Intrinsic::spu_si_dfnma:		// llvm.spu.si.dfnma
  case Intrinsic::spu_si_dfnms:		// llvm.spu.si.dfnms
  case Intrinsic::spu_si_dfs:		// llvm.spu.si.dfs
  case Intrinsic::x86_sse2_add_sd:		// llvm.x86.sse2.add.sd
  case Intrinsic::x86_sse2_div_sd:		// llvm.x86.sse2.div.sd
  case Intrinsic::x86_sse2_max_pd:		// llvm.x86.sse2.max.pd
  case Intrinsic::x86_sse2_max_sd:		// llvm.x86.sse2.max.sd
  case Intrinsic::x86_sse2_min_pd:		// llvm.x86.sse2.min.pd
  case Intrinsic::x86_sse2_min_sd:		// llvm.x86.sse2.min.sd
  case Intrinsic::x86_sse2_mul_sd:		// llvm.x86.sse2.mul.sd
  case Intrinsic::x86_sse2_sub_sd:		// llvm.x86.sse2.sub.sd
  case Intrinsic::x86_sse3_addsub_pd:		// llvm.x86.sse3.addsub.pd
  case Intrinsic::x86_sse3_hadd_pd:		// llvm.x86.sse3.hadd.pd
  case Intrinsic::x86_sse3_hsub_pd:		// llvm.x86.sse3.hsub.pd
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    break;
  case Intrinsic::x86_sse41_blendpd:		// llvm.x86.sse41.blendpd
  case Intrinsic::x86_sse41_dppd:		// llvm.x86.sse41.dppd
  case Intrinsic::x86_sse41_round_sd:		// llvm.x86.sse41.round.sd
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_sse2_cmp_pd:		// llvm.x86.sse2.cmp.pd
  case Intrinsic::x86_sse2_cmp_sd:		// llvm.x86.sse2.cmp.sd
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_sse41_blendvpd:		// llvm.x86.sse41.blendvpd
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    break;
  case Intrinsic::x86_avx_vpermilvar_pd:		// llvm.x86.avx.vpermilvar.pd
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
    break;
  case Intrinsic::x86_sse2_cvtss2sd:		// llvm.x86.sse2.cvtss2sd
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::x86_sse_cvtpi2pd:		// llvm.x86.sse.cvtpi2pd
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
    break;
  case Intrinsic::x86_sse2_cvtps2pd:		// llvm.x86.sse2.cvtps2pd
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::x86_avx_vextractf128_pd_256:		// llvm.x86.avx.vextractf128.pd.256
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_sse2_cvtdq2pd:		// llvm.x86.sse2.cvtdq2pd
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::x86_mmx_vec_init_d:		// llvm.x86.mmx.vec.init.d
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
    ArgTys.push_back(IntegerType::get(Context, 32));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::arm_neon_vacged:		// llvm.arm.neon.vacged
  case Intrinsic::arm_neon_vacgtd:		// llvm.arm.neon.vacgtd
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 2));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 2));
    break;
  case Intrinsic::x86_sse_cvtpd2pi:		// llvm.x86.sse.cvtpd2pi
  case Intrinsic::x86_sse_cvttpd2pi:		// llvm.x86.sse.cvttpd2pi
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    break;
  case Intrinsic::x86_ssse3_pabs_d:		// llvm.x86.ssse3.pabs.d
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
    break;
  case Intrinsic::x86_mmx_pslli_d:		// llvm.x86.mmx.pslli.d
  case Intrinsic::x86_mmx_psrai_d:		// llvm.x86.mmx.psrai.d
  case Intrinsic::x86_mmx_psrli_d:		// llvm.x86.mmx.psrli.d
  case Intrinsic::x86_mmx_vec_ext_d:		// llvm.x86.mmx.vec.ext.d
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_mmx_psll_d:		// llvm.x86.mmx.psll.d
  case Intrinsic::x86_mmx_psra_d:		// llvm.x86.mmx.psra.d
  case Intrinsic::x86_mmx_psrl_d:		// llvm.x86.mmx.psrl.d
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
    break;
  case Intrinsic::x86_mmx_padd_d:		// llvm.x86.mmx.padd.d
  case Intrinsic::x86_mmx_pcmpeq_d:		// llvm.x86.mmx.pcmpeq.d
  case Intrinsic::x86_mmx_pcmpgt_d:		// llvm.x86.mmx.pcmpgt.d
  case Intrinsic::x86_mmx_pmulu_dq:		// llvm.x86.mmx.pmulu.dq
  case Intrinsic::x86_mmx_psub_d:		// llvm.x86.mmx.psub.d
  case Intrinsic::x86_mmx_punpckhdq:		// llvm.x86.mmx.punpckhdq
  case Intrinsic::x86_mmx_punpckldq:		// llvm.x86.mmx.punpckldq
  case Intrinsic::x86_ssse3_phadd_d:		// llvm.x86.ssse3.phadd.d
  case Intrinsic::x86_ssse3_phsub_d:		// llvm.x86.ssse3.phsub.d
  case Intrinsic::x86_ssse3_psign_d:		// llvm.x86.ssse3.psign.d
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
    break;
  case Intrinsic::x86_sse_cvtps2pi:		// llvm.x86.sse.cvtps2pi
  case Intrinsic::x86_sse_cvttps2pi:		// llvm.x86.sse.cvttps2pi
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::x86_mmx_pmadd_wd:		// llvm.x86.mmx.pmadd.wd
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
    break;
  case Intrinsic::x86_sse41_movntdqa:		// llvm.x86.sse41.movntdqa
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::x86_sse41_pmovsxbq:		// llvm.x86.sse41.pmovsxbq
  case Intrinsic::x86_sse41_pmovzxbq:		// llvm.x86.sse41.pmovzxbq
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    break;
  case Intrinsic::x86_sse2_psad_bw:		// llvm.x86.sse2.psad.bw
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    break;
  case Intrinsic::x86_aesni_aesimc:		// llvm.x86.aesni.aesimc
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
    break;
  case Intrinsic::x86_sse2_psll_dq:		// llvm.x86.sse2.psll.dq
  case Intrinsic::x86_sse2_psll_dq_bs:		// llvm.x86.sse2.psll.dq.bs
  case Intrinsic::x86_sse2_pslli_q:		// llvm.x86.sse2.pslli.q
  case Intrinsic::x86_sse2_psrl_dq:		// llvm.x86.sse2.psrl.dq
  case Intrinsic::x86_sse2_psrl_dq_bs:		// llvm.x86.sse2.psrl.dq.bs
  case Intrinsic::x86_sse2_psrli_q:		// llvm.x86.sse2.psrli.q
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_aesni_aeskeygenassist:		// llvm.x86.aesni.aeskeygenassist
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_aesni_aesdec:		// llvm.x86.aesni.aesdec
  case Intrinsic::x86_aesni_aesdeclast:		// llvm.x86.aesni.aesdeclast
  case Intrinsic::x86_aesni_aesenc:		// llvm.x86.aesni.aesenc
  case Intrinsic::x86_aesni_aesenclast:		// llvm.x86.aesni.aesenclast
  case Intrinsic::x86_sse2_psll_q:		// llvm.x86.sse2.psll.q
  case Intrinsic::x86_sse2_psrl_q:		// llvm.x86.sse2.psrl.q
  case Intrinsic::x86_sse41_pcmpeqq:		// llvm.x86.sse41.pcmpeqq
  case Intrinsic::x86_sse42_pcmpgtq:		// llvm.x86.sse42.pcmpgtq
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
    break;
  case Intrinsic::x86_sse41_pmovsxdq:		// llvm.x86.sse41.pmovsxdq
  case Intrinsic::x86_sse41_pmovzxdq:		// llvm.x86.sse41.pmovzxdq
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::x86_sse2_pmulu_dq:		// llvm.x86.sse2.pmulu.dq
  case Intrinsic::x86_sse41_pmuldq:		// llvm.x86.sse41.pmuldq
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::x86_sse41_pmovsxwq:		// llvm.x86.sse41.pmovsxwq
  case Intrinsic::x86_sse41_pmovzxwq:		// llvm.x86.sse41.pmovzxwq
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    break;
  case Intrinsic::x86_avx_ldu_dq_256:		// llvm.x86.avx.ldu.dq.256
  case Intrinsic::x86_avx_loadu_dq_256:		// llvm.x86.avx.loadu.dq.256
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 32);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::x86_avx_vbroadcastss:		// llvm.x86.avx.vbroadcastss
  case Intrinsic::x86_sse_loadu_ps:		// llvm.x86.sse.loadu.ps
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::x86_avx_maskload_ps:		// llvm.x86.avx.maskload.ps
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::x86_sse2_cvtpd2ps:		// llvm.x86.sse2.cvtpd2ps
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    break;
  case Intrinsic::ppc_altivec_vexptefp:		// llvm.ppc.altivec.vexptefp
  case Intrinsic::ppc_altivec_vlogefp:		// llvm.ppc.altivec.vlogefp
  case Intrinsic::ppc_altivec_vrefp:		// llvm.ppc.altivec.vrefp
  case Intrinsic::ppc_altivec_vrfim:		// llvm.ppc.altivec.vrfim
  case Intrinsic::ppc_altivec_vrfin:		// llvm.ppc.altivec.vrfin
  case Intrinsic::ppc_altivec_vrfip:		// llvm.ppc.altivec.vrfip
  case Intrinsic::ppc_altivec_vrfiz:		// llvm.ppc.altivec.vrfiz
  case Intrinsic::ppc_altivec_vrsqrtefp:		// llvm.ppc.altivec.vrsqrtefp
  case Intrinsic::x86_sse_rcp_ps:		// llvm.x86.sse.rcp.ps
  case Intrinsic::x86_sse_rcp_ss:		// llvm.x86.sse.rcp.ss
  case Intrinsic::x86_sse_rsqrt_ps:		// llvm.x86.sse.rsqrt.ps
  case Intrinsic::x86_sse_rsqrt_ss:		// llvm.x86.sse.rsqrt.ss
  case Intrinsic::x86_sse_sqrt_ps:		// llvm.x86.sse.sqrt.ps
  case Intrinsic::x86_sse_sqrt_ss:		// llvm.x86.sse.sqrt.ss
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::x86_sse41_round_ps:		// llvm.x86.sse41.round.ps
  case Intrinsic::x86_sse_cvtsi2ss:		// llvm.x86.sse.cvtsi2ss
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_sse_cvtsi642ss:		// llvm.x86.sse.cvtsi642ss
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(IntegerType::get(Context, 64));
    break;
  case Intrinsic::x86_avx_vpermil_ps:		// llvm.x86.avx.vpermil.ps
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_sse2_cvtsd2ss:		// llvm.x86.sse2.cvtsd2ss
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    break;
  case Intrinsic::x86_sse_cvtpi2ps:		// llvm.x86.sse.cvtpi2ps
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
    break;
  case Intrinsic::ppc_altivec_vmaxfp:		// llvm.ppc.altivec.vmaxfp
  case Intrinsic::ppc_altivec_vminfp:		// llvm.ppc.altivec.vminfp
  case Intrinsic::spu_si_fa:		// llvm.spu.si.fa
  case Intrinsic::spu_si_fceq:		// llvm.spu.si.fceq
  case Intrinsic::spu_si_fcgt:		// llvm.spu.si.fcgt
  case Intrinsic::spu_si_fcmeq:		// llvm.spu.si.fcmeq
  case Intrinsic::spu_si_fcmgt:		// llvm.spu.si.fcmgt
  case Intrinsic::spu_si_fm:		// llvm.spu.si.fm
  case Intrinsic::spu_si_fs:		// llvm.spu.si.fs
  case Intrinsic::x86_sse3_addsub_ps:		// llvm.x86.sse3.addsub.ps
  case Intrinsic::x86_sse3_hadd_ps:		// llvm.x86.sse3.hadd.ps
  case Intrinsic::x86_sse3_hsub_ps:		// llvm.x86.sse3.hsub.ps
  case Intrinsic::x86_sse_add_ss:		// llvm.x86.sse.add.ss
  case Intrinsic::x86_sse_div_ss:		// llvm.x86.sse.div.ss
  case Intrinsic::x86_sse_max_ps:		// llvm.x86.sse.max.ps
  case Intrinsic::x86_sse_max_ss:		// llvm.x86.sse.max.ss
  case Intrinsic::x86_sse_min_ps:		// llvm.x86.sse.min.ps
  case Intrinsic::x86_sse_min_ss:		// llvm.x86.sse.min.ss
  case Intrinsic::x86_sse_mul_ss:		// llvm.x86.sse.mul.ss
  case Intrinsic::x86_sse_sub_ss:		// llvm.x86.sse.sub.ss
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::x86_sse41_blendps:		// llvm.x86.sse41.blendps
  case Intrinsic::x86_sse41_dpps:		// llvm.x86.sse41.dpps
  case Intrinsic::x86_sse41_insertps:		// llvm.x86.sse41.insertps
  case Intrinsic::x86_sse41_round_ss:		// llvm.x86.sse41.round.ss
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_sse_cmp_ps:		// llvm.x86.sse.cmp.ps
  case Intrinsic::x86_sse_cmp_ss:		// llvm.x86.sse.cmp.ss
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::ppc_altivec_vmaddfp:		// llvm.ppc.altivec.vmaddfp
  case Intrinsic::ppc_altivec_vnmsubfp:		// llvm.ppc.altivec.vnmsubfp
  case Intrinsic::spu_si_fma:		// llvm.spu.si.fma
  case Intrinsic::spu_si_fms:		// llvm.spu.si.fms
  case Intrinsic::spu_si_fnms:		// llvm.spu.si.fnms
  case Intrinsic::x86_sse41_blendvps:		// llvm.x86.sse41.blendvps
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::x86_avx_vpermilvar_ps:		// llvm.x86.avx.vpermilvar.ps
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::x86_avx_cvt_pd2_ps_256:		// llvm.x86.avx.cvt.pd2.ps.256
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    break;
  case Intrinsic::x86_sse2_cvtdq2ps:		// llvm.x86.sse2.cvtdq2ps
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::ppc_altivec_vcfsx:		// llvm.ppc.altivec.vcfsx
  case Intrinsic::ppc_altivec_vcfux:		// llvm.ppc.altivec.vcfux
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_avx_vextractf128_ps_256:		// llvm.x86.avx.vextractf128.ps.256
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_avx_loadu_pd_256:		// llvm.x86.avx.loadu.pd.256
  case Intrinsic::x86_avx_vbroadcast_sd_256:		// llvm.x86.avx.vbroadcast.sd.256
  case Intrinsic::x86_avx_vbroadcastf128_pd_256:		// llvm.x86.avx.vbroadcastf128.pd.256
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::x86_avx_maskload_pd_256:		// llvm.x86.avx.maskload.pd.256
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    break;
  case Intrinsic::x86_avx_cvt_ps2_pd_256:		// llvm.x86.avx.cvt.ps2.pd.256
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::x86_avx_sqrt_pd_256:		// llvm.x86.avx.sqrt.pd.256
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    break;
  case Intrinsic::x86_avx_round_pd_256:		// llvm.x86.avx.round.pd.256
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_avx_vpermil_pd_256:		// llvm.x86.avx.vpermil.pd.256
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_avx_vinsertf128_pd_256:		// llvm.x86.avx.vinsertf128.pd.256
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_avx_addsub_pd_256:		// llvm.x86.avx.addsub.pd.256
  case Intrinsic::x86_avx_hadd_pd_256:		// llvm.x86.avx.hadd.pd.256
  case Intrinsic::x86_avx_hsub_pd_256:		// llvm.x86.avx.hsub.pd.256
  case Intrinsic::x86_avx_max_pd_256:		// llvm.x86.avx.max.pd.256
  case Intrinsic::x86_avx_min_pd_256:		// llvm.x86.avx.min.pd.256
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    break;
  case Intrinsic::x86_avx_blend_pd_256:		// llvm.x86.avx.blend.pd.256
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_avx_cmp_pd_256:		// llvm.x86.avx.cmp.pd.256
  case Intrinsic::x86_avx_vperm2f128_pd_256:		// llvm.x86.avx.vperm2f128.pd.256
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_avx_blendv_pd_256:		// llvm.x86.avx.blendv.pd.256
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    break;
  case Intrinsic::x86_avx_vpermilvar_pd_256:		// llvm.x86.avx.vpermilvar.pd.256
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4));
    break;
  case Intrinsic::x86_avx_cvtdq2_pd_256:		// llvm.x86.avx.cvtdq2.pd.256
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::x86_mmx_vec_init_w:		// llvm.x86.mmx.vec.init.w
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 4);
    ArgTys.push_back(IntegerType::get(Context, 16));
    ArgTys.push_back(IntegerType::get(Context, 16));
    ArgTys.push_back(IntegerType::get(Context, 16));
    ArgTys.push_back(IntegerType::get(Context, 16));
    break;
  case Intrinsic::x86_mmx_packssdw:		// llvm.x86.mmx.packssdw
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
    break;
  case Intrinsic::x86_ssse3_pabs_w:		// llvm.x86.ssse3.pabs.w
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
    break;
  case Intrinsic::x86_mmx_pslli_w:		// llvm.x86.mmx.pslli.w
  case Intrinsic::x86_mmx_psrai_w:		// llvm.x86.mmx.psrai.w
  case Intrinsic::x86_mmx_psrli_w:		// llvm.x86.mmx.psrli.w
  case Intrinsic::x86_ssse3_pshuf_w:		// llvm.x86.ssse3.pshuf.w
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_mmx_psll_w:		// llvm.x86.mmx.psll.w
  case Intrinsic::x86_mmx_psra_w:		// llvm.x86.mmx.psra.w
  case Intrinsic::x86_mmx_psrl_w:		// llvm.x86.mmx.psrl.w
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
    break;
  case Intrinsic::x86_mmx_padd_w:		// llvm.x86.mmx.padd.w
  case Intrinsic::x86_mmx_padds_w:		// llvm.x86.mmx.padds.w
  case Intrinsic::x86_mmx_paddus_w:		// llvm.x86.mmx.paddus.w
  case Intrinsic::x86_mmx_pavg_w:		// llvm.x86.mmx.pavg.w
  case Intrinsic::x86_mmx_pcmpeq_w:		// llvm.x86.mmx.pcmpeq.w
  case Intrinsic::x86_mmx_pcmpgt_w:		// llvm.x86.mmx.pcmpgt.w
  case Intrinsic::x86_mmx_pmaxs_w:		// llvm.x86.mmx.pmaxs.w
  case Intrinsic::x86_mmx_pmins_w:		// llvm.x86.mmx.pmins.w
  case Intrinsic::x86_mmx_pmulh_w:		// llvm.x86.mmx.pmulh.w
  case Intrinsic::x86_mmx_pmulhu_w:		// llvm.x86.mmx.pmulhu.w
  case Intrinsic::x86_mmx_pmull_w:		// llvm.x86.mmx.pmull.w
  case Intrinsic::x86_mmx_psub_w:		// llvm.x86.mmx.psub.w
  case Intrinsic::x86_mmx_psubs_w:		// llvm.x86.mmx.psubs.w
  case Intrinsic::x86_mmx_psubus_w:		// llvm.x86.mmx.psubus.w
  case Intrinsic::x86_mmx_punpckhwd:		// llvm.x86.mmx.punpckhwd
  case Intrinsic::x86_mmx_punpcklwd:		// llvm.x86.mmx.punpcklwd
  case Intrinsic::x86_ssse3_phadd_sw:		// llvm.x86.ssse3.phadd.sw
  case Intrinsic::x86_ssse3_phadd_w:		// llvm.x86.ssse3.phadd.w
  case Intrinsic::x86_ssse3_phsub_sw:		// llvm.x86.ssse3.phsub.sw
  case Intrinsic::x86_ssse3_phsub_w:		// llvm.x86.ssse3.phsub.w
  case Intrinsic::x86_ssse3_pmadd_ub_sw:		// llvm.x86.ssse3.pmadd.ub.sw
  case Intrinsic::x86_ssse3_pmul_hr_sw:		// llvm.x86.ssse3.pmul.hr.sw
  case Intrinsic::x86_ssse3_psign_w:		// llvm.x86.ssse3.psign.w
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
    break;
  case Intrinsic::x86_mmx_psad_bw:		// llvm.x86.mmx.psad.bw
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    break;
  case Intrinsic::ppc_altivec_lvewx:		// llvm.ppc.altivec.lvewx
  case Intrinsic::ppc_altivec_lvx:		// llvm.ppc.altivec.lvx
  case Intrinsic::ppc_altivec_lvxl:		// llvm.ppc.altivec.lvxl
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::x86_sse41_pmovsxbd:		// llvm.x86.sse41.pmovsxbd
  case Intrinsic::x86_sse41_pmovzxbd:		// llvm.x86.sse41.pmovzxbd
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    break;
  case Intrinsic::ppc_altivec_vmsummbm:		// llvm.ppc.altivec.vmsummbm
  case Intrinsic::ppc_altivec_vmsumubm:		// llvm.ppc.altivec.vmsumubm
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::ppc_altivec_vsum4sbs:		// llvm.ppc.altivec.vsum4sbs
  case Intrinsic::ppc_altivec_vsum4ubs:		// llvm.ppc.altivec.vsum4ubs
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::x86_sse2_cvtpd2dq:		// llvm.x86.sse2.cvtpd2dq
  case Intrinsic::x86_sse2_cvttpd2dq:		// llvm.x86.sse2.cvttpd2dq
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
    break;
  case Intrinsic::x86_sse2_cvtps2dq:		// llvm.x86.sse2.cvtps2dq
  case Intrinsic::x86_sse2_cvttps2dq:		// llvm.x86.sse2.cvttps2dq
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::ppc_altivec_vctsxs:		// llvm.ppc.altivec.vctsxs
  case Intrinsic::ppc_altivec_vctuxs:		// llvm.ppc.altivec.vctuxs
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::arm_neon_vacgeq:		// llvm.arm.neon.vacgeq
  case Intrinsic::arm_neon_vacgtq:		// llvm.arm.neon.vacgtq
  case Intrinsic::ppc_altivec_vcmpbfp:		// llvm.ppc.altivec.vcmpbfp
  case Intrinsic::ppc_altivec_vcmpeqfp:		// llvm.ppc.altivec.vcmpeqfp
  case Intrinsic::ppc_altivec_vcmpgefp:		// llvm.ppc.altivec.vcmpgefp
  case Intrinsic::ppc_altivec_vcmpgtfp:		// llvm.ppc.altivec.vcmpgtfp
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    break;
  case Intrinsic::x86_avx_cvt_pd2dq_256:		// llvm.x86.avx.cvt.pd2dq.256
  case Intrinsic::x86_avx_cvtt_pd2dq_256:		// llvm.x86.avx.cvtt.pd2dq.256
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4));
    break;
  case Intrinsic::x86_ssse3_pabs_d_128:		// llvm.x86.ssse3.pabs.d.128
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::spu_si_shli:		// llvm.spu.si.shli
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::spu_si_ai:		// llvm.spu.si.ai
  case Intrinsic::spu_si_andi:		// llvm.spu.si.andi
  case Intrinsic::spu_si_ceqi:		// llvm.spu.si.ceqi
  case Intrinsic::spu_si_cgti:		// llvm.spu.si.cgti
  case Intrinsic::spu_si_clgti:		// llvm.spu.si.clgti
  case Intrinsic::spu_si_ori:		// llvm.spu.si.ori
  case Intrinsic::spu_si_sfi:		// llvm.spu.si.sfi
  case Intrinsic::spu_si_xori:		// llvm.spu.si.xori
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(IntegerType::get(Context, 16));
    break;
  case Intrinsic::x86_sse2_pslli_d:		// llvm.x86.sse2.pslli.d
  case Intrinsic::x86_sse2_psrai_d:		// llvm.x86.sse2.psrai.d
  case Intrinsic::x86_sse2_psrli_d:		// llvm.x86.sse2.psrli.d
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::ppc_altivec_vaddcuw:		// llvm.ppc.altivec.vaddcuw
  case Intrinsic::ppc_altivec_vaddsws:		// llvm.ppc.altivec.vaddsws
  case Intrinsic::ppc_altivec_vadduws:		// llvm.ppc.altivec.vadduws
  case Intrinsic::ppc_altivec_vavgsw:		// llvm.ppc.altivec.vavgsw
  case Intrinsic::ppc_altivec_vavguw:		// llvm.ppc.altivec.vavguw
  case Intrinsic::ppc_altivec_vcmpequw:		// llvm.ppc.altivec.vcmpequw
  case Intrinsic::ppc_altivec_vcmpgtsw:		// llvm.ppc.altivec.vcmpgtsw
  case Intrinsic::ppc_altivec_vcmpgtuw:		// llvm.ppc.altivec.vcmpgtuw
  case Intrinsic::ppc_altivec_vmaxsw:		// llvm.ppc.altivec.vmaxsw
  case Intrinsic::ppc_altivec_vmaxuw:		// llvm.ppc.altivec.vmaxuw
  case Intrinsic::ppc_altivec_vminsw:		// llvm.ppc.altivec.vminsw
  case Intrinsic::ppc_altivec_vminuw:		// llvm.ppc.altivec.vminuw
  case Intrinsic::ppc_altivec_vrlw:		// llvm.ppc.altivec.vrlw
  case Intrinsic::ppc_altivec_vsl:		// llvm.ppc.altivec.vsl
  case Intrinsic::ppc_altivec_vslo:		// llvm.ppc.altivec.vslo
  case Intrinsic::ppc_altivec_vslw:		// llvm.ppc.altivec.vslw
  case Intrinsic::ppc_altivec_vsr:		// llvm.ppc.altivec.vsr
  case Intrinsic::ppc_altivec_vsraw:		// llvm.ppc.altivec.vsraw
  case Intrinsic::ppc_altivec_vsro:		// llvm.ppc.altivec.vsro
  case Intrinsic::ppc_altivec_vsrw:		// llvm.ppc.altivec.vsrw
  case Intrinsic::ppc_altivec_vsubcuw:		// llvm.ppc.altivec.vsubcuw
  case Intrinsic::ppc_altivec_vsubsws:		// llvm.ppc.altivec.vsubsws
  case Intrinsic::ppc_altivec_vsubuws:		// llvm.ppc.altivec.vsubuws
  case Intrinsic::ppc_altivec_vsum2sws:		// llvm.ppc.altivec.vsum2sws
  case Intrinsic::ppc_altivec_vsumsws:		// llvm.ppc.altivec.vsumsws
  case Intrinsic::spu_si_a:		// llvm.spu.si.a
  case Intrinsic::spu_si_addx:		// llvm.spu.si.addx
  case Intrinsic::spu_si_and:		// llvm.spu.si.and
  case Intrinsic::spu_si_andc:		// llvm.spu.si.andc
  case Intrinsic::spu_si_bg:		// llvm.spu.si.bg
  case Intrinsic::spu_si_bgx:		// llvm.spu.si.bgx
  case Intrinsic::spu_si_ceq:		// llvm.spu.si.ceq
  case Intrinsic::spu_si_cg:		// llvm.spu.si.cg
  case Intrinsic::spu_si_cgt:		// llvm.spu.si.cgt
  case Intrinsic::spu_si_cgx:		// llvm.spu.si.cgx
  case Intrinsic::spu_si_clgt:		// llvm.spu.si.clgt
  case Intrinsic::spu_si_nand:		// llvm.spu.si.nand
  case Intrinsic::spu_si_nor:		// llvm.spu.si.nor
  case Intrinsic::spu_si_or:		// llvm.spu.si.or
  case Intrinsic::spu_si_orc:		// llvm.spu.si.orc
  case Intrinsic::spu_si_sf:		// llvm.spu.si.sf
  case Intrinsic::spu_si_sfx:		// llvm.spu.si.sfx
  case Intrinsic::spu_si_xor:		// llvm.spu.si.xor
  case Intrinsic::x86_sse2_pcmpeq_d:		// llvm.x86.sse2.pcmpeq.d
  case Intrinsic::x86_sse2_pcmpgt_d:		// llvm.x86.sse2.pcmpgt.d
  case Intrinsic::x86_sse2_psll_d:		// llvm.x86.sse2.psll.d
  case Intrinsic::x86_sse2_psra_d:		// llvm.x86.sse2.psra.d
  case Intrinsic::x86_sse2_psrl_d:		// llvm.x86.sse2.psrl.d
  case Intrinsic::x86_sse41_pmaxsd:		// llvm.x86.sse41.pmaxsd
  case Intrinsic::x86_sse41_pmaxud:		// llvm.x86.sse41.pmaxud
  case Intrinsic::x86_sse41_pminsd:		// llvm.x86.sse41.pminsd
  case Intrinsic::x86_sse41_pminud:		// llvm.x86.sse41.pminud
  case Intrinsic::x86_ssse3_phadd_d_128:		// llvm.x86.ssse3.phadd.d.128
  case Intrinsic::x86_ssse3_phadd_sw_128:		// llvm.x86.ssse3.phadd.sw.128
  case Intrinsic::x86_ssse3_phsub_d_128:		// llvm.x86.ssse3.phsub.d.128
  case Intrinsic::x86_ssse3_psign_d_128:		// llvm.x86.ssse3.psign.d.128
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::ppc_altivec_vperm:		// llvm.ppc.altivec.vperm
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    break;
  case Intrinsic::ppc_altivec_vsel:		// llvm.ppc.altivec.vsel
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::spu_si_mpyh:		// llvm.spu.si.mpyh
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    break;
  case Intrinsic::ppc_altivec_vupkhpx:		// llvm.ppc.altivec.vupkhpx
  case Intrinsic::ppc_altivec_vupkhsh:		// llvm.ppc.altivec.vupkhsh
  case Intrinsic::ppc_altivec_vupklpx:		// llvm.ppc.altivec.vupklpx
  case Intrinsic::ppc_altivec_vupklsh:		// llvm.ppc.altivec.vupklsh
  case Intrinsic::x86_sse41_pmovsxwd:		// llvm.x86.sse41.pmovsxwd
  case Intrinsic::x86_sse41_pmovzxwd:		// llvm.x86.sse41.pmovzxwd
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    break;
  case Intrinsic::spu_si_mpyi:		// llvm.spu.si.mpyi
  case Intrinsic::spu_si_mpyui:		// llvm.spu.si.mpyui
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(IntegerType::get(Context, 16));
    break;
  case Intrinsic::ppc_altivec_vsum4shs:		// llvm.ppc.altivec.vsum4shs
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::ppc_altivec_vmulesh:		// llvm.ppc.altivec.vmulesh
  case Intrinsic::ppc_altivec_vmuleuh:		// llvm.ppc.altivec.vmuleuh
  case Intrinsic::ppc_altivec_vmulosh:		// llvm.ppc.altivec.vmulosh
  case Intrinsic::ppc_altivec_vmulouh:		// llvm.ppc.altivec.vmulouh
  case Intrinsic::spu_si_mpy:		// llvm.spu.si.mpy
  case Intrinsic::spu_si_mpyhh:		// llvm.spu.si.mpyhh
  case Intrinsic::spu_si_mpyhha:		// llvm.spu.si.mpyhha
  case Intrinsic::spu_si_mpyhhau:		// llvm.spu.si.mpyhhau
  case Intrinsic::spu_si_mpyhhu:		// llvm.spu.si.mpyhhu
  case Intrinsic::spu_si_mpys:		// llvm.spu.si.mpys
  case Intrinsic::spu_si_mpyu:		// llvm.spu.si.mpyu
  case Intrinsic::x86_sse2_pmadd_wd:		// llvm.x86.sse2.pmadd.wd
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    break;
  case Intrinsic::ppc_altivec_vmsumshm:		// llvm.ppc.altivec.vmsumshm
  case Intrinsic::ppc_altivec_vmsumshs:		// llvm.ppc.altivec.vmsumshs
  case Intrinsic::ppc_altivec_vmsumuhm:		// llvm.ppc.altivec.vmsumuhm
  case Intrinsic::ppc_altivec_vmsumuhs:		// llvm.ppc.altivec.vmsumuhs
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::spu_si_mpya:		// llvm.spu.si.mpya
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    break;
  case Intrinsic::x86_avx_vextractf128_si_256:		// llvm.x86.avx.vextractf128.si.256
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_avx_loadu_ps_256:		// llvm.x86.avx.loadu.ps.256
  case Intrinsic::x86_avx_vbroadcastf128_ps_256:		// llvm.x86.avx.vbroadcastf128.ps.256
  case Intrinsic::x86_avx_vbroadcastss_256:		// llvm.x86.avx.vbroadcastss.256
    ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::x86_avx_maskload_ps_256:		// llvm.x86.avx.maskload.ps.256
    ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    break;
  case Intrinsic::x86_avx_rcp_ps_256:		// llvm.x86.avx.rcp.ps.256
  case Intrinsic::x86_avx_rsqrt_ps_256:		// llvm.x86.avx.rsqrt.ps.256
  case Intrinsic::x86_avx_sqrt_ps_256:		// llvm.x86.avx.sqrt.ps.256
    ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    break;
  case Intrinsic::x86_avx_round_ps_256:		// llvm.x86.avx.round.ps.256
    ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_avx_vpermil_ps_256:		// llvm.x86.avx.vpermil.ps.256
    ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_avx_vinsertf128_ps_256:		// llvm.x86.avx.vinsertf128.ps.256
    ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_avx_addsub_ps_256:		// llvm.x86.avx.addsub.ps.256
  case Intrinsic::x86_avx_hadd_ps_256:		// llvm.x86.avx.hadd.ps.256
  case Intrinsic::x86_avx_hsub_ps_256:		// llvm.x86.avx.hsub.ps.256
  case Intrinsic::x86_avx_max_ps_256:		// llvm.x86.avx.max.ps.256
  case Intrinsic::x86_avx_min_ps_256:		// llvm.x86.avx.min.ps.256
    ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    break;
  case Intrinsic::x86_avx_blend_ps_256:		// llvm.x86.avx.blend.ps.256
  case Intrinsic::x86_avx_dp_ps_256:		// llvm.x86.avx.dp.ps.256
    ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::x86_avx_cmp_ps_256:		// llvm.x86.avx.cmp.ps.256
  case Intrinsic::x86_avx_vperm2f128_ps_256:		// llvm.x86.avx.vperm2f128.ps.256
    ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_avx_blendv_ps_256:		// llvm.x86.avx.blendv.ps.256
    ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    break;
  case Intrinsic::x86_avx_vpermilvar_ps_256:		// llvm.x86.avx.vpermilvar.ps.256
    ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
    break;
  case Intrinsic::x86_avx_cvtdq2_ps_256:		// llvm.x86.avx.cvtdq2.ps.256
    ResultTy = VectorType::get(Type::getFloatTy(Context), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
    break;
  case Intrinsic::ppc_altivec_mfvscr:		// llvm.ppc.altivec.mfvscr
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
    break;
  case Intrinsic::ppc_altivec_lvehx:		// llvm.ppc.altivec.lvehx
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
    break;
  case Intrinsic::ppc_altivec_vupkhsb:		// llvm.ppc.altivec.vupkhsb
  case Intrinsic::ppc_altivec_vupklsb:		// llvm.ppc.altivec.vupklsb
  case Intrinsic::x86_sse41_pmovsxbw:		// llvm.x86.sse41.pmovsxbw
  case Intrinsic::x86_sse41_pmovzxbw:		// llvm.x86.sse41.pmovzxbw
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    break;
  case Intrinsic::ppc_altivec_vmulesb:		// llvm.ppc.altivec.vmulesb
  case Intrinsic::ppc_altivec_vmuleub:		// llvm.ppc.altivec.vmuleub
  case Intrinsic::ppc_altivec_vmulosb:		// llvm.ppc.altivec.vmulosb
  case Intrinsic::ppc_altivec_vmuloub:		// llvm.ppc.altivec.vmuloub
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
    break;
  case Intrinsic::ppc_altivec_vpkpx:		// llvm.ppc.altivec.vpkpx
  case Intrinsic::ppc_altivec_vpkswus:		// llvm.ppc.altivec.vpkswus
  case Intrinsic::ppc_altivec_vpkuwus:		// llvm.ppc.altivec.vpkuwus
  case Intrinsic::x86_sse2_packssdw_128:		// llvm.x86.sse2.packssdw.128
  case Intrinsic::x86_sse41_packusdw:		// llvm.x86.sse41.packusdw
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    break;
  case Intrinsic::x86_sse41_phminposuw:		// llvm.x86.sse41.phminposuw
  case Intrinsic::x86_ssse3_pabs_w_128:		// llvm.x86.ssse3.pabs.w.128
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    break;
  case Intrinsic::spu_si_ahi:		// llvm.spu.si.ahi
  case Intrinsic::spu_si_andhi:		// llvm.spu.si.andhi
  case Intrinsic::spu_si_ceqhi:		// llvm.spu.si.ceqhi
  case Intrinsic::spu_si_cgthi:		// llvm.spu.si.cgthi
  case Intrinsic::spu_si_clgthi:		// llvm.spu.si.clgthi
  case Intrinsic::spu_si_fsmbi:		// llvm.spu.si.fsmbi
  case Intrinsic::spu_si_orhi:		// llvm.spu.si.orhi
  case Intrinsic::spu_si_sfhi:		// llvm.spu.si.sfhi
  case Intrinsic::spu_si_xorhi:		// llvm.spu.si.xorhi
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(IntegerType::get(Context, 16));
    break;
  case Intrinsic::spu_si_shlqbi:		// llvm.spu.si.shlqbi
  case Intrinsic::spu_si_shlqby:		// llvm.spu.si.shlqby
  case Intrinsic::x86_sse2_pslli_w:		// llvm.x86.sse2.pslli.w
  case Intrinsic::x86_sse2_psrai_w:		// llvm.x86.sse2.psrai.w
  case Intrinsic::x86_sse2_psrli_w:		// llvm.x86.sse2.psrli.w
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::ppc_altivec_vaddshs:		// llvm.ppc.altivec.vaddshs
  case Intrinsic::ppc_altivec_vadduhs:		// llvm.ppc.altivec.vadduhs
  case Intrinsic::ppc_altivec_vavgsh:		// llvm.ppc.altivec.vavgsh
  case Intrinsic::ppc_altivec_vavguh:		// llvm.ppc.altivec.vavguh
  case Intrinsic::ppc_altivec_vcmpequh:		// llvm.ppc.altivec.vcmpequh
  case Intrinsic::ppc_altivec_vcmpgtsh:		// llvm.ppc.altivec.vcmpgtsh
  case Intrinsic::ppc_altivec_vcmpgtuh:		// llvm.ppc.altivec.vcmpgtuh
  case Intrinsic::ppc_altivec_vmaxsh:		// llvm.ppc.altivec.vmaxsh
  case Intrinsic::ppc_altivec_vmaxuh:		// llvm.ppc.altivec.vmaxuh
  case Intrinsic::ppc_altivec_vminsh:		// llvm.ppc.altivec.vminsh
  case Intrinsic::ppc_altivec_vminuh:		// llvm.ppc.altivec.vminuh
  case Intrinsic::ppc_altivec_vrlh:		// llvm.ppc.altivec.vrlh
  case Intrinsic::ppc_altivec_vslh:		// llvm.ppc.altivec.vslh
  case Intrinsic::ppc_altivec_vsrah:		// llvm.ppc.altivec.vsrah
  case Intrinsic::ppc_altivec_vsrh:		// llvm.ppc.altivec.vsrh
  case Intrinsic::ppc_altivec_vsubshs:		// llvm.ppc.altivec.vsubshs
  case Intrinsic::ppc_altivec_vsubuhs:		// llvm.ppc.altivec.vsubuhs
  case Intrinsic::spu_si_ah:		// llvm.spu.si.ah
  case Intrinsic::spu_si_ceqh:		// llvm.spu.si.ceqh
  case Intrinsic::spu_si_cgth:		// llvm.spu.si.cgth
  case Intrinsic::spu_si_clgth:		// llvm.spu.si.clgth
  case Intrinsic::spu_si_sfh:		// llvm.spu.si.sfh
  case Intrinsic::x86_sse2_padds_w:		// llvm.x86.sse2.padds.w
  case Intrinsic::x86_sse2_paddus_w:		// llvm.x86.sse2.paddus.w
  case Intrinsic::x86_sse2_pavg_w:		// llvm.x86.sse2.pavg.w
  case Intrinsic::x86_sse2_pcmpeq_w:		// llvm.x86.sse2.pcmpeq.w
  case Intrinsic::x86_sse2_pcmpgt_w:		// llvm.x86.sse2.pcmpgt.w
  case Intrinsic::x86_sse2_pmaxs_w:		// llvm.x86.sse2.pmaxs.w
  case Intrinsic::x86_sse2_pmins_w:		// llvm.x86.sse2.pmins.w
  case Intrinsic::x86_sse2_pmulh_w:		// llvm.x86.sse2.pmulh.w
  case Intrinsic::x86_sse2_pmulhu_w:		// llvm.x86.sse2.pmulhu.w
  case Intrinsic::x86_sse2_psll_w:		// llvm.x86.sse2.psll.w
  case Intrinsic::x86_sse2_psra_w:		// llvm.x86.sse2.psra.w
  case Intrinsic::x86_sse2_psrl_w:		// llvm.x86.sse2.psrl.w
  case Intrinsic::x86_sse2_psubs_w:		// llvm.x86.sse2.psubs.w
  case Intrinsic::x86_sse2_psubus_w:		// llvm.x86.sse2.psubus.w
  case Intrinsic::x86_sse41_pmaxuw:		// llvm.x86.sse41.pmaxuw
  case Intrinsic::x86_sse41_pminuw:		// llvm.x86.sse41.pminuw
  case Intrinsic::x86_ssse3_phadd_w_128:		// llvm.x86.ssse3.phadd.w.128
  case Intrinsic::x86_ssse3_phsub_sw_128:		// llvm.x86.ssse3.phsub.sw.128
  case Intrinsic::x86_ssse3_phsub_w_128:		// llvm.x86.ssse3.phsub.w.128
  case Intrinsic::x86_ssse3_pmadd_ub_sw_128:		// llvm.x86.ssse3.pmadd.ub.sw.128
  case Intrinsic::x86_ssse3_pmul_hr_sw_128:		// llvm.x86.ssse3.pmul.hr.sw.128
  case Intrinsic::x86_ssse3_psign_w_128:		// llvm.x86.ssse3.psign.w.128
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    break;
  case Intrinsic::x86_sse41_pblendw:		// llvm.x86.sse41.pblendw
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(IntegerType::get(Context, 32));
    break;
  case Intrinsic::ppc_altivec_vmhaddshs:		// llvm.ppc.altivec.vmhaddshs
  case Intrinsic::ppc_altivec_vmhraddshs:		// llvm.ppc.altivec.vmhraddshs
  case Intrinsic::ppc_altivec_vmladduhm:		// llvm.ppc.altivec.vmladduhm
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
    break;
  case Intrinsic::x86_avx_cvt_ps2dq_256:		// llvm.x86.avx.cvt.ps2dq.256
  case Intrinsic::x86_avx_cvtt_ps2dq_256:		// llvm.x86.avx.cvtt.ps2dq.256
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8));
    break;
  case Intrinsic::x86_avx_vinsertf128_si_256:		// llvm.x86.avx.vinsertf128.si.256
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_avx_vperm2f128_si_256:		// llvm.x86.avx.vperm2f128.si.256
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_mmx_vec_init_b:		// llvm.x86.mmx.vec.init.b
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
    ArgTys.push_back(IntegerType::get(Context, 8));
    ArgTys.push_back(IntegerType::get(Context, 8));
    ArgTys.push_back(IntegerType::get(Context, 8));
    ArgTys.push_back(IntegerType::get(Context, 8));
    ArgTys.push_back(IntegerType::get(Context, 8));
    ArgTys.push_back(IntegerType::get(Context, 8));
    ArgTys.push_back(IntegerType::get(Context, 8));
    ArgTys.push_back(IntegerType::get(Context, 8));
    break;
  case Intrinsic::x86_mmx_packsswb:		// llvm.x86.mmx.packsswb
  case Intrinsic::x86_mmx_packuswb:		// llvm.x86.mmx.packuswb
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
    break;
  case Intrinsic::x86_ssse3_pabs_b:		// llvm.x86.ssse3.pabs.b
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    break;
  case Intrinsic::arm_neon_vtbl1:		// llvm.arm.neon.vtbl1
  case Intrinsic::x86_mmx_padd_b:		// llvm.x86.mmx.padd.b
  case Intrinsic::x86_mmx_padds_b:		// llvm.x86.mmx.padds.b
  case Intrinsic::x86_mmx_paddus_b:		// llvm.x86.mmx.paddus.b
  case Intrinsic::x86_mmx_pavg_b:		// llvm.x86.mmx.pavg.b
  case Intrinsic::x86_mmx_pcmpeq_b:		// llvm.x86.mmx.pcmpeq.b
  case Intrinsic::x86_mmx_pcmpgt_b:		// llvm.x86.mmx.pcmpgt.b
  case Intrinsic::x86_mmx_pmaxu_b:		// llvm.x86.mmx.pmaxu.b
  case Intrinsic::x86_mmx_pminu_b:		// llvm.x86.mmx.pminu.b
  case Intrinsic::x86_mmx_psub_b:		// llvm.x86.mmx.psub.b
  case Intrinsic::x86_mmx_psubs_b:		// llvm.x86.mmx.psubs.b
  case Intrinsic::x86_mmx_psubus_b:		// llvm.x86.mmx.psubus.b
  case Intrinsic::x86_mmx_punpckhbw:		// llvm.x86.mmx.punpckhbw
  case Intrinsic::x86_mmx_punpcklbw:		// llvm.x86.mmx.punpcklbw
  case Intrinsic::x86_ssse3_pshuf_b:		// llvm.x86.ssse3.pshuf.b
  case Intrinsic::x86_ssse3_psign_b:		// llvm.x86.ssse3.psign.b
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    break;
  case Intrinsic::arm_neon_vtbl2:		// llvm.arm.neon.vtbl2
  case Intrinsic::arm_neon_vtbx1:		// llvm.arm.neon.vtbx1
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    break;
  case Intrinsic::arm_neon_vtbl3:		// llvm.arm.neon.vtbl3
  case Intrinsic::arm_neon_vtbx2:		// llvm.arm.neon.vtbx2
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    break;
  case Intrinsic::arm_neon_vtbl4:		// llvm.arm.neon.vtbl4
  case Intrinsic::arm_neon_vtbx3:		// llvm.arm.neon.vtbx3
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    break;
  case Intrinsic::arm_neon_vtbx4:		// llvm.arm.neon.vtbx4
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
    break;
  }
#endif

// Add parameter attributes that are not common to all intrinsics.
#ifdef GET_INTRINSIC_ATTRIBUTES
AttrListPtr Intrinsic::getAttributes(ID id) {  // No intrinsic can throw exceptions.
  Attributes Attr = Attribute::NoUnwind;
  switch (id) {
  default: break;
  case Intrinsic::alpha_umulh:
  case Intrinsic::arm_get_fpscr:
  case Intrinsic::arm_neon_vabds:
  case Intrinsic::arm_neon_vabdu:
  case Intrinsic::arm_neon_vabs:
  case Intrinsic::arm_neon_vacged:
  case Intrinsic::arm_neon_vacgeq:
  case Intrinsic::arm_neon_vacgtd:
  case Intrinsic::arm_neon_vacgtq:
  case Intrinsic::arm_neon_vaddhn:
  case Intrinsic::arm_neon_vcls:
  case Intrinsic::arm_neon_vclz:
  case Intrinsic::arm_neon_vcnt:
  case Intrinsic::arm_neon_vcvtfp2fxs:
  case Intrinsic::arm_neon_vcvtfp2fxu:
  case Intrinsic::arm_neon_vcvtfxs2fp:
  case Intrinsic::arm_neon_vcvtfxu2fp:
  case Intrinsic::arm_neon_vhadds:
  case Intrinsic::arm_neon_vhaddu:
  case Intrinsic::arm_neon_vhsubs:
  case Intrinsic::arm_neon_vhsubu:
  case Intrinsic::arm_neon_vmaxs:
  case Intrinsic::arm_neon_vmaxu:
  case Intrinsic::arm_neon_vmins:
  case Intrinsic::arm_neon_vminu:
  case Intrinsic::arm_neon_vmullp:
  case Intrinsic::arm_neon_vmulp:
  case Intrinsic::arm_neon_vpadals:
  case Intrinsic::arm_neon_vpadalu:
  case Intrinsic::arm_neon_vpadd:
  case Intrinsic::arm_neon_vpaddls:
  case Intrinsic::arm_neon_vpaddlu:
  case Intrinsic::arm_neon_vpmaxs:
  case Intrinsic::arm_neon_vpmaxu:
  case Intrinsic::arm_neon_vpmins:
  case Intrinsic::arm_neon_vpminu:
  case Intrinsic::arm_neon_vqabs:
  case Intrinsic::arm_neon_vqadds:
  case Intrinsic::arm_neon_vqaddu:
  case Intrinsic::arm_neon_vqdmlal:
  case Intrinsic::arm_neon_vqdmlsl:
  case Intrinsic::arm_neon_vqdmulh:
  case Intrinsic::arm_neon_vqdmull:
  case Intrinsic::arm_neon_vqmovns:
  case Intrinsic::arm_neon_vqmovnsu:
  case Intrinsic::arm_neon_vqmovnu:
  case Intrinsic::arm_neon_vqneg:
  case Intrinsic::arm_neon_vqrdmulh:
  case Intrinsic::arm_neon_vqrshiftns:
  case Intrinsic::arm_neon_vqrshiftnsu:
  case Intrinsic::arm_neon_vqrshiftnu:
  case Intrinsic::arm_neon_vqrshifts:
  case Intrinsic::arm_neon_vqrshiftu:
  case Intrinsic::arm_neon_vqshiftns:
  case Intrinsic::arm_neon_vqshiftnsu:
  case Intrinsic::arm_neon_vqshiftnu:
  case Intrinsic::arm_neon_vqshifts:
  case Intrinsic::arm_neon_vqshiftsu:
  case Intrinsic::arm_neon_vqshiftu:
  case Intrinsic::arm_neon_vqsubs:
  case Intrinsic::arm_neon_vqsubu:
  case Intrinsic::arm_neon_vraddhn:
  case Intrinsic::arm_neon_vrecpe:
  case Intrinsic::arm_neon_vrecps:
  case Intrinsic::arm_neon_vrhadds:
  case Intrinsic::arm_neon_vrhaddu:
  case Intrinsic::arm_neon_vrshiftn:
  case Intrinsic::arm_neon_vrshifts:
  case Intrinsic::arm_neon_vrshiftu:
  case Intrinsic::arm_neon_vrsqrte:
  case Intrinsic::arm_neon_vrsqrts:
  case Intrinsic::arm_neon_vrsubhn:
  case Intrinsic::arm_neon_vshiftins:
  case Intrinsic::arm_neon_vshiftls:
  case Intrinsic::arm_neon_vshiftlu:
  case Intrinsic::arm_neon_vshiftn:
  case Intrinsic::arm_neon_vshifts:
  case Intrinsic::arm_neon_vshiftu:
  case Intrinsic::arm_neon_vsubhn:
  case Intrinsic::arm_neon_vtbl1:
  case Intrinsic::arm_neon_vtbl2:
  case Intrinsic::arm_neon_vtbl3:
  case Intrinsic::arm_neon_vtbl4:
  case Intrinsic::arm_neon_vtbx1:
  case Intrinsic::arm_neon_vtbx2:
  case Intrinsic::arm_neon_vtbx3:
  case Intrinsic::arm_neon_vtbx4:
  case Intrinsic::arm_qadd:
  case Intrinsic::arm_qsub:
  case Intrinsic::arm_ssat:
  case Intrinsic::arm_thread_pointer:
  case Intrinsic::arm_usat:
  case Intrinsic::arm_vcvtr:
  case Intrinsic::arm_vcvtru:
  case Intrinsic::bswap:
  case Intrinsic::convert_from_fp16:
  case Intrinsic::convert_to_fp16:
  case Intrinsic::ctlz:
  case Intrinsic::ctpop:
  case Intrinsic::cttz:
  case Intrinsic::dbg_declare:
  case Intrinsic::dbg_value:
  case Intrinsic::eh_sjlj_callsite:
  case Intrinsic::eh_sjlj_lsda:
  case Intrinsic::frameaddress:
  case Intrinsic::ppc_altivec_lvsl:
  case Intrinsic::ppc_altivec_lvsr:
  case Intrinsic::ppc_altivec_vaddcuw:
  case Intrinsic::ppc_altivec_vaddsbs:
  case Intrinsic::ppc_altivec_vaddshs:
  case Intrinsic::ppc_altivec_vaddsws:
  case Intrinsic::ppc_altivec_vaddubs:
  case Intrinsic::ppc_altivec_vadduhs:
  case Intrinsic::ppc_altivec_vadduws:
  case Intrinsic::ppc_altivec_vavgsb:
  case Intrinsic::ppc_altivec_vavgsh:
  case Intrinsic::ppc_altivec_vavgsw:
  case Intrinsic::ppc_altivec_vavgub:
  case Intrinsic::ppc_altivec_vavguh:
  case Intrinsic::ppc_altivec_vavguw:
  case Intrinsic::ppc_altivec_vcfsx:
  case Intrinsic::ppc_altivec_vcfux:
  case Intrinsic::ppc_altivec_vcmpbfp:
  case Intrinsic::ppc_altivec_vcmpbfp_p:
  case Intrinsic::ppc_altivec_vcmpeqfp:
  case Intrinsic::ppc_altivec_vcmpeqfp_p:
  case Intrinsic::ppc_altivec_vcmpequb:
  case Intrinsic::ppc_altivec_vcmpequb_p:
  case Intrinsic::ppc_altivec_vcmpequh:
  case Intrinsic::ppc_altivec_vcmpequh_p:
  case Intrinsic::ppc_altivec_vcmpequw:
  case Intrinsic::ppc_altivec_vcmpequw_p:
  case Intrinsic::ppc_altivec_vcmpgefp:
  case Intrinsic::ppc_altivec_vcmpgefp_p:
  case Intrinsic::ppc_altivec_vcmpgtfp:
  case Intrinsic::ppc_altivec_vcmpgtfp_p:
  case Intrinsic::ppc_altivec_vcmpgtsb:
  case Intrinsic::ppc_altivec_vcmpgtsb_p:
  case Intrinsic::ppc_altivec_vcmpgtsh:
  case Intrinsic::ppc_altivec_vcmpgtsh_p:
  case Intrinsic::ppc_altivec_vcmpgtsw:
  case Intrinsic::ppc_altivec_vcmpgtsw_p:
  case Intrinsic::ppc_altivec_vcmpgtub:
  case Intrinsic::ppc_altivec_vcmpgtub_p:
  case Intrinsic::ppc_altivec_vcmpgtuh:
  case Intrinsic::ppc_altivec_vcmpgtuh_p:
  case Intrinsic::ppc_altivec_vcmpgtuw:
  case Intrinsic::ppc_altivec_vcmpgtuw_p:
  case Intrinsic::ppc_altivec_vctsxs:
  case Intrinsic::ppc_altivec_vctuxs:
  case Intrinsic::ppc_altivec_vexptefp:
  case Intrinsic::ppc_altivec_vlogefp:
  case Intrinsic::ppc_altivec_vmaddfp:
  case Intrinsic::ppc_altivec_vmaxfp:
  case Intrinsic::ppc_altivec_vmaxsb:
  case Intrinsic::ppc_altivec_vmaxsh:
  case Intrinsic::ppc_altivec_vmaxsw:
  case Intrinsic::ppc_altivec_vmaxub:
  case Intrinsic::ppc_altivec_vmaxuh:
  case Intrinsic::ppc_altivec_vmaxuw:
  case Intrinsic::ppc_altivec_vmhaddshs:
  case Intrinsic::ppc_altivec_vmhraddshs:
  case Intrinsic::ppc_altivec_vminfp:
  case Intrinsic::ppc_altivec_vminsb:
  case Intrinsic::ppc_altivec_vminsh:
  case Intrinsic::ppc_altivec_vminsw:
  case Intrinsic::ppc_altivec_vminub:
  case Intrinsic::ppc_altivec_vminuh:
  case Intrinsic::ppc_altivec_vminuw:
  case Intrinsic::ppc_altivec_vmladduhm:
  case Intrinsic::ppc_altivec_vmsummbm:
  case Intrinsic::ppc_altivec_vmsumshm:
  case Intrinsic::ppc_altivec_vmsumshs:
  case Intrinsic::ppc_altivec_vmsumubm:
  case Intrinsic::ppc_altivec_vmsumuhm:
  case Intrinsic::ppc_altivec_vmsumuhs:
  case Intrinsic::ppc_altivec_vmulesb:
  case Intrinsic::ppc_altivec_vmulesh:
  case Intrinsic::ppc_altivec_vmuleub:
  case Intrinsic::ppc_altivec_vmuleuh:
  case Intrinsic::ppc_altivec_vmulosb:
  case Intrinsic::ppc_altivec_vmulosh:
  case Intrinsic::ppc_altivec_vmuloub:
  case Intrinsic::ppc_altivec_vmulouh:
  case Intrinsic::ppc_altivec_vnmsubfp:
  case Intrinsic::ppc_altivec_vperm:
  case Intrinsic::ppc_altivec_vpkpx:
  case Intrinsic::ppc_altivec_vpkshss:
  case Intrinsic::ppc_altivec_vpkshus:
  case Intrinsic::ppc_altivec_vpkswss:
  case Intrinsic::ppc_altivec_vpkswus:
  case Intrinsic::ppc_altivec_vpkuhus:
  case Intrinsic::ppc_altivec_vpkuwus:
  case Intrinsic::ppc_altivec_vrefp:
  case Intrinsic::ppc_altivec_vrfim:
  case Intrinsic::ppc_altivec_vrfin:
  case Intrinsic::ppc_altivec_vrfip:
  case Intrinsic::ppc_altivec_vrfiz:
  case Intrinsic::ppc_altivec_vrlb:
  case Intrinsic::ppc_altivec_vrlh:
  case Intrinsic::ppc_altivec_vrlw:
  case Intrinsic::ppc_altivec_vrsqrtefp:
  case Intrinsic::ppc_altivec_vsel:
  case Intrinsic::ppc_altivec_vsl:
  case Intrinsic::ppc_altivec_vslb:
  case Intrinsic::ppc_altivec_vslh:
  case Intrinsic::ppc_altivec_vslo:
  case Intrinsic::ppc_altivec_vslw:
  case Intrinsic::ppc_altivec_vsr:
  case Intrinsic::ppc_altivec_vsrab:
  case Intrinsic::ppc_altivec_vsrah:
  case Intrinsic::ppc_altivec_vsraw:
  case Intrinsic::ppc_altivec_vsrb:
  case Intrinsic::ppc_altivec_vsrh:
  case Intrinsic::ppc_altivec_vsro:
  case Intrinsic::ppc_altivec_vsrw:
  case Intrinsic::ppc_altivec_vsubcuw:
  case Intrinsic::ppc_altivec_vsubsbs:
  case Intrinsic::ppc_altivec_vsubshs:
  case Intrinsic::ppc_altivec_vsubsws:
  case Intrinsic::ppc_altivec_vsububs:
  case Intrinsic::ppc_altivec_vsubuhs:
  case Intrinsic::ppc_altivec_vsubuws:
  case Intrinsic::ppc_altivec_vsum2sws:
  case Intrinsic::ppc_altivec_vsum4sbs:
  case Intrinsic::ppc_altivec_vsum4shs:
  case Intrinsic::ppc_altivec_vsum4ubs:
  case Intrinsic::ppc_altivec_vsumsws:
  case Intrinsic::ppc_altivec_vupkhpx:
  case Intrinsic::ppc_altivec_vupkhsb:
  case Intrinsic::ppc_altivec_vupkhsh:
  case Intrinsic::ppc_altivec_vupklpx:
  case Intrinsic::ppc_altivec_vupklsb:
  case Intrinsic::ppc_altivec_vupklsh:
  case Intrinsic::returnaddress:
  case Intrinsic::sadd_with_overflow:
  case Intrinsic::smul_with_overflow:
  case Intrinsic::spu_si_a:
  case Intrinsic::spu_si_addx:
  case Intrinsic::spu_si_ah:
  case Intrinsic::spu_si_ahi:
  case Intrinsic::spu_si_ai:
  case Intrinsic::spu_si_and:
  case Intrinsic::spu_si_andbi:
  case Intrinsic::spu_si_andc:
  case Intrinsic::spu_si_andhi:
  case Intrinsic::spu_si_andi:
  case Intrinsic::spu_si_bg:
  case Intrinsic::spu_si_bgx:
  case Intrinsic::spu_si_ceq:
  case Intrinsic::spu_si_ceqb:
  case Intrinsic::spu_si_ceqbi:
  case Intrinsic::spu_si_ceqh:
  case Intrinsic::spu_si_ceqhi:
  case Intrinsic::spu_si_ceqi:
  case Intrinsic::spu_si_cg:
  case Intrinsic::spu_si_cgt:
  case Intrinsic::spu_si_cgtb:
  case Intrinsic::spu_si_cgtbi:
  case Intrinsic::spu_si_cgth:
  case Intrinsic::spu_si_cgthi:
  case Intrinsic::spu_si_cgti:
  case Intrinsic::spu_si_cgx:
  case Intrinsic::spu_si_clgt:
  case Intrinsic::spu_si_clgtb:
  case Intrinsic::spu_si_clgtbi:
  case Intrinsic::spu_si_clgth:
  case Intrinsic::spu_si_clgthi:
  case Intrinsic::spu_si_clgti:
  case Intrinsic::spu_si_dfa:
  case Intrinsic::spu_si_dfm:
  case Intrinsic::spu_si_dfma:
  case Intrinsic::spu_si_dfms:
  case Intrinsic::spu_si_dfnma:
  case Intrinsic::spu_si_dfnms:
  case Intrinsic::spu_si_dfs:
  case Intrinsic::spu_si_fa:
  case Intrinsic::spu_si_fceq:
  case Intrinsic::spu_si_fcgt:
  case Intrinsic::spu_si_fcmeq:
  case Intrinsic::spu_si_fcmgt:
  case Intrinsic::spu_si_fm:
  case Intrinsic::spu_si_fma:
  case Intrinsic::spu_si_fms:
  case Intrinsic::spu_si_fnms:
  case Intrinsic::spu_si_fs:
  case Intrinsic::spu_si_fsmbi:
  case Intrinsic::spu_si_mpy:
  case Intrinsic::spu_si_mpya:
  case Intrinsic::spu_si_mpyh:
  case Intrinsic::spu_si_mpyhh:
  case Intrinsic::spu_si_mpyhha:
  case Intrinsic::spu_si_mpyhhau:
  case Intrinsic::spu_si_mpyhhu:
  case Intrinsic::spu_si_mpyi:
  case Intrinsic::spu_si_mpys:
  case Intrinsic::spu_si_mpyu:
  case Intrinsic::spu_si_mpyui:
  case Intrinsic::spu_si_nand:
  case Intrinsic::spu_si_nor:
  case Intrinsic::spu_si_or:
  case Intrinsic::spu_si_orbi:
  case Intrinsic::spu_si_orc:
  case Intrinsic::spu_si_orhi:
  case Intrinsic::spu_si_ori:
  case Intrinsic::spu_si_sf:
  case Intrinsic::spu_si_sfh:
  case Intrinsic::spu_si_sfhi:
  case Intrinsic::spu_si_sfi:
  case Intrinsic::spu_si_sfx:
  case Intrinsic::spu_si_shli:
  case Intrinsic::spu_si_shlqbi:
  case Intrinsic::spu_si_shlqbii:
  case Intrinsic::spu_si_shlqby:
  case Intrinsic::spu_si_shlqbyi:
  case Intrinsic::spu_si_xor:
  case Intrinsic::spu_si_xorbi:
  case Intrinsic::spu_si_xorhi:
  case Intrinsic::spu_si_xori:
  case Intrinsic::ssub_with_overflow:
  case Intrinsic::uadd_with_overflow:
  case Intrinsic::umul_with_overflow:
  case Intrinsic::usub_with_overflow:
  case Intrinsic::x86_aesni_aesdec:
  case Intrinsic::x86_aesni_aesdeclast:
  case Intrinsic::x86_aesni_aesenc:
  case Intrinsic::x86_aesni_aesenclast:
  case Intrinsic::x86_aesni_aesimc:
  case Intrinsic::x86_aesni_aeskeygenassist:
  case Intrinsic::x86_avx_addsub_pd_256:
  case Intrinsic::x86_avx_addsub_ps_256:
  case Intrinsic::x86_avx_blend_pd_256:
  case Intrinsic::x86_avx_blend_ps_256:
  case Intrinsic::x86_avx_blendv_pd_256:
  case Intrinsic::x86_avx_blendv_ps_256:
  case Intrinsic::x86_avx_cmp_pd_256:
  case Intrinsic::x86_avx_cmp_ps_256:
  case Intrinsic::x86_avx_cvt_pd2_ps_256:
  case Intrinsic::x86_avx_cvt_pd2dq_256:
  case Intrinsic::x86_avx_cvt_ps2_pd_256:
  case Intrinsic::x86_avx_cvt_ps2dq_256:
  case Intrinsic::x86_avx_cvtdq2_pd_256:
  case Intrinsic::x86_avx_cvtdq2_ps_256:
  case Intrinsic::x86_avx_cvtt_pd2dq_256:
  case Intrinsic::x86_avx_cvtt_ps2dq_256:
  case Intrinsic::x86_avx_dp_ps_256:
  case Intrinsic::x86_avx_hadd_pd_256:
  case Intrinsic::x86_avx_hadd_ps_256:
  case Intrinsic::x86_avx_hsub_pd_256:
  case Intrinsic::x86_avx_hsub_ps_256:
  case Intrinsic::x86_avx_max_pd_256:
  case Intrinsic::x86_avx_max_ps_256:
  case Intrinsic::x86_avx_min_pd_256:
  case Intrinsic::x86_avx_min_ps_256:
  case Intrinsic::x86_avx_movmsk_pd_256:
  case Intrinsic::x86_avx_movmsk_ps_256:
  case Intrinsic::x86_avx_ptestc_256:
  case Intrinsic::x86_avx_ptestnzc_256:
  case Intrinsic::x86_avx_ptestz_256:
  case Intrinsic::x86_avx_rcp_ps_256:
  case Intrinsic::x86_avx_round_pd_256:
  case Intrinsic::x86_avx_round_ps_256:
  case Intrinsic::x86_avx_rsqrt_ps_256:
  case Intrinsic::x86_avx_sqrt_pd_256:
  case Intrinsic::x86_avx_sqrt_ps_256:
  case Intrinsic::x86_avx_vextractf128_pd_256:
  case Intrinsic::x86_avx_vextractf128_ps_256:
  case Intrinsic::x86_avx_vextractf128_si_256:
  case Intrinsic::x86_avx_vinsertf128_pd_256:
  case Intrinsic::x86_avx_vinsertf128_ps_256:
  case Intrinsic::x86_avx_vinsertf128_si_256:
  case Intrinsic::x86_avx_vperm2f128_pd_256:
  case Intrinsic::x86_avx_vperm2f128_ps_256:
  case Intrinsic::x86_avx_vperm2f128_si_256:
  case Intrinsic::x86_avx_vpermil_pd:
  case Intrinsic::x86_avx_vpermil_pd_256:
  case Intrinsic::x86_avx_vpermil_ps:
  case Intrinsic::x86_avx_vpermil_ps_256:
  case Intrinsic::x86_avx_vpermilvar_pd:
  case Intrinsic::x86_avx_vpermilvar_pd_256:
  case Intrinsic::x86_avx_vpermilvar_ps:
  case Intrinsic::x86_avx_vpermilvar_ps_256:
  case Intrinsic::x86_avx_vtestc_pd:
  case Intrinsic::x86_avx_vtestc_pd_256:
  case Intrinsic::x86_avx_vtestc_ps:
  case Intrinsic::x86_avx_vtestc_ps_256:
  case Intrinsic::x86_avx_vtestnzc_pd:
  case Intrinsic::x86_avx_vtestnzc_pd_256:
  case Intrinsic::x86_avx_vtestnzc_ps:
  case Intrinsic::x86_avx_vtestnzc_ps_256:
  case Intrinsic::x86_avx_vtestz_pd:
  case Intrinsic::x86_avx_vtestz_pd_256:
  case Intrinsic::x86_avx_vtestz_ps:
  case Intrinsic::x86_avx_vtestz_ps_256:
  case Intrinsic::x86_mmx_cvtsi32_si64:
  case Intrinsic::x86_mmx_cvtsi64_si32:
  case Intrinsic::x86_mmx_packssdw:
  case Intrinsic::x86_mmx_packsswb:
  case Intrinsic::x86_mmx_packuswb:
  case Intrinsic::x86_mmx_padd_b:
  case Intrinsic::x86_mmx_padd_d:
  case Intrinsic::x86_mmx_padd_q:
  case Intrinsic::x86_mmx_padd_w:
  case Intrinsic::x86_mmx_padds_b:
  case Intrinsic::x86_mmx_padds_w:
  case Intrinsic::x86_mmx_paddus_b:
  case Intrinsic::x86_mmx_paddus_w:
  case Intrinsic::x86_mmx_pand:
  case Intrinsic::x86_mmx_pandn:
  case Intrinsic::x86_mmx_pavg_b:
  case Intrinsic::x86_mmx_pavg_w:
  case Intrinsic::x86_mmx_pcmpeq_b:
  case Intrinsic::x86_mmx_pcmpeq_d:
  case Intrinsic::x86_mmx_pcmpeq_w:
  case Intrinsic::x86_mmx_pcmpgt_b:
  case Intrinsic::x86_mmx_pcmpgt_d:
  case Intrinsic::x86_mmx_pcmpgt_w:
  case Intrinsic::x86_mmx_pextr_w:
  case Intrinsic::x86_mmx_pinsr_w:
  case Intrinsic::x86_mmx_pmadd_wd:
  case Intrinsic::x86_mmx_pmaxs_w:
  case Intrinsic::x86_mmx_pmaxu_b:
  case Intrinsic::x86_mmx_pmins_w:
  case Intrinsic::x86_mmx_pminu_b:
  case Intrinsic::x86_mmx_pmovmskb:
  case Intrinsic::x86_mmx_pmulh_w:
  case Intrinsic::x86_mmx_pmulhu_w:
  case Intrinsic::x86_mmx_pmull_w:
  case Intrinsic::x86_mmx_pmulu_dq:
  case Intrinsic::x86_mmx_por:
  case Intrinsic::x86_mmx_psad_bw:
  case Intrinsic::x86_mmx_psll_d:
  case Intrinsic::x86_mmx_psll_q:
  case Intrinsic::x86_mmx_psll_w:
  case Intrinsic::x86_mmx_pslli_d:
  case Intrinsic::x86_mmx_pslli_q:
  case Intrinsic::x86_mmx_pslli_w:
  case Intrinsic::x86_mmx_psra_d:
  case Intrinsic::x86_mmx_psra_w:
  case Intrinsic::x86_mmx_psrai_d:
  case Intrinsic::x86_mmx_psrai_w:
  case Intrinsic::x86_mmx_psrl_d:
  case Intrinsic::x86_mmx_psrl_q:
  case Intrinsic::x86_mmx_psrl_w:
  case Intrinsic::x86_mmx_psrli_d:
  case Intrinsic::x86_mmx_psrli_q:
  case Intrinsic::x86_mmx_psrli_w:
  case Intrinsic::x86_mmx_psub_b:
  case Intrinsic::x86_mmx_psub_d:
  case Intrinsic::x86_mmx_psub_q:
  case Intrinsic::x86_mmx_psub_w:
  case Intrinsic::x86_mmx_psubs_b:
  case Intrinsic::x86_mmx_psubs_w:
  case Intrinsic::x86_mmx_psubus_b:
  case Intrinsic::x86_mmx_psubus_w:
  case Intrinsic::x86_mmx_punpckhbw:
  case Intrinsic::x86_mmx_punpckhdq:
  case Intrinsic::x86_mmx_punpckhwd:
  case Intrinsic::x86_mmx_punpcklbw:
  case Intrinsic::x86_mmx_punpckldq:
  case Intrinsic::x86_mmx_punpcklwd:
  case Intrinsic::x86_mmx_pxor:
  case Intrinsic::x86_mmx_vec_ext_d:
  case Intrinsic::x86_mmx_vec_init_b:
  case Intrinsic::x86_mmx_vec_init_d:
  case Intrinsic::x86_mmx_vec_init_w:
  case Intrinsic::x86_sse2_add_sd:
  case Intrinsic::x86_sse2_cmp_pd:
  case Intrinsic::x86_sse2_cmp_sd:
  case Intrinsic::x86_sse2_comieq_sd:
  case Intrinsic::x86_sse2_comige_sd:
  case Intrinsic::x86_sse2_comigt_sd:
  case Intrinsic::x86_sse2_comile_sd:
  case Intrinsic::x86_sse2_comilt_sd:
  case Intrinsic::x86_sse2_comineq_sd:
  case Intrinsic::x86_sse2_cvtdq2pd:
  case Intrinsic::x86_sse2_cvtdq2ps:
  case Intrinsic::x86_sse2_cvtpd2dq:
  case Intrinsic::x86_sse2_cvtpd2ps:
  case Intrinsic::x86_sse2_cvtps2dq:
  case Intrinsic::x86_sse2_cvtps2pd:
  case Intrinsic::x86_sse2_cvtsd2si:
  case Intrinsic::x86_sse2_cvtsd2si64:
  case Intrinsic::x86_sse2_cvtsd2ss:
  case Intrinsic::x86_sse2_cvtsi2sd:
  case Intrinsic::x86_sse2_cvtsi642sd:
  case Intrinsic::x86_sse2_cvtss2sd:
  case Intrinsic::x86_sse2_cvttpd2dq:
  case Intrinsic::x86_sse2_cvttps2dq:
  case Intrinsic::x86_sse2_cvttsd2si:
  case Intrinsic::x86_sse2_cvttsd2si64:
  case Intrinsic::x86_sse2_div_sd:
  case Intrinsic::x86_sse2_max_pd:
  case Intrinsic::x86_sse2_max_sd:
  case Intrinsic::x86_sse2_min_pd:
  case Intrinsic::x86_sse2_min_sd:
  case Intrinsic::x86_sse2_movmsk_pd:
  case Intrinsic::x86_sse2_mul_sd:
  case Intrinsic::x86_sse2_packssdw_128:
  case Intrinsic::x86_sse2_packsswb_128:
  case Intrinsic::x86_sse2_packuswb_128:
  case Intrinsic::x86_sse2_padds_b:
  case Intrinsic::x86_sse2_padds_w:
  case Intrinsic::x86_sse2_paddus_b:
  case Intrinsic::x86_sse2_paddus_w:
  case Intrinsic::x86_sse2_pavg_b:
  case Intrinsic::x86_sse2_pavg_w:
  case Intrinsic::x86_sse2_pcmpeq_b:
  case Intrinsic::x86_sse2_pcmpeq_d:
  case Intrinsic::x86_sse2_pcmpeq_w:
  case Intrinsic::x86_sse2_pcmpgt_b:
  case Intrinsic::x86_sse2_pcmpgt_d:
  case Intrinsic::x86_sse2_pcmpgt_w:
  case Intrinsic::x86_sse2_pmadd_wd:
  case Intrinsic::x86_sse2_pmaxs_w:
  case Intrinsic::x86_sse2_pmaxu_b:
  case Intrinsic::x86_sse2_pmins_w:
  case Intrinsic::x86_sse2_pminu_b:
  case Intrinsic::x86_sse2_pmovmskb_128:
  case Intrinsic::x86_sse2_pmulh_w:
  case Intrinsic::x86_sse2_pmulhu_w:
  case Intrinsic::x86_sse2_pmulu_dq:
  case Intrinsic::x86_sse2_psad_bw:
  case Intrinsic::x86_sse2_psll_d:
  case Intrinsic::x86_sse2_psll_dq:
  case Intrinsic::x86_sse2_psll_dq_bs:
  case Intrinsic::x86_sse2_psll_q:
  case Intrinsic::x86_sse2_psll_w:
  case Intrinsic::x86_sse2_pslli_d:
  case Intrinsic::x86_sse2_pslli_q:
  case Intrinsic::x86_sse2_pslli_w:
  case Intrinsic::x86_sse2_psra_d:
  case Intrinsic::x86_sse2_psra_w:
  case Intrinsic::x86_sse2_psrai_d:
  case Intrinsic::x86_sse2_psrai_w:
  case Intrinsic::x86_sse2_psrl_d:
  case Intrinsic::x86_sse2_psrl_dq:
  case Intrinsic::x86_sse2_psrl_dq_bs:
  case Intrinsic::x86_sse2_psrl_q:
  case Intrinsic::x86_sse2_psrl_w:
  case Intrinsic::x86_sse2_psrli_d:
  case Intrinsic::x86_sse2_psrli_q:
  case Intrinsic::x86_sse2_psrli_w:
  case Intrinsic::x86_sse2_psubs_b:
  case Intrinsic::x86_sse2_psubs_w:
  case Intrinsic::x86_sse2_psubus_b:
  case Intrinsic::x86_sse2_psubus_w:
  case Intrinsic::x86_sse2_sqrt_pd:
  case Intrinsic::x86_sse2_sqrt_sd:
  case Intrinsic::x86_sse2_sub_sd:
  case Intrinsic::x86_sse2_ucomieq_sd:
  case Intrinsic::x86_sse2_ucomige_sd:
  case Intrinsic::x86_sse2_ucomigt_sd:
  case Intrinsic::x86_sse2_ucomile_sd:
  case Intrinsic::x86_sse2_ucomilt_sd:
  case Intrinsic::x86_sse2_ucomineq_sd:
  case Intrinsic::x86_sse3_addsub_pd:
  case Intrinsic::x86_sse3_addsub_ps:
  case Intrinsic::x86_sse3_hadd_pd:
  case Intrinsic::x86_sse3_hadd_ps:
  case Intrinsic::x86_sse3_hsub_pd:
  case Intrinsic::x86_sse3_hsub_ps:
  case Intrinsic::x86_sse41_blendpd:
  case Intrinsic::x86_sse41_blendps:
  case Intrinsic::x86_sse41_blendvpd:
  case Intrinsic::x86_sse41_blendvps:
  case Intrinsic::x86_sse41_dppd:
  case Intrinsic::x86_sse41_dpps:
  case Intrinsic::x86_sse41_extractps:
  case Intrinsic::x86_sse41_insertps:
  case Intrinsic::x86_sse41_mpsadbw:
  case Intrinsic::x86_sse41_packusdw:
  case Intrinsic::x86_sse41_pblendvb:
  case Intrinsic::x86_sse41_pblendw:
  case Intrinsic::x86_sse41_pcmpeqq:
  case Intrinsic::x86_sse41_pextrb:
  case Intrinsic::x86_sse41_pextrd:
  case Intrinsic::x86_sse41_pextrq:
  case Intrinsic::x86_sse41_phminposuw:
  case Intrinsic::x86_sse41_pmaxsb:
  case Intrinsic::x86_sse41_pmaxsd:
  case Intrinsic::x86_sse41_pmaxud:
  case Intrinsic::x86_sse41_pmaxuw:
  case Intrinsic::x86_sse41_pminsb:
  case Intrinsic::x86_sse41_pminsd:
  case Intrinsic::x86_sse41_pminud:
  case Intrinsic::x86_sse41_pminuw:
  case Intrinsic::x86_sse41_pmovsxbd:
  case Intrinsic::x86_sse41_pmovsxbq:
  case Intrinsic::x86_sse41_pmovsxbw:
  case Intrinsic::x86_sse41_pmovsxdq:
  case Intrinsic::x86_sse41_pmovsxwd:
  case Intrinsic::x86_sse41_pmovsxwq:
  case Intrinsic::x86_sse41_pmovzxbd:
  case Intrinsic::x86_sse41_pmovzxbq:
  case Intrinsic::x86_sse41_pmovzxbw:
  case Intrinsic::x86_sse41_pmovzxdq:
  case Intrinsic::x86_sse41_pmovzxwd:
  case Intrinsic::x86_sse41_pmovzxwq:
  case Intrinsic::x86_sse41_pmuldq:
  case Intrinsic::x86_sse41_ptestc:
  case Intrinsic::x86_sse41_ptestnzc:
  case Intrinsic::x86_sse41_ptestz:
  case Intrinsic::x86_sse41_round_pd:
  case Intrinsic::x86_sse41_round_ps:
  case Intrinsic::x86_sse41_round_sd:
  case Intrinsic::x86_sse41_round_ss:
  case Intrinsic::x86_sse42_crc32_16:
  case Intrinsic::x86_sse42_crc32_32:
  case Intrinsic::x86_sse42_crc32_8:
  case Intrinsic::x86_sse42_crc64_64:
  case Intrinsic::x86_sse42_crc64_8:
  case Intrinsic::x86_sse42_pcmpestri128:
  case Intrinsic::x86_sse42_pcmpestria128:
  case Intrinsic::x86_sse42_pcmpestric128:
  case Intrinsic::x86_sse42_pcmpestrio128:
  case Intrinsic::x86_sse42_pcmpestris128:
  case Intrinsic::x86_sse42_pcmpestriz128:
  case Intrinsic::x86_sse42_pcmpestrm128:
  case Intrinsic::x86_sse42_pcmpgtq:
  case Intrinsic::x86_sse42_pcmpistri128:
  case Intrinsic::x86_sse42_pcmpistria128:
  case Intrinsic::x86_sse42_pcmpistric128:
  case Intrinsic::x86_sse42_pcmpistrio128:
  case Intrinsic::x86_sse42_pcmpistris128:
  case Intrinsic::x86_sse42_pcmpistriz128:
  case Intrinsic::x86_sse42_pcmpistrm128:
  case Intrinsic::x86_sse_add_ss:
  case Intrinsic::x86_sse_cmp_ps:
  case Intrinsic::x86_sse_cmp_ss:
  case Intrinsic::x86_sse_comieq_ss:
  case Intrinsic::x86_sse_comige_ss:
  case Intrinsic::x86_sse_comigt_ss:
  case Intrinsic::x86_sse_comile_ss:
  case Intrinsic::x86_sse_comilt_ss:
  case Intrinsic::x86_sse_comineq_ss:
  case Intrinsic::x86_sse_cvtpd2pi:
  case Intrinsic::x86_sse_cvtpi2pd:
  case Intrinsic::x86_sse_cvtpi2ps:
  case Intrinsic::x86_sse_cvtps2pi:
  case Intrinsic::x86_sse_cvtsi2ss:
  case Intrinsic::x86_sse_cvtsi642ss:
  case Intrinsic::x86_sse_cvtss2si:
  case Intrinsic::x86_sse_cvtss2si64:
  case Intrinsic::x86_sse_cvttpd2pi:
  case Intrinsic::x86_sse_cvttps2pi:
  case Intrinsic::x86_sse_cvttss2si:
  case Intrinsic::x86_sse_cvttss2si64:
  case Intrinsic::x86_sse_div_ss:
  case Intrinsic::x86_sse_max_ps:
  case Intrinsic::x86_sse_max_ss:
  case Intrinsic::x86_sse_min_ps:
  case Intrinsic::x86_sse_min_ss:
  case Intrinsic::x86_sse_movmsk_ps:
  case Intrinsic::x86_sse_mul_ss:
  case Intrinsic::x86_sse_rcp_ps:
  case Intrinsic::x86_sse_rcp_ss:
  case Intrinsic::x86_sse_rsqrt_ps:
  case Intrinsic::x86_sse_rsqrt_ss:
  case Intrinsic::x86_sse_sqrt_ps:
  case Intrinsic::x86_sse_sqrt_ss:
  case Intrinsic::x86_sse_sub_ss:
  case Intrinsic::x86_sse_ucomieq_ss:
  case Intrinsic::x86_sse_ucomige_ss:
  case Intrinsic::x86_sse_ucomigt_ss:
  case Intrinsic::x86_sse_ucomile_ss:
  case Intrinsic::x86_sse_ucomilt_ss:
  case Intrinsic::x86_sse_ucomineq_ss:
  case Intrinsic::x86_ssse3_pabs_b:
  case Intrinsic::x86_ssse3_pabs_b_128:
  case Intrinsic::x86_ssse3_pabs_d:
  case Intrinsic::x86_ssse3_pabs_d_128:
  case Intrinsic::x86_ssse3_pabs_w:
  case Intrinsic::x86_ssse3_pabs_w_128:
  case Intrinsic::x86_ssse3_phadd_d:
  case Intrinsic::x86_ssse3_phadd_d_128:
  case Intrinsic::x86_ssse3_phadd_sw:
  case Intrinsic::x86_ssse3_phadd_sw_128:
  case Intrinsic::x86_ssse3_phadd_w:
  case Intrinsic::x86_ssse3_phadd_w_128:
  case Intrinsic::x86_ssse3_phsub_d:
  case Intrinsic::x86_ssse3_phsub_d_128:
  case Intrinsic::x86_ssse3_phsub_sw:
  case Intrinsic::x86_ssse3_phsub_sw_128:
  case Intrinsic::x86_ssse3_phsub_w:
  case Intrinsic::x86_ssse3_phsub_w_128:
  case Intrinsic::x86_ssse3_pmadd_ub_sw:
  case Intrinsic::x86_ssse3_pmadd_ub_sw_128:
  case Intrinsic::x86_ssse3_pmul_hr_sw:
  case Intrinsic::x86_ssse3_pmul_hr_sw_128:
  case Intrinsic::x86_ssse3_pshuf_b:
  case Intrinsic::x86_ssse3_pshuf_b_128:
  case Intrinsic::x86_ssse3_pshuf_w:
  case Intrinsic::x86_ssse3_psign_b:
  case Intrinsic::x86_ssse3_psign_b_128:
  case Intrinsic::x86_ssse3_psign_d:
  case Intrinsic::x86_ssse3_psign_d_128:
  case Intrinsic::x86_ssse3_psign_w:
  case Intrinsic::x86_ssse3_psign_w_128:
  case Intrinsic::xcore_bitrev:
  case Intrinsic::xcore_getid:
    Attr |= Attribute::ReadNone; // These do not access memory.
    break;
  case Intrinsic::arm_neon_vld1:
  case Intrinsic::arm_neon_vld2:
  case Intrinsic::arm_neon_vld2lane:
  case Intrinsic::arm_neon_vld3:
  case Intrinsic::arm_neon_vld3lane:
  case Intrinsic::arm_neon_vld4:
  case Intrinsic::arm_neon_vld4lane:
  case Intrinsic::cos:
  case Intrinsic::eh_exception:
  case Intrinsic::exp:
  case Intrinsic::exp2:
  case Intrinsic::gcread:
  case Intrinsic::invariant_start:
  case Intrinsic::log:
  case Intrinsic::log10:
  case Intrinsic::log2:
  case Intrinsic::objectsize:
  case Intrinsic::pow:
  case Intrinsic::powi:
  case Intrinsic::ppc_altivec_lvebx:
  case Intrinsic::ppc_altivec_lvehx:
  case Intrinsic::ppc_altivec_lvewx:
  case Intrinsic::ppc_altivec_lvx:
  case Intrinsic::ppc_altivec_lvxl:
  case Intrinsic::ppc_altivec_mfvscr:
  case Intrinsic::sin:
  case Intrinsic::sqrt:
  case Intrinsic::x86_avx_ldu_dq_256:
  case Intrinsic::x86_avx_loadu_dq_256:
  case Intrinsic::x86_avx_loadu_pd_256:
  case Intrinsic::x86_avx_loadu_ps_256:
  case Intrinsic::x86_avx_maskload_pd:
  case Intrinsic::x86_avx_maskload_pd_256:
  case Intrinsic::x86_avx_maskload_ps:
  case Intrinsic::x86_avx_maskload_ps_256:
  case Intrinsic::x86_avx_vbroadcast_sd_256:
  case Intrinsic::x86_avx_vbroadcastf128_pd_256:
  case Intrinsic::x86_avx_vbroadcastf128_ps_256:
  case Intrinsic::x86_avx_vbroadcastss:
  case Intrinsic::x86_avx_vbroadcastss_256:
  case Intrinsic::x86_sse2_loadu_dq:
  case Intrinsic::x86_sse2_loadu_pd:
  case Intrinsic::x86_sse3_ldu_dq:
  case Intrinsic::x86_sse41_movntdqa:
  case Intrinsic::x86_sse_loadu_ps:
    Attr |= Attribute::ReadOnly; // These do not write memory.
    break;
  }
  AttributeWithIndex AWI[3];
  unsigned NumAttrs = 0;
  switch (id) {
  default: break;
  case Intrinsic::atomic_cmp_swap:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::atomic_load_add:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::atomic_load_and:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::atomic_load_max:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::atomic_load_min:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::atomic_load_nand:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::atomic_load_or:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::atomic_load_sub:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::atomic_load_umax:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::atomic_load_umin:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::atomic_load_xor:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::atomic_swap:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::gcwrite:
    AWI[0] = AttributeWithIndex::get(2, 0|Attribute::NoCapture);
    AWI[1] = AttributeWithIndex::get(3, 0|Attribute::NoCapture);
    NumAttrs = 2;
    break;
  case Intrinsic::invariant_end:
    AWI[0] = AttributeWithIndex::get(3, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::invariant_start:
    AWI[0] = AttributeWithIndex::get(2, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::lifetime_end:
    AWI[0] = AttributeWithIndex::get(2, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::lifetime_start:
    AWI[0] = AttributeWithIndex::get(2, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::memcpy:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    AWI[1] = AttributeWithIndex::get(2, 0|Attribute::NoCapture);
    NumAttrs = 2;
    break;
  case Intrinsic::memmove:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    AWI[1] = AttributeWithIndex::get(2, 0|Attribute::NoCapture);
    NumAttrs = 2;
    break;
  case Intrinsic::memset:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  case Intrinsic::prefetch:
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
    NumAttrs = 1;
    break;
  }
  AWI[NumAttrs] = AttributeWithIndex::get(~0, Attr);
  return AttrListPtr::get(AWI, NumAttrs+1);
}
#endif // GET_INTRINSIC_ATTRIBUTES

// Determine intrinsic alias analysis mod/ref behavior.
#ifdef GET_INTRINSIC_MODREF_BEHAVIOR
switch (iid) {
default:
    return UnknownModRefBehavior;
case Intrinsic::alpha_umulh:
  return DoesNotAccessMemory;
case Intrinsic::arm_get_fpscr:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vabds:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vabdu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vabs:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vacged:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vacgeq:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vacgtd:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vacgtq:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vaddhn:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vcls:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vclz:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vcnt:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vcvtfp2fxs:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vcvtfp2fxu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vcvtfxs2fp:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vcvtfxu2fp:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vhadds:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vhaddu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vhsubs:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vhsubu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vld1:
  return OnlyReadsMemory;
case Intrinsic::arm_neon_vld2:
  return OnlyReadsMemory;
case Intrinsic::arm_neon_vld2lane:
  return OnlyReadsMemory;
case Intrinsic::arm_neon_vld3:
  return OnlyReadsMemory;
case Intrinsic::arm_neon_vld3lane:
  return OnlyReadsMemory;
case Intrinsic::arm_neon_vld4:
  return OnlyReadsMemory;
case Intrinsic::arm_neon_vld4lane:
  return OnlyReadsMemory;
case Intrinsic::arm_neon_vmaxs:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vmaxu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vmins:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vminu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vmullp:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vmulp:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vpadals:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vpadalu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vpadd:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vpaddls:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vpaddlu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vpmaxs:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vpmaxu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vpmins:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vpminu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqabs:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqadds:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqaddu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqdmlal:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqdmlsl:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqdmulh:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqdmull:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqmovns:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqmovnsu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqmovnu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqneg:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqrdmulh:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqrshiftns:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqrshiftnsu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqrshiftnu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqrshifts:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqrshiftu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqshiftns:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqshiftnsu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqshiftnu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqshifts:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqshiftsu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqshiftu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqsubs:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vqsubu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vraddhn:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vrecpe:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vrecps:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vrhadds:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vrhaddu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vrshiftn:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vrshifts:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vrshiftu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vrsqrte:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vrsqrts:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vrsubhn:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vshiftins:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vshiftls:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vshiftlu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vshiftn:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vshifts:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vshiftu:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vst1:
  return AccessesArguments;
case Intrinsic::arm_neon_vst2:
  return AccessesArguments;
case Intrinsic::arm_neon_vst2lane:
  return AccessesArguments;
case Intrinsic::arm_neon_vst3:
  return AccessesArguments;
case Intrinsic::arm_neon_vst3lane:
  return AccessesArguments;
case Intrinsic::arm_neon_vst4:
  return AccessesArguments;
case Intrinsic::arm_neon_vst4lane:
  return AccessesArguments;
case Intrinsic::arm_neon_vsubhn:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vtbl1:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vtbl2:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vtbl3:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vtbl4:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vtbx1:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vtbx2:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vtbx3:
  return DoesNotAccessMemory;
case Intrinsic::arm_neon_vtbx4:
  return DoesNotAccessMemory;
case Intrinsic::arm_qadd:
  return DoesNotAccessMemory;
case Intrinsic::arm_qsub:
  return DoesNotAccessMemory;
case Intrinsic::arm_ssat:
  return DoesNotAccessMemory;
case Intrinsic::arm_thread_pointer:
  return DoesNotAccessMemory;
case Intrinsic::arm_usat:
  return DoesNotAccessMemory;
case Intrinsic::arm_vcvtr:
  return DoesNotAccessMemory;
case Intrinsic::arm_vcvtru:
  return DoesNotAccessMemory;
case Intrinsic::atomic_cmp_swap:
  return AccessesArguments;
case Intrinsic::atomic_load_add:
  return AccessesArguments;
case Intrinsic::atomic_load_and:
  return AccessesArguments;
case Intrinsic::atomic_load_max:
  return AccessesArguments;
case Intrinsic::atomic_load_min:
  return AccessesArguments;
case Intrinsic::atomic_load_nand:
  return AccessesArguments;
case Intrinsic::atomic_load_or:
  return AccessesArguments;
case Intrinsic::atomic_load_sub:
  return AccessesArguments;
case Intrinsic::atomic_load_umax:
  return AccessesArguments;
case Intrinsic::atomic_load_umin:
  return AccessesArguments;
case Intrinsic::atomic_load_xor:
  return AccessesArguments;
case Intrinsic::atomic_swap:
  return AccessesArguments;
case Intrinsic::bswap:
  return DoesNotAccessMemory;
case Intrinsic::convert_from_fp16:
  return DoesNotAccessMemory;
case Intrinsic::convert_to_fp16:
  return DoesNotAccessMemory;
case Intrinsic::cos:
  return OnlyReadsMemory;
case Intrinsic::ctlz:
  return DoesNotAccessMemory;
case Intrinsic::ctpop:
  return DoesNotAccessMemory;
case Intrinsic::cttz:
  return DoesNotAccessMemory;
case Intrinsic::dbg_declare:
  return DoesNotAccessMemory;
case Intrinsic::dbg_value:
  return DoesNotAccessMemory;
case Intrinsic::eh_exception:
  return OnlyReadsMemory;
case Intrinsic::eh_sjlj_callsite:
  return DoesNotAccessMemory;
case Intrinsic::eh_sjlj_lsda:
  return DoesNotAccessMemory;
case Intrinsic::exp:
  return OnlyReadsMemory;
case Intrinsic::exp2:
  return OnlyReadsMemory;
case Intrinsic::frameaddress:
  return DoesNotAccessMemory;
case Intrinsic::gcread:
  return OnlyReadsMemory;
case Intrinsic::gcwrite:
  return AccessesArguments;
case Intrinsic::init_trampoline:
  return AccessesArguments;
case Intrinsic::invariant_end:
  return AccessesArguments;
case Intrinsic::invariant_start:
  return OnlyReadsMemory;
case Intrinsic::lifetime_end:
  return AccessesArguments;
case Intrinsic::lifetime_start:
  return AccessesArguments;
case Intrinsic::log:
  return OnlyReadsMemory;
case Intrinsic::log10:
  return OnlyReadsMemory;
case Intrinsic::log2:
  return OnlyReadsMemory;
case Intrinsic::memcpy:
  return AccessesArguments;
case Intrinsic::memmove:
  return AccessesArguments;
case Intrinsic::memset:
  return AccessesArguments;
case Intrinsic::objectsize:
  return OnlyReadsMemory;
case Intrinsic::pow:
  return OnlyReadsMemory;
case Intrinsic::powi:
  return OnlyReadsMemory;
case Intrinsic::ppc_altivec_lvebx:
  return OnlyReadsMemory;
case Intrinsic::ppc_altivec_lvehx:
  return OnlyReadsMemory;
case Intrinsic::ppc_altivec_lvewx:
  return OnlyReadsMemory;
case Intrinsic::ppc_altivec_lvsl:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_lvsr:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_lvx:
  return OnlyReadsMemory;
case Intrinsic::ppc_altivec_lvxl:
  return OnlyReadsMemory;
case Intrinsic::ppc_altivec_mfvscr:
  return OnlyReadsMemory;
case Intrinsic::ppc_altivec_vaddcuw:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vaddsbs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vaddshs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vaddsws:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vaddubs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vadduhs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vadduws:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vavgsb:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vavgsh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vavgsw:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vavgub:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vavguh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vavguw:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcfsx:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcfux:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpbfp:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpbfp_p:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpeqfp:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpeqfp_p:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpequb:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpequb_p:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpequh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpequh_p:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpequw:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpequw_p:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgefp:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgefp_p:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgtfp:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgtfp_p:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgtsb:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgtsb_p:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgtsh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgtsh_p:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgtsw:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgtsw_p:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgtub:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgtub_p:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgtuh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgtuh_p:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgtuw:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vcmpgtuw_p:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vctsxs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vctuxs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vexptefp:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vlogefp:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmaddfp:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmaxfp:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmaxsb:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmaxsh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmaxsw:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmaxub:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmaxuh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmaxuw:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmhaddshs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmhraddshs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vminfp:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vminsb:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vminsh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vminsw:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vminub:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vminuh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vminuw:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmladduhm:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmsummbm:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmsumshm:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmsumshs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmsumubm:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmsumuhm:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmsumuhs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmulesb:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmulesh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmuleub:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmuleuh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmulosb:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmulosh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmuloub:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vmulouh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vnmsubfp:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vperm:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vpkpx:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vpkshss:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vpkshus:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vpkswss:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vpkswus:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vpkuhus:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vpkuwus:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vrefp:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vrfim:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vrfin:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vrfip:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vrfiz:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vrlb:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vrlh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vrlw:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vrsqrtefp:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsel:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsl:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vslb:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vslh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vslo:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vslw:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsr:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsrab:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsrah:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsraw:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsrb:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsrh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsro:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsrw:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsubcuw:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsubsbs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsubshs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsubsws:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsububs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsubuhs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsubuws:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsum2sws:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsum4sbs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsum4shs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsum4ubs:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vsumsws:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vupkhpx:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vupkhsb:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vupkhsh:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vupklpx:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vupklsb:
  return DoesNotAccessMemory;
case Intrinsic::ppc_altivec_vupklsh:
  return DoesNotAccessMemory;
case Intrinsic::prefetch:
  return AccessesArguments;
case Intrinsic::returnaddress:
  return DoesNotAccessMemory;
case Intrinsic::sadd_with_overflow:
  return DoesNotAccessMemory;
case Intrinsic::sin:
  return OnlyReadsMemory;
case Intrinsic::smul_with_overflow:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_a:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_addx:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_ah:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_ahi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_ai:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_and:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_andbi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_andc:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_andhi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_andi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_bg:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_bgx:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_ceq:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_ceqb:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_ceqbi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_ceqh:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_ceqhi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_ceqi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_cg:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_cgt:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_cgtb:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_cgtbi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_cgth:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_cgthi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_cgti:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_cgx:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_clgt:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_clgtb:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_clgtbi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_clgth:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_clgthi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_clgti:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_dfa:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_dfm:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_dfma:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_dfms:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_dfnma:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_dfnms:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_dfs:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_fa:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_fceq:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_fcgt:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_fcmeq:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_fcmgt:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_fm:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_fma:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_fms:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_fnms:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_fs:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_fsmbi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_mpy:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_mpya:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_mpyh:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_mpyhh:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_mpyhha:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_mpyhhau:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_mpyhhu:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_mpyi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_mpys:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_mpyu:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_mpyui:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_nand:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_nor:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_or:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_orbi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_orc:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_orhi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_ori:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_sf:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_sfh:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_sfhi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_sfi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_sfx:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_shli:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_shlqbi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_shlqbii:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_shlqby:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_shlqbyi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_xor:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_xorbi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_xorhi:
  return DoesNotAccessMemory;
case Intrinsic::spu_si_xori:
  return DoesNotAccessMemory;
case Intrinsic::sqrt:
  return OnlyReadsMemory;
case Intrinsic::ssub_with_overflow:
  return DoesNotAccessMemory;
case Intrinsic::uadd_with_overflow:
  return DoesNotAccessMemory;
case Intrinsic::umul_with_overflow:
  return DoesNotAccessMemory;
case Intrinsic::usub_with_overflow:
  return DoesNotAccessMemory;
case Intrinsic::x86_aesni_aesdec:
  return DoesNotAccessMemory;
case Intrinsic::x86_aesni_aesdeclast:
  return DoesNotAccessMemory;
case Intrinsic::x86_aesni_aesenc:
  return DoesNotAccessMemory;
case Intrinsic::x86_aesni_aesenclast:
  return DoesNotAccessMemory;
case Intrinsic::x86_aesni_aesimc:
  return DoesNotAccessMemory;
case Intrinsic::x86_aesni_aeskeygenassist:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_addsub_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_addsub_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_blend_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_blend_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_blendv_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_blendv_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_cmp_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_cmp_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_cvt_pd2_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_cvt_pd2dq_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_cvt_ps2_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_cvt_ps2dq_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_cvtdq2_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_cvtdq2_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_cvtt_pd2dq_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_cvtt_ps2dq_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_dp_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_hadd_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_hadd_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_hsub_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_hsub_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_ldu_dq_256:
  return OnlyReadsMemory;
case Intrinsic::x86_avx_loadu_dq_256:
  return OnlyReadsMemory;
case Intrinsic::x86_avx_loadu_pd_256:
  return OnlyReadsMemory;
case Intrinsic::x86_avx_loadu_ps_256:
  return OnlyReadsMemory;
case Intrinsic::x86_avx_maskload_pd:
  return OnlyReadsMemory;
case Intrinsic::x86_avx_maskload_pd_256:
  return OnlyReadsMemory;
case Intrinsic::x86_avx_maskload_ps:
  return OnlyReadsMemory;
case Intrinsic::x86_avx_maskload_ps_256:
  return OnlyReadsMemory;
case Intrinsic::x86_avx_max_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_max_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_min_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_min_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_movmsk_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_movmsk_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_ptestc_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_ptestnzc_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_ptestz_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_rcp_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_round_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_round_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_rsqrt_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_sqrt_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_sqrt_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vbroadcast_sd_256:
  return OnlyReadsMemory;
case Intrinsic::x86_avx_vbroadcastf128_pd_256:
  return OnlyReadsMemory;
case Intrinsic::x86_avx_vbroadcastf128_ps_256:
  return OnlyReadsMemory;
case Intrinsic::x86_avx_vbroadcastss:
  return OnlyReadsMemory;
case Intrinsic::x86_avx_vbroadcastss_256:
  return OnlyReadsMemory;
case Intrinsic::x86_avx_vextractf128_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vextractf128_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vextractf128_si_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vinsertf128_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vinsertf128_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vinsertf128_si_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vperm2f128_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vperm2f128_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vperm2f128_si_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vpermil_pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vpermil_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vpermil_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vpermil_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vpermilvar_pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vpermilvar_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vpermilvar_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vpermilvar_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vtestc_pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vtestc_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vtestc_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vtestc_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vtestnzc_pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vtestnzc_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vtestnzc_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vtestnzc_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vtestz_pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vtestz_pd_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vtestz_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_avx_vtestz_ps_256:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_cvtsi32_si64:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_cvtsi64_si32:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_packssdw:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_packsswb:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_packuswb:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_padd_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_padd_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_padd_q:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_padd_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_padds_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_padds_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_paddus_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_paddus_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pand:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pandn:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pavg_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pavg_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pcmpeq_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pcmpeq_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pcmpeq_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pcmpgt_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pcmpgt_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pcmpgt_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pextr_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pinsr_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pmadd_wd:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pmaxs_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pmaxu_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pmins_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pminu_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pmovmskb:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pmulh_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pmulhu_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pmull_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pmulu_dq:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_por:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psad_bw:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psll_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psll_q:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psll_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pslli_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pslli_q:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pslli_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psra_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psra_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psrai_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psrai_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psrl_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psrl_q:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psrl_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psrli_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psrli_q:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psrli_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psub_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psub_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psub_q:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psub_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psubs_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psubs_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psubus_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_psubus_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_punpckhbw:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_punpckhdq:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_punpckhwd:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_punpcklbw:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_punpckldq:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_punpcklwd:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_pxor:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_vec_ext_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_vec_init_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_vec_init_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_mmx_vec_init_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_add_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cmp_pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cmp_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_comieq_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_comige_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_comigt_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_comile_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_comilt_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_comineq_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvtdq2pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvtdq2ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvtpd2dq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvtpd2ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvtps2dq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvtps2pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvtsd2si:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvtsd2si64:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvtsd2ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvtsi2sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvtsi642sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvtss2sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvttpd2dq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvttps2dq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvttsd2si:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_cvttsd2si64:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_div_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_loadu_dq:
  return OnlyReadsMemory;
case Intrinsic::x86_sse2_loadu_pd:
  return OnlyReadsMemory;
case Intrinsic::x86_sse2_max_pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_max_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_min_pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_min_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_movmsk_pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_mul_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_packssdw_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_packsswb_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_packuswb_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_padds_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_padds_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_paddus_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_paddus_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pavg_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pavg_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pcmpeq_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pcmpeq_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pcmpeq_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pcmpgt_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pcmpgt_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pcmpgt_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pmadd_wd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pmaxs_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pmaxu_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pmins_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pminu_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pmovmskb_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pmulh_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pmulhu_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pmulu_dq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psad_bw:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psll_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psll_dq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psll_dq_bs:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psll_q:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psll_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pslli_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pslli_q:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_pslli_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psra_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psra_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psrai_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psrai_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psrl_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psrl_dq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psrl_dq_bs:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psrl_q:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psrl_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psrli_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psrli_q:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psrli_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psubs_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psubs_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psubus_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_psubus_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_sqrt_pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_sqrt_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_sub_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_ucomieq_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_ucomige_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_ucomigt_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_ucomile_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_ucomilt_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse2_ucomineq_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse3_addsub_pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse3_addsub_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse3_hadd_pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse3_hadd_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse3_hsub_pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse3_hsub_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse3_ldu_dq:
  return OnlyReadsMemory;
case Intrinsic::x86_sse41_blendpd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_blendps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_blendvpd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_blendvps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_dppd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_dpps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_extractps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_insertps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_movntdqa:
  return OnlyReadsMemory;
case Intrinsic::x86_sse41_mpsadbw:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_packusdw:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pblendvb:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pblendw:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pcmpeqq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pextrb:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pextrd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pextrq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_phminposuw:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmaxsb:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmaxsd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmaxud:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmaxuw:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pminsb:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pminsd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pminud:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pminuw:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmovsxbd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmovsxbq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmovsxbw:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmovsxdq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmovsxwd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmovsxwq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmovzxbd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmovzxbq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmovzxbw:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmovzxdq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmovzxwd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmovzxwq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_pmuldq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_ptestc:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_ptestnzc:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_ptestz:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_round_pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_round_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_round_sd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse41_round_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_crc32_16:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_crc32_32:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_crc32_8:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_crc64_64:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_crc64_8:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_pcmpestri128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_pcmpestria128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_pcmpestric128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_pcmpestrio128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_pcmpestris128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_pcmpestriz128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_pcmpestrm128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_pcmpgtq:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_pcmpistri128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_pcmpistria128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_pcmpistric128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_pcmpistrio128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_pcmpistris128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_pcmpistriz128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse42_pcmpistrm128:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_add_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_cmp_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_cmp_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_comieq_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_comige_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_comigt_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_comile_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_comilt_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_comineq_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_cvtpd2pi:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_cvtpi2pd:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_cvtpi2ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_cvtps2pi:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_cvtsi2ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_cvtsi642ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_cvtss2si:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_cvtss2si64:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_cvttpd2pi:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_cvttps2pi:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_cvttss2si:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_cvttss2si64:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_div_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_loadu_ps:
  return OnlyReadsMemory;
case Intrinsic::x86_sse_max_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_max_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_min_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_min_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_movmsk_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_mul_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_rcp_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_rcp_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_rsqrt_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_rsqrt_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_sqrt_ps:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_sqrt_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_sub_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_ucomieq_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_ucomige_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_ucomigt_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_ucomile_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_ucomilt_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_sse_ucomineq_ss:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_pabs_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_pabs_b_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_pabs_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_pabs_d_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_pabs_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_pabs_w_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_phadd_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_phadd_d_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_phadd_sw:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_phadd_sw_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_phadd_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_phadd_w_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_phsub_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_phsub_d_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_phsub_sw:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_phsub_sw_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_phsub_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_phsub_w_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_pmadd_ub_sw:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_pmadd_ub_sw_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_pmul_hr_sw:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_pmul_hr_sw_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_pshuf_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_pshuf_b_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_pshuf_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_psign_b:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_psign_b_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_psign_d:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_psign_d_128:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_psign_w:
  return DoesNotAccessMemory;
case Intrinsic::x86_ssse3_psign_w_128:
  return DoesNotAccessMemory;
case Intrinsic::xcore_bitrev:
  return DoesNotAccessMemory;
case Intrinsic::xcore_getid:
  return DoesNotAccessMemory;
}
#endif // GET_INTRINSIC_MODREF_BEHAVIOR

// Get the GCC builtin that corresponds to an LLVM intrinsic.
#ifdef GET_GCC_BUILTIN_NAME
  switch (F->getIntrinsicID()) {
  default: BuiltinName = ""; break;
  case Intrinsic::alpha_umulh: BuiltinName = "__builtin_alpha_umulh"; break;
  case Intrinsic::arm_get_fpscr: BuiltinName = "__builtin_arm_get_fpscr"; break;
  case Intrinsic::arm_qadd: BuiltinName = "__builtin_arm_qadd"; break;
  case Intrinsic::arm_qsub: BuiltinName = "__builtin_arm_qsub"; break;
  case Intrinsic::arm_set_fpscr: BuiltinName = "__builtin_arm_set_fpscr"; break;
  case Intrinsic::arm_ssat: BuiltinName = "__builtin_arm_ssat"; break;
  case Intrinsic::arm_thread_pointer: BuiltinName = "__builtin_thread_pointer"; break;
  case Intrinsic::arm_usat: BuiltinName = "__builtin_arm_usat"; break;
  case Intrinsic::atomic_cmp_swap: BuiltinName = "__sync_val_compare_and_swap"; break;
  case Intrinsic::atomic_load_add: BuiltinName = "__sync_fetch_and_add"; break;
  case Intrinsic::atomic_load_and: BuiltinName = "__sync_fetch_and_and"; break;
  case Intrinsic::atomic_load_max: BuiltinName = "__sync_fetch_and_max"; break;
  case Intrinsic::atomic_load_min: BuiltinName = "__sync_fetch_and_min"; break;
  case Intrinsic::atomic_load_nand: BuiltinName = "__sync_fetch_and_nand"; break;
  case Intrinsic::atomic_load_or: BuiltinName = "__sync_fetch_and_or"; break;
  case Intrinsic::atomic_load_sub: BuiltinName = "__sync_fetch_and_sub"; break;
  case Intrinsic::atomic_load_umax: BuiltinName = "__sync_fetch_and_umax"; break;
  case Intrinsic::atomic_load_umin: BuiltinName = "__sync_fetch_and_umin"; break;
  case Intrinsic::atomic_load_xor: BuiltinName = "__sync_fetch_and_xor"; break;
  case Intrinsic::atomic_swap: BuiltinName = "__sync_lock_test_and_set"; break;
  case Intrinsic::convert_from_fp16: BuiltinName = "__gnu_h2f_ieee"; break;
  case Intrinsic::convert_to_fp16: BuiltinName = "__gnu_f2h_ieee"; break;
  case Intrinsic::eh_unwind_init: BuiltinName = "__builtin_unwind_init"; break;
  case Intrinsic::flt_rounds: BuiltinName = "__builtin_flt_rounds"; break;
  case Intrinsic::init_trampoline: BuiltinName = "__builtin_init_trampoline"; break;
  case Intrinsic::memory_barrier: BuiltinName = "__builtin_llvm_memory_barrier"; break;
  case Intrinsic::objectsize: BuiltinName = "__builtin_object_size"; break;
  case Intrinsic::ppc_altivec_dss: BuiltinName = "__builtin_altivec_dss"; break;
  case Intrinsic::ppc_altivec_dssall: BuiltinName = "__builtin_altivec_dssall"; break;
  case Intrinsic::ppc_altivec_dst: BuiltinName = "__builtin_altivec_dst"; break;
  case Intrinsic::ppc_altivec_dstst: BuiltinName = "__builtin_altivec_dstst"; break;
  case Intrinsic::ppc_altivec_dststt: BuiltinName = "__builtin_altivec_dststt"; break;
  case Intrinsic::ppc_altivec_dstt: BuiltinName = "__builtin_altivec_dstt"; break;
  case Intrinsic::ppc_altivec_mfvscr: BuiltinName = "__builtin_altivec_mfvscr"; break;
  case Intrinsic::ppc_altivec_mtvscr: BuiltinName = "__builtin_altivec_mtvscr"; break;
  case Intrinsic::ppc_altivec_vaddcuw: BuiltinName = "__builtin_altivec_vaddcuw"; break;
  case Intrinsic::ppc_altivec_vaddsbs: BuiltinName = "__builtin_altivec_vaddsbs"; break;
  case Intrinsic::ppc_altivec_vaddshs: BuiltinName = "__builtin_altivec_vaddshs"; break;
  case Intrinsic::ppc_altivec_vaddsws: BuiltinName = "__builtin_altivec_vaddsws"; break;
  case Intrinsic::ppc_altivec_vaddubs: BuiltinName = "__builtin_altivec_vaddubs"; break;
  case Intrinsic::ppc_altivec_vadduhs: BuiltinName = "__builtin_altivec_vadduhs"; break;
  case Intrinsic::ppc_altivec_vadduws: BuiltinName = "__builtin_altivec_vadduws"; break;
  case Intrinsic::ppc_altivec_vavgsb: BuiltinName = "__builtin_altivec_vavgsb"; break;
  case Intrinsic::ppc_altivec_vavgsh: BuiltinName = "__builtin_altivec_vavgsh"; break;
  case Intrinsic::ppc_altivec_vavgsw: BuiltinName = "__builtin_altivec_vavgsw"; break;
  case Intrinsic::ppc_altivec_vavgub: BuiltinName = "__builtin_altivec_vavgub"; break;
  case Intrinsic::ppc_altivec_vavguh: BuiltinName = "__builtin_altivec_vavguh"; break;
  case Intrinsic::ppc_altivec_vavguw: BuiltinName = "__builtin_altivec_vavguw"; break;
  case Intrinsic::ppc_altivec_vcfsx: BuiltinName = "__builtin_altivec_vcfsx"; break;
  case Intrinsic::ppc_altivec_vcfux: BuiltinName = "__builtin_altivec_vcfux"; break;
  case Intrinsic::ppc_altivec_vcmpbfp: BuiltinName = "__builtin_altivec_vcmpbfp"; break;
  case Intrinsic::ppc_altivec_vcmpbfp_p: BuiltinName = "__builtin_altivec_vcmpbfp_p"; break;
  case Intrinsic::ppc_altivec_vcmpeqfp: BuiltinName = "__builtin_altivec_vcmpeqfp"; break;
  case Intrinsic::ppc_altivec_vcmpeqfp_p: BuiltinName = "__builtin_altivec_vcmpeqfp_p"; break;
  case Intrinsic::ppc_altivec_vcmpequb: BuiltinName = "__builtin_altivec_vcmpequb"; break;
  case Intrinsic::ppc_altivec_vcmpequb_p: BuiltinName = "__builtin_altivec_vcmpequb_p"; break;
  case Intrinsic::ppc_altivec_vcmpequh: BuiltinName = "__builtin_altivec_vcmpequh"; break;
  case Intrinsic::ppc_altivec_vcmpequh_p: BuiltinName = "__builtin_altivec_vcmpequh_p"; break;
  case Intrinsic::ppc_altivec_vcmpequw: BuiltinName = "__builtin_altivec_vcmpequw"; break;
  case Intrinsic::ppc_altivec_vcmpequw_p: BuiltinName = "__builtin_altivec_vcmpequw_p"; break;
  case Intrinsic::ppc_altivec_vcmpgefp: BuiltinName = "__builtin_altivec_vcmpgefp"; break;
  case Intrinsic::ppc_altivec_vcmpgefp_p: BuiltinName = "__builtin_altivec_vcmpgefp_p"; break;
  case Intrinsic::ppc_altivec_vcmpgtfp: BuiltinName = "__builtin_altivec_vcmpgtfp"; break;
  case Intrinsic::ppc_altivec_vcmpgtfp_p: BuiltinName = "__builtin_altivec_vcmpgtfp_p"; break;
  case Intrinsic::ppc_altivec_vcmpgtsb: BuiltinName = "__builtin_altivec_vcmpgtsb"; break;
  case Intrinsic::ppc_altivec_vcmpgtsb_p: BuiltinName = "__builtin_altivec_vcmpgtsb_p"; break;
  case Intrinsic::ppc_altivec_vcmpgtsh: BuiltinName = "__builtin_altivec_vcmpgtsh"; break;
  case Intrinsic::ppc_altivec_vcmpgtsh_p: BuiltinName = "__builtin_altivec_vcmpgtsh_p"; break;
  case Intrinsic::ppc_altivec_vcmpgtsw: BuiltinName = "__builtin_altivec_vcmpgtsw"; break;
  case Intrinsic::ppc_altivec_vcmpgtsw_p: BuiltinName = "__builtin_altivec_vcmpgtsw_p"; break;
  case Intrinsic::ppc_altivec_vcmpgtub: BuiltinName = "__builtin_altivec_vcmpgtub"; break;
  case Intrinsic::ppc_altivec_vcmpgtub_p: BuiltinName = "__builtin_altivec_vcmpgtub_p"; break;
  case Intrinsic::ppc_altivec_vcmpgtuh: BuiltinName = "__builtin_altivec_vcmpgtuh"; break;
  case Intrinsic::ppc_altivec_vcmpgtuh_p: BuiltinName = "__builtin_altivec_vcmpgtuh_p"; break;
  case Intrinsic::ppc_altivec_vcmpgtuw: BuiltinName = "__builtin_altivec_vcmpgtuw"; break;
  case Intrinsic::ppc_altivec_vcmpgtuw_p: BuiltinName = "__builtin_altivec_vcmpgtuw_p"; break;
  case Intrinsic::ppc_altivec_vctsxs: BuiltinName = "__builtin_altivec_vctsxs"; break;
  case Intrinsic::ppc_altivec_vctuxs: BuiltinName = "__builtin_altivec_vctuxs"; break;
  case Intrinsic::ppc_altivec_vexptefp: BuiltinName = "__builtin_altivec_vexptefp"; break;
  case Intrinsic::ppc_altivec_vlogefp: BuiltinName = "__builtin_altivec_vlogefp"; break;
  case Intrinsic::ppc_altivec_vmaddfp: BuiltinName = "__builtin_altivec_vmaddfp"; break;
  case Intrinsic::ppc_altivec_vmaxfp: BuiltinName = "__builtin_altivec_vmaxfp"; break;
  case Intrinsic::ppc_altivec_vmaxsb: BuiltinName = "__builtin_altivec_vmaxsb"; break;
  case Intrinsic::ppc_altivec_vmaxsh: BuiltinName = "__builtin_altivec_vmaxsh"; break;
  case Intrinsic::ppc_altivec_vmaxsw: BuiltinName = "__builtin_altivec_vmaxsw"; break;
  case Intrinsic::ppc_altivec_vmaxub: BuiltinName = "__builtin_altivec_vmaxub"; break;
  case Intrinsic::ppc_altivec_vmaxuh: BuiltinName = "__builtin_altivec_vmaxuh"; break;
  case Intrinsic::ppc_altivec_vmaxuw: BuiltinName = "__builtin_altivec_vmaxuw"; break;
  case Intrinsic::ppc_altivec_vmhaddshs: BuiltinName = "__builtin_altivec_vmhaddshs"; break;
  case Intrinsic::ppc_altivec_vmhraddshs: BuiltinName = "__builtin_altivec_vmhraddshs"; break;
  case Intrinsic::ppc_altivec_vminfp: BuiltinName = "__builtin_altivec_vminfp"; break;
  case Intrinsic::ppc_altivec_vminsb: BuiltinName = "__builtin_altivec_vminsb"; break;
  case Intrinsic::ppc_altivec_vminsh: BuiltinName = "__builtin_altivec_vminsh"; break;
  case Intrinsic::ppc_altivec_vminsw: BuiltinName = "__builtin_altivec_vminsw"; break;
  case Intrinsic::ppc_altivec_vminub: BuiltinName = "__builtin_altivec_vminub"; break;
  case Intrinsic::ppc_altivec_vminuh: BuiltinName = "__builtin_altivec_vminuh"; break;
  case Intrinsic::ppc_altivec_vminuw: BuiltinName = "__builtin_altivec_vminuw"; break;
  case Intrinsic::ppc_altivec_vmladduhm: BuiltinName = "__builtin_altivec_vmladduhm"; break;
  case Intrinsic::ppc_altivec_vmsummbm: BuiltinName = "__builtin_altivec_vmsummbm"; break;
  case Intrinsic::ppc_altivec_vmsumshm: BuiltinName = "__builtin_altivec_vmsumshm"; break;
  case Intrinsic::ppc_altivec_vmsumshs: BuiltinName = "__builtin_altivec_vmsumshs"; break;
  case Intrinsic::ppc_altivec_vmsumubm: BuiltinName = "__builtin_altivec_vmsumubm"; break;
  case Intrinsic::ppc_altivec_vmsumuhm: BuiltinName = "__builtin_altivec_vmsumuhm"; break;
  case Intrinsic::ppc_altivec_vmsumuhs: BuiltinName = "__builtin_altivec_vmsumuhs"; break;
  case Intrinsic::ppc_altivec_vmulesb: BuiltinName = "__builtin_altivec_vmulesb"; break;
  case Intrinsic::ppc_altivec_vmulesh: BuiltinName = "__builtin_altivec_vmulesh"; break;
  case Intrinsic::ppc_altivec_vmuleub: BuiltinName = "__builtin_altivec_vmuleub"; break;
  case Intrinsic::ppc_altivec_vmuleuh: BuiltinName = "__builtin_altivec_vmuleuh"; break;
  case Intrinsic::ppc_altivec_vmulosb: BuiltinName = "__builtin_altivec_vmulosb"; break;
  case Intrinsic::ppc_altivec_vmulosh: BuiltinName = "__builtin_altivec_vmulosh"; break;
  case Intrinsic::ppc_altivec_vmuloub: BuiltinName = "__builtin_altivec_vmuloub"; break;
  case Intrinsic::ppc_altivec_vmulouh: BuiltinName = "__builtin_altivec_vmulouh"; break;
  case Intrinsic::ppc_altivec_vnmsubfp: BuiltinName = "__builtin_altivec_vnmsubfp"; break;
  case Intrinsic::ppc_altivec_vperm: BuiltinName = "__builtin_altivec_vperm_4si"; break;
  case Intrinsic::ppc_altivec_vpkpx: BuiltinName = "__builtin_altivec_vpkpx"; break;
  case Intrinsic::ppc_altivec_vpkshss: BuiltinName = "__builtin_altivec_vpkshss"; break;
  case Intrinsic::ppc_altivec_vpkshus: BuiltinName = "__builtin_altivec_vpkshus"; break;
  case Intrinsic::ppc_altivec_vpkswss: BuiltinName = "__builtin_altivec_vpkswss"; break;
  case Intrinsic::ppc_altivec_vpkswus: BuiltinName = "__builtin_altivec_vpkswus"; break;
  case Intrinsic::ppc_altivec_vpkuhus: BuiltinName = "__builtin_altivec_vpkuhus"; break;
  case Intrinsic::ppc_altivec_vpkuwus: BuiltinName = "__builtin_altivec_vpkuwus"; break;
  case Intrinsic::ppc_altivec_vrefp: BuiltinName = "__builtin_altivec_vrefp"; break;
  case Intrinsic::ppc_altivec_vrfim: BuiltinName = "__builtin_altivec_vrfim"; break;
  case Intrinsic::ppc_altivec_vrfin: BuiltinName = "__builtin_altivec_vrfin"; break;
  case Intrinsic::ppc_altivec_vrfip: BuiltinName = "__builtin_altivec_vrfip"; break;
  case Intrinsic::ppc_altivec_vrfiz: BuiltinName = "__builtin_altivec_vrfiz"; break;
  case Intrinsic::ppc_altivec_vrlb: BuiltinName = "__builtin_altivec_vrlb"; break;
  case Intrinsic::ppc_altivec_vrlh: BuiltinName = "__builtin_altivec_vrlh"; break;
  case Intrinsic::ppc_altivec_vrlw: BuiltinName = "__builtin_altivec_vrlw"; break;
  case Intrinsic::ppc_altivec_vrsqrtefp: BuiltinName = "__builtin_altivec_vrsqrtefp"; break;
  case Intrinsic::ppc_altivec_vsel: BuiltinName = "__builtin_altivec_vsel_4si"; break;
  case Intrinsic::ppc_altivec_vsl: BuiltinName = "__builtin_altivec_vsl"; break;
  case Intrinsic::ppc_altivec_vslb: BuiltinName = "__builtin_altivec_vslb"; break;
  case Intrinsic::ppc_altivec_vslh: BuiltinName = "__builtin_altivec_vslh"; break;
  case Intrinsic::ppc_altivec_vslo: BuiltinName = "__builtin_altivec_vslo"; break;
  case Intrinsic::ppc_altivec_vslw: BuiltinName = "__builtin_altivec_vslw"; break;
  case Intrinsic::ppc_altivec_vsr: BuiltinName = "__builtin_altivec_vsr"; break;
  case Intrinsic::ppc_altivec_vsrab: BuiltinName = "__builtin_altivec_vsrab"; break;
  case Intrinsic::ppc_altivec_vsrah: BuiltinName = "__builtin_altivec_vsrah"; break;
  case Intrinsic::ppc_altivec_vsraw: BuiltinName = "__builtin_altivec_vsraw"; break;
  case Intrinsic::ppc_altivec_vsrb: BuiltinName = "__builtin_altivec_vsrb"; break;
  case Intrinsic::ppc_altivec_vsrh: BuiltinName = "__builtin_altivec_vsrh"; break;
  case Intrinsic::ppc_altivec_vsro: BuiltinName = "__builtin_altivec_vsro"; break;
  case Intrinsic::ppc_altivec_vsrw: BuiltinName = "__builtin_altivec_vsrw"; break;
  case Intrinsic::ppc_altivec_vsubcuw: BuiltinName = "__builtin_altivec_vsubcuw"; break;
  case Intrinsic::ppc_altivec_vsubsbs: BuiltinName = "__builtin_altivec_vsubsbs"; break;
  case Intrinsic::ppc_altivec_vsubshs: BuiltinName = "__builtin_altivec_vsubshs"; break;
  case Intrinsic::ppc_altivec_vsubsws: BuiltinName = "__builtin_altivec_vsubsws"; break;
  case Intrinsic::ppc_altivec_vsububs: BuiltinName = "__builtin_altivec_vsububs"; break;
  case Intrinsic::ppc_altivec_vsubuhs: BuiltinName = "__builtin_altivec_vsubuhs"; break;
  case Intrinsic::ppc_altivec_vsubuws: BuiltinName = "__builtin_altivec_vsubuws"; break;
  case Intrinsic::ppc_altivec_vsum2sws: BuiltinName = "__builtin_altivec_vsum2sws"; break;
  case Intrinsic::ppc_altivec_vsum4sbs: BuiltinName = "__builtin_altivec_vsum4sbs"; break;
  case Intrinsic::ppc_altivec_vsum4shs: BuiltinName = "__builtin_altivec_vsum4shs"; break;
  case Intrinsic::ppc_altivec_vsum4ubs: BuiltinName = "__builtin_altivec_vsum4ubs"; break;
  case Intrinsic::ppc_altivec_vsumsws: BuiltinName = "__builtin_altivec_vsumsws"; break;
  case Intrinsic::ppc_altivec_vupkhpx: BuiltinName = "__builtin_altivec_vupkhpx"; break;
  case Intrinsic::ppc_altivec_vupkhsb: BuiltinName = "__builtin_altivec_vupkhsb"; break;
  case Intrinsic::ppc_altivec_vupkhsh: BuiltinName = "__builtin_altivec_vupkhsh"; break;
  case Intrinsic::ppc_altivec_vupklpx: BuiltinName = "__builtin_altivec_vupklpx"; break;
  case Intrinsic::ppc_altivec_vupklsb: BuiltinName = "__builtin_altivec_vupklsb"; break;
  case Intrinsic::ppc_altivec_vupklsh: BuiltinName = "__builtin_altivec_vupklsh"; break;
  case Intrinsic::spu_si_a: BuiltinName = "__builtin_si_a"; break;
  case Intrinsic::spu_si_addx: BuiltinName = "__builtin_si_addx"; break;
  case Intrinsic::spu_si_ah: BuiltinName = "__builtin_si_ah"; break;
  case Intrinsic::spu_si_ahi: BuiltinName = "__builtin_si_ahi"; break;
  case Intrinsic::spu_si_ai: BuiltinName = "__builtin_si_ai"; break;
  case Intrinsic::spu_si_and: BuiltinName = "__builtin_si_and"; break;
  case Intrinsic::spu_si_andbi: BuiltinName = "__builtin_si_andbi"; break;
  case Intrinsic::spu_si_andc: BuiltinName = "__builtin_si_andc"; break;
  case Intrinsic::spu_si_andhi: BuiltinName = "__builtin_si_andhi"; break;
  case Intrinsic::spu_si_andi: BuiltinName = "__builtin_si_andi"; break;
  case Intrinsic::spu_si_bg: BuiltinName = "__builtin_si_bg"; break;
  case Intrinsic::spu_si_bgx: BuiltinName = "__builtin_si_bgx"; break;
  case Intrinsic::spu_si_ceq: BuiltinName = "__builtin_si_ceq"; break;
  case Intrinsic::spu_si_ceqb: BuiltinName = "__builtin_si_ceqb"; break;
  case Intrinsic::spu_si_ceqbi: BuiltinName = "__builtin_si_ceqbi"; break;
  case Intrinsic::spu_si_ceqh: BuiltinName = "__builtin_si_ceqh"; break;
  case Intrinsic::spu_si_ceqhi: BuiltinName = "__builtin_si_ceqhi"; break;
  case Intrinsic::spu_si_ceqi: BuiltinName = "__builtin_si_ceqi"; break;
  case Intrinsic::spu_si_cg: BuiltinName = "__builtin_si_cg"; break;
  case Intrinsic::spu_si_cgt: BuiltinName = "__builtin_si_cgt"; break;
  case Intrinsic::spu_si_cgtb: BuiltinName = "__builtin_si_cgtb"; break;
  case Intrinsic::spu_si_cgtbi: BuiltinName = "__builtin_si_cgtbi"; break;
  case Intrinsic::spu_si_cgth: BuiltinName = "__builtin_si_cgth"; break;
  case Intrinsic::spu_si_cgthi: BuiltinName = "__builtin_si_cgthi"; break;
  case Intrinsic::spu_si_cgti: BuiltinName = "__builtin_si_cgti"; break;
  case Intrinsic::spu_si_cgx: BuiltinName = "__builtin_si_cgx"; break;
  case Intrinsic::spu_si_clgt: BuiltinName = "__builtin_si_clgt"; break;
  case Intrinsic::spu_si_clgtb: BuiltinName = "__builtin_si_clgtb"; break;
  case Intrinsic::spu_si_clgtbi: BuiltinName = "__builtin_si_clgtbi"; break;
  case Intrinsic::spu_si_clgth: BuiltinName = "__builtin_si_clgth"; break;
  case Intrinsic::spu_si_clgthi: BuiltinName = "__builtin_si_clgthi"; break;
  case Intrinsic::spu_si_clgti: BuiltinName = "__builtin_si_clgti"; break;
  case Intrinsic::spu_si_dfa: BuiltinName = "__builtin_si_dfa"; break;
  case Intrinsic::spu_si_dfm: BuiltinName = "__builtin_si_dfm"; break;
  case Intrinsic::spu_si_dfma: BuiltinName = "__builtin_si_dfma"; break;
  case Intrinsic::spu_si_dfms: BuiltinName = "__builtin_si_dfms"; break;
  case Intrinsic::spu_si_dfnma: BuiltinName = "__builtin_si_dfnma"; break;
  case Intrinsic::spu_si_dfnms: BuiltinName = "__builtin_si_dfnms"; break;
  case Intrinsic::spu_si_dfs: BuiltinName = "__builtin_si_dfs"; break;
  case Intrinsic::spu_si_fa: BuiltinName = "__builtin_si_fa"; break;
  case Intrinsic::spu_si_fceq: BuiltinName = "__builtin_si_fceq"; break;
  case Intrinsic::spu_si_fcgt: BuiltinName = "__builtin_si_fcgt"; break;
  case Intrinsic::spu_si_fcmeq: BuiltinName = "__builtin_si_fcmeq"; break;
  case Intrinsic::spu_si_fcmgt: BuiltinName = "__builtin_si_fcmgt"; break;
  case Intrinsic::spu_si_fm: BuiltinName = "__builtin_si_fm"; break;
  case Intrinsic::spu_si_fma: BuiltinName = "__builtin_si_fma"; break;
  case Intrinsic::spu_si_fms: BuiltinName = "__builtin_si_fms"; break;
  case Intrinsic::spu_si_fnms: BuiltinName = "__builtin_si_fnms"; break;
  case Intrinsic::spu_si_fs: BuiltinName = "__builtin_si_fs"; break;
  case Intrinsic::spu_si_fsmbi: BuiltinName = "__builtin_si_fsmbi"; break;
  case Intrinsic::spu_si_mpy: BuiltinName = "__builtin_si_mpy"; break;
  case Intrinsic::spu_si_mpya: BuiltinName = "__builtin_si_mpya"; break;
  case Intrinsic::spu_si_mpyh: BuiltinName = "__builtin_si_mpyh"; break;
  case Intrinsic::spu_si_mpyhh: BuiltinName = "__builtin_si_mpyhh"; break;
  case Intrinsic::spu_si_mpyhha: BuiltinName = "__builtin_si_mpyhha"; break;
  case Intrinsic::spu_si_mpyhhau: BuiltinName = "__builtin_si_mpyhhau"; break;
  case Intrinsic::spu_si_mpyhhu: BuiltinName = "__builtin_si_mpyhhu"; break;
  case Intrinsic::spu_si_mpyi: BuiltinName = "__builtin_si_mpyi"; break;
  case Intrinsic::spu_si_mpys: BuiltinName = "__builtin_si_mpys"; break;
  case Intrinsic::spu_si_mpyu: BuiltinName = "__builtin_si_mpyu"; break;
  case Intrinsic::spu_si_mpyui: BuiltinName = "__builtin_si_mpyui"; break;
  case Intrinsic::spu_si_nand: BuiltinName = "__builtin_si_nand"; break;
  case Intrinsic::spu_si_nor: BuiltinName = "__builtin_si_nor"; break;
  case Intrinsic::spu_si_or: BuiltinName = "__builtin_si_or"; break;
  case Intrinsic::spu_si_orbi: BuiltinName = "__builtin_si_orbi"; break;
  case Intrinsic::spu_si_orc: BuiltinName = "__builtin_si_orc"; break;
  case Intrinsic::spu_si_orhi: BuiltinName = "__builtin_si_orhi"; break;
  case Intrinsic::spu_si_ori: BuiltinName = "__builtin_si_ori"; break;
  case Intrinsic::spu_si_sf: BuiltinName = "__builtin_si_sf"; break;
  case Intrinsic::spu_si_sfh: BuiltinName = "__builtin_si_sfh"; break;
  case Intrinsic::spu_si_sfhi: BuiltinName = "__builtin_si_sfhi"; break;
  case Intrinsic::spu_si_sfi: BuiltinName = "__builtin_si_sfi"; break;
  case Intrinsic::spu_si_sfx: BuiltinName = "__builtin_si_sfx"; break;
  case Intrinsic::spu_si_shli: BuiltinName = "__builtin_si_shli"; break;
  case Intrinsic::spu_si_shlqbi: BuiltinName = "__builtin_si_shlqbi"; break;
  case Intrinsic::spu_si_shlqbii: BuiltinName = "__builtin_si_shlqbii"; break;
  case Intrinsic::spu_si_shlqby: BuiltinName = "__builtin_si_shlqby"; break;
  case Intrinsic::spu_si_shlqbyi: BuiltinName = "__builtin_si_shlqbyi"; break;
  case Intrinsic::spu_si_xor: BuiltinName = "__builtin_si_xor"; break;
  case Intrinsic::spu_si_xorbi: BuiltinName = "__builtin_si_xorbi"; break;
  case Intrinsic::spu_si_xorhi: BuiltinName = "__builtin_si_xorhi"; break;
  case Intrinsic::spu_si_xori: BuiltinName = "__builtin_si_xori"; break;
  case Intrinsic::stackrestore: BuiltinName = "__builtin_stack_restore"; break;
  case Intrinsic::stacksave: BuiltinName = "__builtin_stack_save"; break;
  case Intrinsic::trap: BuiltinName = "__builtin_trap"; break;
  case Intrinsic::x86_aesni_aesdec: BuiltinName = "__builtin_ia32_aesdec128"; break;
  case Intrinsic::x86_aesni_aesdeclast: BuiltinName = "__builtin_ia32_aesdeclast128"; break;
  case Intrinsic::x86_aesni_aesenc: BuiltinName = "__builtin_ia32_aesenc128"; break;
  case Intrinsic::x86_aesni_aesenclast: BuiltinName = "__builtin_ia32_aesenclast128"; break;
  case Intrinsic::x86_aesni_aesimc: BuiltinName = "__builtin_ia32_aesimc128"; break;
  case Intrinsic::x86_aesni_aeskeygenassist: BuiltinName = "__builtin_ia32_aeskeygenassist128"; break;
  case Intrinsic::x86_avx_addsub_pd_256: BuiltinName = "__builtin_ia32_addsubpd256"; break;
  case Intrinsic::x86_avx_addsub_ps_256: BuiltinName = "__builtin_ia32_addsubps256"; break;
  case Intrinsic::x86_avx_blend_pd_256: BuiltinName = "__builtin_ia32_blendpd256"; break;
  case Intrinsic::x86_avx_blend_ps_256: BuiltinName = "__builtin_ia32_blendps256"; break;
  case Intrinsic::x86_avx_blendv_pd_256: BuiltinName = "__builtin_ia32_blendvpd256"; break;
  case Intrinsic::x86_avx_blendv_ps_256: BuiltinName = "__builtin_ia32_blendvps256"; break;
  case Intrinsic::x86_avx_cmp_pd_256: BuiltinName = "__builtin_ia32_cmppd256"; break;
  case Intrinsic::x86_avx_cmp_ps_256: BuiltinName = "__builtin_ia32_cmpps256"; break;
  case Intrinsic::x86_avx_cvt_pd2_ps_256: BuiltinName = "__builtin_ia32_cvtpd2ps256"; break;
  case Intrinsic::x86_avx_cvt_pd2dq_256: BuiltinName = "__builtin_ia32_cvtpd2dq256"; break;
  case Intrinsic::x86_avx_cvt_ps2_pd_256: BuiltinName = "__builtin_ia32_cvtps2pd256"; break;
  case Intrinsic::x86_avx_cvt_ps2dq_256: BuiltinName = "__builtin_ia32_cvtps2dq256"; break;
  case Intrinsic::x86_avx_cvtdq2_pd_256: BuiltinName = "__builtin_ia32_cvtdq2pd256"; break;
  case Intrinsic::x86_avx_cvtdq2_ps_256: BuiltinName = "__builtin_ia32_cvtdq2ps256"; break;
  case Intrinsic::x86_avx_cvtt_pd2dq_256: BuiltinName = "__builtin_ia32_cvttpd2dq256"; break;
  case Intrinsic::x86_avx_cvtt_ps2dq_256: BuiltinName = "__builtin_ia32_cvttps2dq256"; break;
  case Intrinsic::x86_avx_dp_ps_256: BuiltinName = "__builtin_ia32_dpps256"; break;
  case Intrinsic::x86_avx_hadd_pd_256: BuiltinName = "__builtin_ia32_haddpd256"; break;
  case Intrinsic::x86_avx_hadd_ps_256: BuiltinName = "__builtin_ia32_haddps256"; break;
  case Intrinsic::x86_avx_hsub_pd_256: BuiltinName = "__builtin_ia32_hsubpd256"; break;
  case Intrinsic::x86_avx_hsub_ps_256: BuiltinName = "__builtin_ia32_hsubps256"; break;
  case Intrinsic::x86_avx_ldu_dq_256: BuiltinName = "__builtin_ia32_lddqu256"; break;
  case Intrinsic::x86_avx_loadu_dq_256: BuiltinName = "__builtin_ia32_loaddqu256"; break;
  case Intrinsic::x86_avx_loadu_pd_256: BuiltinName = "__builtin_ia32_loadupd256"; break;
  case Intrinsic::x86_avx_loadu_ps_256: BuiltinName = "__builtin_ia32_loadups256"; break;
  case Intrinsic::x86_avx_maskload_pd: BuiltinName = "__builtin_ia32_maskloadpd"; break;
  case Intrinsic::x86_avx_maskload_pd_256: BuiltinName = "__builtin_ia32_maskloadpd256"; break;
  case Intrinsic::x86_avx_maskload_ps: BuiltinName = "__builtin_ia32_maskloadps"; break;
  case Intrinsic::x86_avx_maskload_ps_256: BuiltinName = "__builtin_ia32_maskloadps256"; break;
  case Intrinsic::x86_avx_maskstore_pd: BuiltinName = "__builtin_ia32_maskstorepd"; break;
  case Intrinsic::x86_avx_maskstore_pd_256: BuiltinName = "__builtin_ia32_maskstorepd256"; break;
  case Intrinsic::x86_avx_maskstore_ps: BuiltinName = "__builtin_ia32_maskstoreps"; break;
  case Intrinsic::x86_avx_maskstore_ps_256: BuiltinName = "__builtin_ia32_maskstoreps256"; break;
  case Intrinsic::x86_avx_max_pd_256: BuiltinName = "__builtin_ia32_maxpd256"; break;
  case Intrinsic::x86_avx_max_ps_256: BuiltinName = "__builtin_ia32_maxps256"; break;
  case Intrinsic::x86_avx_min_pd_256: BuiltinName = "__builtin_ia32_minpd256"; break;
  case Intrinsic::x86_avx_min_ps_256: BuiltinName = "__builtin_ia32_minps256"; break;
  case Intrinsic::x86_avx_movmsk_pd_256: BuiltinName = "__builtin_ia32_movmskpd256"; break;
  case Intrinsic::x86_avx_movmsk_ps_256: BuiltinName = "__builtin_ia32_movmskps256"; break;
  case Intrinsic::x86_avx_movnt_dq_256: BuiltinName = "__builtin_ia32_movntdq256"; break;
  case Intrinsic::x86_avx_movnt_pd_256: BuiltinName = "__builtin_ia32_movntpd256"; break;
  case Intrinsic::x86_avx_movnt_ps_256: BuiltinName = "__builtin_ia32_movntps256"; break;
  case Intrinsic::x86_avx_ptestc_256: BuiltinName = "__builtin_ia32_ptestc256"; break;
  case Intrinsic::x86_avx_ptestnzc_256: BuiltinName = "__builtin_ia32_ptestnzc256"; break;
  case Intrinsic::x86_avx_ptestz_256: BuiltinName = "__builtin_ia32_ptestz256"; break;
  case Intrinsic::x86_avx_rcp_ps_256: BuiltinName = "__builtin_ia32_rcpps256"; break;
  case Intrinsic::x86_avx_round_pd_256: BuiltinName = "__builtin_ia32_roundpd256"; break;
  case Intrinsic::x86_avx_round_ps_256: BuiltinName = "__builtin_ia32_roundps256"; break;
  case Intrinsic::x86_avx_rsqrt_ps_256: BuiltinName = "__builtin_ia32_rsqrtps256"; break;
  case Intrinsic::x86_avx_sqrt_pd_256: BuiltinName = "__builtin_ia32_sqrtpd256"; break;
  case Intrinsic::x86_avx_sqrt_ps_256: BuiltinName = "__builtin_ia32_sqrtps256"; break;
  case Intrinsic::x86_avx_storeu_dq_256: BuiltinName = "__builtin_ia32_storedqu256"; break;
  case Intrinsic::x86_avx_storeu_pd_256: BuiltinName = "__builtin_ia32_storeupd256"; break;
  case Intrinsic::x86_avx_storeu_ps_256: BuiltinName = "__builtin_ia32_storeups256"; break;
  case Intrinsic::x86_avx_vbroadcast_sd_256: BuiltinName = "__builtin_ia32_vbroadcastsd256"; break;
  case Intrinsic::x86_avx_vbroadcastf128_pd_256: BuiltinName = "__builtin_ia32_vbroadcastf128_pd256"; break;
  case Intrinsic::x86_avx_vbroadcastf128_ps_256: BuiltinName = "__builtin_ia32_vbroadcastf128_ps256"; break;
  case Intrinsic::x86_avx_vbroadcastss: BuiltinName = "__builtin_ia32_vbroadcastss"; break;
  case Intrinsic::x86_avx_vbroadcastss_256: BuiltinName = "__builtin_ia32_vbroadcastss256"; break;
  case Intrinsic::x86_avx_vextractf128_pd_256: BuiltinName = "__builtin_ia32_vextractf128_pd256"; break;
  case Intrinsic::x86_avx_vextractf128_ps_256: BuiltinName = "__builtin_ia32_vextractf128_ps256"; break;
  case Intrinsic::x86_avx_vextractf128_si_256: BuiltinName = "__builtin_ia32_vextractf128_si256"; break;
  case Intrinsic::x86_avx_vinsertf128_pd_256: BuiltinName = "__builtin_ia32_vinsertf128_pd256"; break;
  case Intrinsic::x86_avx_vinsertf128_ps_256: BuiltinName = "__builtin_ia32_vinsertf128_ps256"; break;
  case Intrinsic::x86_avx_vinsertf128_si_256: BuiltinName = "__builtin_ia32_vinsertf128_si256"; break;
  case Intrinsic::x86_avx_vperm2f128_pd_256: BuiltinName = "__builtin_ia32_vperm2f128_pd256"; break;
  case Intrinsic::x86_avx_vperm2f128_ps_256: BuiltinName = "__builtin_ia32_vperm2f128_ps256"; break;
  case Intrinsic::x86_avx_vperm2f128_si_256: BuiltinName = "__builtin_ia32_vperm2f128_si256"; break;
  case Intrinsic::x86_avx_vpermil_pd: BuiltinName = "__builtin_ia32_vpermilpd"; break;
  case Intrinsic::x86_avx_vpermil_pd_256: BuiltinName = "__builtin_ia32_vpermilpd256"; break;
  case Intrinsic::x86_avx_vpermil_ps: BuiltinName = "__builtin_ia32_vpermilps"; break;
  case Intrinsic::x86_avx_vpermil_ps_256: BuiltinName = "__builtin_ia32_vpermilps256"; break;
  case Intrinsic::x86_avx_vpermilvar_pd: BuiltinName = "__builtin_ia32_vpermilvarpd"; break;
  case Intrinsic::x86_avx_vpermilvar_pd_256: BuiltinName = "__builtin_ia32_vpermilvarpd256"; break;
  case Intrinsic::x86_avx_vpermilvar_ps: BuiltinName = "__builtin_ia32_vpermilvarps"; break;
  case Intrinsic::x86_avx_vpermilvar_ps_256: BuiltinName = "__builtin_ia32_vpermilvarps256"; break;
  case Intrinsic::x86_avx_vtestc_pd: BuiltinName = "__builtin_ia32_vtestcpd"; break;
  case Intrinsic::x86_avx_vtestc_pd_256: BuiltinName = "__builtin_ia32_vtestcpd256"; break;
  case Intrinsic::x86_avx_vtestc_ps: BuiltinName = "__builtin_ia32_vtestcps"; break;
  case Intrinsic::x86_avx_vtestc_ps_256: BuiltinName = "__builtin_ia32_vtestcps256"; break;
  case Intrinsic::x86_avx_vtestnzc_pd: BuiltinName = "__builtin_ia32_vtestnzcpd"; break;
  case Intrinsic::x86_avx_vtestnzc_pd_256: BuiltinName = "__builtin_ia32_vtestnzcpd256"; break;
  case Intrinsic::x86_avx_vtestnzc_ps: BuiltinName = "__builtin_ia32_vtestnzcps"; break;
  case Intrinsic::x86_avx_vtestnzc_ps_256: BuiltinName = "__builtin_ia32_vtestnzcps256"; break;
  case Intrinsic::x86_avx_vtestz_pd: BuiltinName = "__builtin_ia32_vtestzpd"; break;
  case Intrinsic::x86_avx_vtestz_pd_256: BuiltinName = "__builtin_ia32_vtestzpd256"; break;
  case Intrinsic::x86_avx_vtestz_ps: BuiltinName = "__builtin_ia32_vtestzps"; break;
  case Intrinsic::x86_avx_vtestz_ps_256: BuiltinName = "__builtin_ia32_vtestzps256"; break;
  case Intrinsic::x86_avx_vzeroall: BuiltinName = "__builtin_ia32_vzeroall"; break;
  case Intrinsic::x86_avx_vzeroupper: BuiltinName = "__builtin_ia32_vzeroupper"; break;
  case Intrinsic::x86_mmx_emms: BuiltinName = "__builtin_ia32_emms"; break;
  case Intrinsic::x86_mmx_femms: BuiltinName = "__builtin_ia32_femms"; break;
  case Intrinsic::x86_mmx_maskmovq: BuiltinName = "__builtin_ia32_maskmovq"; break;
  case Intrinsic::x86_mmx_movnt_dq: BuiltinName = "__builtin_ia32_movntq"; break;
  case Intrinsic::x86_mmx_packssdw: BuiltinName = "__builtin_ia32_packssdw"; break;
  case Intrinsic::x86_mmx_packsswb: BuiltinName = "__builtin_ia32_packsswb"; break;
  case Intrinsic::x86_mmx_packuswb: BuiltinName = "__builtin_ia32_packuswb"; break;
  case Intrinsic::x86_mmx_padd_b: BuiltinName = "__builtin_ia32_paddb"; break;
  case Intrinsic::x86_mmx_padd_d: BuiltinName = "__builtin_ia32_paddd"; break;
  case Intrinsic::x86_mmx_padd_q: BuiltinName = "__builtin_ia32_paddq"; break;
  case Intrinsic::x86_mmx_padd_w: BuiltinName = "__builtin_ia32_paddw"; break;
  case Intrinsic::x86_mmx_padds_b: BuiltinName = "__builtin_ia32_paddsb"; break;
  case Intrinsic::x86_mmx_padds_w: BuiltinName = "__builtin_ia32_paddsw"; break;
  case Intrinsic::x86_mmx_paddus_b: BuiltinName = "__builtin_ia32_paddusb"; break;
  case Intrinsic::x86_mmx_paddus_w: BuiltinName = "__builtin_ia32_paddusw"; break;
  case Intrinsic::x86_mmx_pand: BuiltinName = "__builtin_ia32_pand"; break;
  case Intrinsic::x86_mmx_pandn: BuiltinName = "__builtin_ia32_pandn"; break;
  case Intrinsic::x86_mmx_pavg_b: BuiltinName = "__builtin_ia32_pavgb"; break;
  case Intrinsic::x86_mmx_pavg_w: BuiltinName = "__builtin_ia32_pavgw"; break;
  case Intrinsic::x86_mmx_pcmpeq_b: BuiltinName = "__builtin_ia32_pcmpeqb"; break;
  case Intrinsic::x86_mmx_pcmpeq_d: BuiltinName = "__builtin_ia32_pcmpeqd"; break;
  case Intrinsic::x86_mmx_pcmpeq_w: BuiltinName = "__builtin_ia32_pcmpeqw"; break;
  case Intrinsic::x86_mmx_pcmpgt_b: BuiltinName = "__builtin_ia32_pcmpgtb"; break;
  case Intrinsic::x86_mmx_pcmpgt_d: BuiltinName = "__builtin_ia32_pcmpgtd"; break;
  case Intrinsic::x86_mmx_pcmpgt_w: BuiltinName = "__builtin_ia32_pcmpgtw"; break;
  case Intrinsic::x86_mmx_pmadd_wd: BuiltinName = "__builtin_ia32_pmaddwd"; break;
  case Intrinsic::x86_mmx_pmaxs_w: BuiltinName = "__builtin_ia32_pmaxsw"; break;
  case Intrinsic::x86_mmx_pmaxu_b: BuiltinName = "__builtin_ia32_pmaxub"; break;
  case Intrinsic::x86_mmx_pmins_w: BuiltinName = "__builtin_ia32_pminsw"; break;
  case Intrinsic::x86_mmx_pminu_b: BuiltinName = "__builtin_ia32_pminub"; break;
  case Intrinsic::x86_mmx_pmovmskb: BuiltinName = "__builtin_ia32_pmovmskb"; break;
  case Intrinsic::x86_mmx_pmulh_w: BuiltinName = "__builtin_ia32_pmulhw"; break;
  case Intrinsic::x86_mmx_pmulhu_w: BuiltinName = "__builtin_ia32_pmulhuw"; break;
  case Intrinsic::x86_mmx_pmull_w: BuiltinName = "__builtin_ia32_pmullw"; break;
  case Intrinsic::x86_mmx_pmulu_dq: BuiltinName = "__builtin_ia32_pmuludq"; break;
  case Intrinsic::x86_mmx_por: BuiltinName = "__builtin_ia32_por"; break;
  case Intrinsic::x86_mmx_psad_bw: BuiltinName = "__builtin_ia32_psadbw"; break;
  case Intrinsic::x86_mmx_psll_d: BuiltinName = "__builtin_ia32_pslld"; break;
  case Intrinsic::x86_mmx_psll_q: BuiltinName = "__builtin_ia32_psllq"; break;
  case Intrinsic::x86_mmx_psll_w: BuiltinName = "__builtin_ia32_psllw"; break;
  case Intrinsic::x86_mmx_pslli_d: BuiltinName = "__builtin_ia32_pslldi"; break;
  case Intrinsic::x86_mmx_pslli_q: BuiltinName = "__builtin_ia32_psllqi"; break;
  case Intrinsic::x86_mmx_pslli_w: BuiltinName = "__builtin_ia32_psllwi"; break;
  case Intrinsic::x86_mmx_psra_d: BuiltinName = "__builtin_ia32_psrad"; break;
  case Intrinsic::x86_mmx_psra_w: BuiltinName = "__builtin_ia32_psraw"; break;
  case Intrinsic::x86_mmx_psrai_d: BuiltinName = "__builtin_ia32_psradi"; break;
  case Intrinsic::x86_mmx_psrai_w: BuiltinName = "__builtin_ia32_psrawi"; break;
  case Intrinsic::x86_mmx_psrl_d: BuiltinName = "__builtin_ia32_psrld"; break;
  case Intrinsic::x86_mmx_psrl_q: BuiltinName = "__builtin_ia32_psrlq"; break;
  case Intrinsic::x86_mmx_psrl_w: BuiltinName = "__builtin_ia32_psrlw"; break;
  case Intrinsic::x86_mmx_psrli_d: BuiltinName = "__builtin_ia32_psrldi"; break;
  case Intrinsic::x86_mmx_psrli_q: BuiltinName = "__builtin_ia32_psrlqi"; break;
  case Intrinsic::x86_mmx_psrli_w: BuiltinName = "__builtin_ia32_psrlwi"; break;
  case Intrinsic::x86_mmx_psub_b: BuiltinName = "__builtin_ia32_psubb"; break;
  case Intrinsic::x86_mmx_psub_d: BuiltinName = "__builtin_ia32_psubd"; break;
  case Intrinsic::x86_mmx_psub_q: BuiltinName = "__builtin_ia32_psubq"; break;
  case Intrinsic::x86_mmx_psub_w: BuiltinName = "__builtin_ia32_psubw"; break;
  case Intrinsic::x86_mmx_psubs_b: BuiltinName = "__builtin_ia32_psubsb"; break;
  case Intrinsic::x86_mmx_psubs_w: BuiltinName = "__builtin_ia32_psubsw"; break;
  case Intrinsic::x86_mmx_psubus_b: BuiltinName = "__builtin_ia32_psubusb"; break;
  case Intrinsic::x86_mmx_psubus_w: BuiltinName = "__builtin_ia32_psubusw"; break;
  case Intrinsic::x86_mmx_punpckhbw: BuiltinName = "__builtin_ia32_punpckhbw"; break;
  case Intrinsic::x86_mmx_punpckhdq: BuiltinName = "__builtin_ia32_punpckhdq"; break;
  case Intrinsic::x86_mmx_punpckhwd: BuiltinName = "__builtin_ia32_punpckhwd"; break;
  case Intrinsic::x86_mmx_punpcklbw: BuiltinName = "__builtin_ia32_punpcklbw"; break;
  case Intrinsic::x86_mmx_punpckldq: BuiltinName = "__builtin_ia32_punpckldq"; break;
  case Intrinsic::x86_mmx_punpcklwd: BuiltinName = "__builtin_ia32_punpcklwd"; break;
  case Intrinsic::x86_mmx_pxor: BuiltinName = "__builtin_ia32_pxor"; break;
  case Intrinsic::x86_mmx_vec_ext_d: BuiltinName = "__builtin_ia32_vec_ext_v2si"; break;
  case Intrinsic::x86_mmx_vec_init_b: BuiltinName = "__builtin_ia32_vec_init_v8qi"; break;
  case Intrinsic::x86_mmx_vec_init_d: BuiltinName = "__builtin_ia32_vec_init_v2si"; break;
  case Intrinsic::x86_mmx_vec_init_w: BuiltinName = "__builtin_ia32_vec_init_v4hi"; break;
  case Intrinsic::x86_sse2_add_sd: BuiltinName = "__builtin_ia32_addsd"; break;
  case Intrinsic::x86_sse2_clflush: BuiltinName = "__builtin_ia32_clflush"; break;
  case Intrinsic::x86_sse2_comieq_sd: BuiltinName = "__builtin_ia32_comisdeq"; break;
  case Intrinsic::x86_sse2_comige_sd: BuiltinName = "__builtin_ia32_comisdge"; break;
  case Intrinsic::x86_sse2_comigt_sd: BuiltinName = "__builtin_ia32_comisdgt"; break;
  case Intrinsic::x86_sse2_comile_sd: BuiltinName = "__builtin_ia32_comisdle"; break;
  case Intrinsic::x86_sse2_comilt_sd: BuiltinName = "__builtin_ia32_comisdlt"; break;
  case Intrinsic::x86_sse2_comineq_sd: BuiltinName = "__builtin_ia32_comisdneq"; break;
  case Intrinsic::x86_sse2_cvtdq2pd: BuiltinName = "__builtin_ia32_cvtdq2pd"; break;
  case Intrinsic::x86_sse2_cvtdq2ps: BuiltinName = "__builtin_ia32_cvtdq2ps"; break;
  case Intrinsic::x86_sse2_cvtpd2dq: BuiltinName = "__builtin_ia32_cvtpd2dq"; break;
  case Intrinsic::x86_sse2_cvtpd2ps: BuiltinName = "__builtin_ia32_cvtpd2ps"; break;
  case Intrinsic::x86_sse2_cvtps2dq: BuiltinName = "__builtin_ia32_cvtps2dq"; break;
  case Intrinsic::x86_sse2_cvtps2pd: BuiltinName = "__builtin_ia32_cvtps2pd"; break;
  case Intrinsic::x86_sse2_cvtsd2si: BuiltinName = "__builtin_ia32_cvtsd2si"; break;
  case Intrinsic::x86_sse2_cvtsd2si64: BuiltinName = "__builtin_ia32_cvtsd2si64"; break;
  case Intrinsic::x86_sse2_cvtsd2ss: BuiltinName = "__builtin_ia32_cvtsd2ss"; break;
  case Intrinsic::x86_sse2_cvtsi2sd: BuiltinName = "__builtin_ia32_cvtsi2sd"; break;
  case Intrinsic::x86_sse2_cvtsi642sd: BuiltinName = "__builtin_ia32_cvtsi642sd"; break;
  case Intrinsic::x86_sse2_cvtss2sd: BuiltinName = "__builtin_ia32_cvtss2sd"; break;
  case Intrinsic::x86_sse2_cvttpd2dq: BuiltinName = "__builtin_ia32_cvttpd2dq"; break;
  case Intrinsic::x86_sse2_cvttps2dq: BuiltinName = "__builtin_ia32_cvttps2dq"; break;
  case Intrinsic::x86_sse2_cvttsd2si: BuiltinName = "__builtin_ia32_cvttsd2si"; break;
  case Intrinsic::x86_sse2_cvttsd2si64: BuiltinName = "__builtin_ia32_cvttsd2si64"; break;
  case Intrinsic::x86_sse2_div_sd: BuiltinName = "__builtin_ia32_divsd"; break;
  case Intrinsic::x86_sse2_lfence: BuiltinName = "__builtin_ia32_lfence"; break;
  case Intrinsic::x86_sse2_loadu_dq: BuiltinName = "__builtin_ia32_loaddqu"; break;
  case Intrinsic::x86_sse2_loadu_pd: BuiltinName = "__builtin_ia32_loadupd"; break;
  case Intrinsic::x86_sse2_maskmov_dqu: BuiltinName = "__builtin_ia32_maskmovdqu"; break;
  case Intrinsic::x86_sse2_max_pd: BuiltinName = "__builtin_ia32_maxpd"; break;
  case Intrinsic::x86_sse2_max_sd: BuiltinName = "__builtin_ia32_maxsd"; break;
  case Intrinsic::x86_sse2_mfence: BuiltinName = "__builtin_ia32_mfence"; break;
  case Intrinsic::x86_sse2_min_pd: BuiltinName = "__builtin_ia32_minpd"; break;
  case Intrinsic::x86_sse2_min_sd: BuiltinName = "__builtin_ia32_minsd"; break;
  case Intrinsic::x86_sse2_movmsk_pd: BuiltinName = "__builtin_ia32_movmskpd"; break;
  case Intrinsic::x86_sse2_movnt_dq: BuiltinName = "__builtin_ia32_movntdq"; break;
  case Intrinsic::x86_sse2_movnt_i: BuiltinName = "__builtin_ia32_movnti"; break;
  case Intrinsic::x86_sse2_movnt_pd: BuiltinName = "__builtin_ia32_movntpd"; break;
  case Intrinsic::x86_sse2_mul_sd: BuiltinName = "__builtin_ia32_mulsd"; break;
  case Intrinsic::x86_sse2_packssdw_128: BuiltinName = "__builtin_ia32_packssdw128"; break;
  case Intrinsic::x86_sse2_packsswb_128: BuiltinName = "__builtin_ia32_packsswb128"; break;
  case Intrinsic::x86_sse2_packuswb_128: BuiltinName = "__builtin_ia32_packuswb128"; break;
  case Intrinsic::x86_sse2_padds_b: BuiltinName = "__builtin_ia32_paddsb128"; break;
  case Intrinsic::x86_sse2_padds_w: BuiltinName = "__builtin_ia32_paddsw128"; break;
  case Intrinsic::x86_sse2_paddus_b: BuiltinName = "__builtin_ia32_paddusb128"; break;
  case Intrinsic::x86_sse2_paddus_w: BuiltinName = "__builtin_ia32_paddusw128"; break;
  case Intrinsic::x86_sse2_pavg_b: BuiltinName = "__builtin_ia32_pavgb128"; break;
  case Intrinsic::x86_sse2_pavg_w: BuiltinName = "__builtin_ia32_pavgw128"; break;
  case Intrinsic::x86_sse2_pcmpeq_b: BuiltinName = "__builtin_ia32_pcmpeqb128"; break;
  case Intrinsic::x86_sse2_pcmpeq_d: BuiltinName = "__builtin_ia32_pcmpeqd128"; break;
  case Intrinsic::x86_sse2_pcmpeq_w: BuiltinName = "__builtin_ia32_pcmpeqw128"; break;
  case Intrinsic::x86_sse2_pcmpgt_b: BuiltinName = "__builtin_ia32_pcmpgtb128"; break;
  case Intrinsic::x86_sse2_pcmpgt_d: BuiltinName = "__builtin_ia32_pcmpgtd128"; break;
  case Intrinsic::x86_sse2_pcmpgt_w: BuiltinName = "__builtin_ia32_pcmpgtw128"; break;
  case Intrinsic::x86_sse2_pmadd_wd: BuiltinName = "__builtin_ia32_pmaddwd128"; break;
  case Intrinsic::x86_sse2_pmaxs_w: BuiltinName = "__builtin_ia32_pmaxsw128"; break;
  case Intrinsic::x86_sse2_pmaxu_b: BuiltinName = "__builtin_ia32_pmaxub128"; break;
  case Intrinsic::x86_sse2_pmins_w: BuiltinName = "__builtin_ia32_pminsw128"; break;
  case Intrinsic::x86_sse2_pminu_b: BuiltinName = "__builtin_ia32_pminub128"; break;
  case Intrinsic::x86_sse2_pmovmskb_128: BuiltinName = "__builtin_ia32_pmovmskb128"; break;
  case Intrinsic::x86_sse2_pmulh_w: BuiltinName = "__builtin_ia32_pmulhw128"; break;
  case Intrinsic::x86_sse2_pmulhu_w: BuiltinName = "__builtin_ia32_pmulhuw128"; break;
  case Intrinsic::x86_sse2_pmulu_dq: BuiltinName = "__builtin_ia32_pmuludq128"; break;
  case Intrinsic::x86_sse2_psad_bw: BuiltinName = "__builtin_ia32_psadbw128"; break;
  case Intrinsic::x86_sse2_psll_d: BuiltinName = "__builtin_ia32_pslld128"; break;
  case Intrinsic::x86_sse2_psll_dq: BuiltinName = "__builtin_ia32_pslldqi128"; break;
  case Intrinsic::x86_sse2_psll_dq_bs: BuiltinName = "__builtin_ia32_pslldqi128_byteshift"; break;
  case Intrinsic::x86_sse2_psll_q: BuiltinName = "__builtin_ia32_psllq128"; break;
  case Intrinsic::x86_sse2_psll_w: BuiltinName = "__builtin_ia32_psllw128"; break;
  case Intrinsic::x86_sse2_pslli_d: BuiltinName = "__builtin_ia32_pslldi128"; break;
  case Intrinsic::x86_sse2_pslli_q: BuiltinName = "__builtin_ia32_psllqi128"; break;
  case Intrinsic::x86_sse2_pslli_w: BuiltinName = "__builtin_ia32_psllwi128"; break;
  case Intrinsic::x86_sse2_psra_d: BuiltinName = "__builtin_ia32_psrad128"; break;
  case Intrinsic::x86_sse2_psra_w: BuiltinName = "__builtin_ia32_psraw128"; break;
  case Intrinsic::x86_sse2_psrai_d: BuiltinName = "__builtin_ia32_psradi128"; break;
  case Intrinsic::x86_sse2_psrai_w: BuiltinName = "__builtin_ia32_psrawi128"; break;
  case Intrinsic::x86_sse2_psrl_d: BuiltinName = "__builtin_ia32_psrld128"; break;
  case Intrinsic::x86_sse2_psrl_dq: BuiltinName = "__builtin_ia32_psrldqi128"; break;
  case Intrinsic::x86_sse2_psrl_dq_bs: BuiltinName = "__builtin_ia32_psrldqi128_byteshift"; break;
  case Intrinsic::x86_sse2_psrl_q: BuiltinName = "__builtin_ia32_psrlq128"; break;
  case Intrinsic::x86_sse2_psrl_w: BuiltinName = "__builtin_ia32_psrlw128"; break;
  case Intrinsic::x86_sse2_psrli_d: BuiltinName = "__builtin_ia32_psrldi128"; break;
  case Intrinsic::x86_sse2_psrli_q: BuiltinName = "__builtin_ia32_psrlqi128"; break;
  case Intrinsic::x86_sse2_psrli_w: BuiltinName = "__builtin_ia32_psrlwi128"; break;
  case Intrinsic::x86_sse2_psubs_b: BuiltinName = "__builtin_ia32_psubsb128"; break;
  case Intrinsic::x86_sse2_psubs_w: BuiltinName = "__builtin_ia32_psubsw128"; break;
  case Intrinsic::x86_sse2_psubus_b: BuiltinName = "__builtin_ia32_psubusb128"; break;
  case Intrinsic::x86_sse2_psubus_w: BuiltinName = "__builtin_ia32_psubusw128"; break;
  case Intrinsic::x86_sse2_sqrt_pd: BuiltinName = "__builtin_ia32_sqrtpd"; break;
  case Intrinsic::x86_sse2_sqrt_sd: BuiltinName = "__builtin_ia32_sqrtsd"; break;
  case Intrinsic::x86_sse2_storel_dq: BuiltinName = "__builtin_ia32_storelv4si"; break;
  case Intrinsic::x86_sse2_storeu_dq: BuiltinName = "__builtin_ia32_storedqu"; break;
  case Intrinsic::x86_sse2_storeu_pd: BuiltinName = "__builtin_ia32_storeupd"; break;
  case Intrinsic::x86_sse2_sub_sd: BuiltinName = "__builtin_ia32_subsd"; break;
  case Intrinsic::x86_sse2_ucomieq_sd: BuiltinName = "__builtin_ia32_ucomisdeq"; break;
  case Intrinsic::x86_sse2_ucomige_sd: BuiltinName = "__builtin_ia32_ucomisdge"; break;
  case Intrinsic::x86_sse2_ucomigt_sd: BuiltinName = "__builtin_ia32_ucomisdgt"; break;
  case Intrinsic::x86_sse2_ucomile_sd: BuiltinName = "__builtin_ia32_ucomisdle"; break;
  case Intrinsic::x86_sse2_ucomilt_sd: BuiltinName = "__builtin_ia32_ucomisdlt"; break;
  case Intrinsic::x86_sse2_ucomineq_sd: BuiltinName = "__builtin_ia32_ucomisdneq"; break;
  case Intrinsic::x86_sse3_addsub_pd: BuiltinName = "__builtin_ia32_addsubpd"; break;
  case Intrinsic::x86_sse3_addsub_ps: BuiltinName = "__builtin_ia32_addsubps"; break;
  case Intrinsic::x86_sse3_hadd_pd: BuiltinName = "__builtin_ia32_haddpd"; break;
  case Intrinsic::x86_sse3_hadd_ps: BuiltinName = "__builtin_ia32_haddps"; break;
  case Intrinsic::x86_sse3_hsub_pd: BuiltinName = "__builtin_ia32_hsubpd"; break;
  case Intrinsic::x86_sse3_hsub_ps: BuiltinName = "__builtin_ia32_hsubps"; break;
  case Intrinsic::x86_sse3_ldu_dq: BuiltinName = "__builtin_ia32_lddqu"; break;
  case Intrinsic::x86_sse3_monitor: BuiltinName = "__builtin_ia32_monitor"; break;
  case Intrinsic::x86_sse3_mwait: BuiltinName = "__builtin_ia32_mwait"; break;
  case Intrinsic::x86_sse41_blendpd: BuiltinName = "__builtin_ia32_blendpd"; break;
  case Intrinsic::x86_sse41_blendps: BuiltinName = "__builtin_ia32_blendps"; break;
  case Intrinsic::x86_sse41_blendvpd: BuiltinName = "__builtin_ia32_blendvpd"; break;
  case Intrinsic::x86_sse41_blendvps: BuiltinName = "__builtin_ia32_blendvps"; break;
  case Intrinsic::x86_sse41_dppd: BuiltinName = "__builtin_ia32_dppd"; break;
  case Intrinsic::x86_sse41_dpps: BuiltinName = "__builtin_ia32_dpps"; break;
  case Intrinsic::x86_sse41_extractps: BuiltinName = "__builtin_ia32_extractps128"; break;
  case Intrinsic::x86_sse41_insertps: BuiltinName = "__builtin_ia32_insertps128"; break;
  case Intrinsic::x86_sse41_movntdqa: BuiltinName = "__builtin_ia32_movntdqa"; break;
  case Intrinsic::x86_sse41_mpsadbw: BuiltinName = "__builtin_ia32_mpsadbw128"; break;
  case Intrinsic::x86_sse41_packusdw: BuiltinName = "__builtin_ia32_packusdw128"; break;
  case Intrinsic::x86_sse41_pblendvb: BuiltinName = "__builtin_ia32_pblendvb128"; break;
  case Intrinsic::x86_sse41_pblendw: BuiltinName = "__builtin_ia32_pblendw128"; break;
  case Intrinsic::x86_sse41_pcmpeqq: BuiltinName = "__builtin_ia32_pcmpeqq"; break;
  case Intrinsic::x86_sse41_phminposuw: BuiltinName = "__builtin_ia32_phminposuw128"; break;
  case Intrinsic::x86_sse41_pmaxsb: BuiltinName = "__builtin_ia32_pmaxsb128"; break;
  case Intrinsic::x86_sse41_pmaxsd: BuiltinName = "__builtin_ia32_pmaxsd128"; break;
  case Intrinsic::x86_sse41_pmaxud: BuiltinName = "__builtin_ia32_pmaxud128"; break;
  case Intrinsic::x86_sse41_pmaxuw: BuiltinName = "__builtin_ia32_pmaxuw128"; break;
  case Intrinsic::x86_sse41_pminsb: BuiltinName = "__builtin_ia32_pminsb128"; break;
  case Intrinsic::x86_sse41_pminsd: BuiltinName = "__builtin_ia32_pminsd128"; break;
  case Intrinsic::x86_sse41_pminud: BuiltinName = "__builtin_ia32_pminud128"; break;
  case Intrinsic::x86_sse41_pminuw: BuiltinName = "__builtin_ia32_pminuw128"; break;
  case Intrinsic::x86_sse41_pmovsxbd: BuiltinName = "__builtin_ia32_pmovsxbd128"; break;
  case Intrinsic::x86_sse41_pmovsxbq: BuiltinName = "__builtin_ia32_pmovsxbq128"; break;
  case Intrinsic::x86_sse41_pmovsxbw: BuiltinName = "__builtin_ia32_pmovsxbw128"; break;
  case Intrinsic::x86_sse41_pmovsxdq: BuiltinName = "__builtin_ia32_pmovsxdq128"; break;
  case Intrinsic::x86_sse41_pmovsxwd: BuiltinName = "__builtin_ia32_pmovsxwd128"; break;
  case Intrinsic::x86_sse41_pmovsxwq: BuiltinName = "__builtin_ia32_pmovsxwq128"; break;
  case Intrinsic::x86_sse41_pmovzxbd: BuiltinName = "__builtin_ia32_pmovzxbd128"; break;
  case Intrinsic::x86_sse41_pmovzxbq: BuiltinName = "__builtin_ia32_pmovzxbq128"; break;
  case Intrinsic::x86_sse41_pmovzxbw: BuiltinName = "__builtin_ia32_pmovzxbw128"; break;
  case Intrinsic::x86_sse41_pmovzxdq: BuiltinName = "__builtin_ia32_pmovzxdq128"; break;
  case Intrinsic::x86_sse41_pmovzxwd: BuiltinName = "__builtin_ia32_pmovzxwd128"; break;
  case Intrinsic::x86_sse41_pmovzxwq: BuiltinName = "__builtin_ia32_pmovzxwq128"; break;
  case Intrinsic::x86_sse41_pmuldq: BuiltinName = "__builtin_ia32_pmuldq128"; break;
  case Intrinsic::x86_sse41_ptestc: BuiltinName = "__builtin_ia32_ptestc128"; break;
  case Intrinsic::x86_sse41_ptestnzc: BuiltinName = "__builtin_ia32_ptestnzc128"; break;
  case Intrinsic::x86_sse41_ptestz: BuiltinName = "__builtin_ia32_ptestz128"; break;
  case Intrinsic::x86_sse41_round_pd: BuiltinName = "__builtin_ia32_roundpd"; break;
  case Intrinsic::x86_sse41_round_ps: BuiltinName = "__builtin_ia32_roundps"; break;
  case Intrinsic::x86_sse41_round_sd: BuiltinName = "__builtin_ia32_roundsd"; break;
  case Intrinsic::x86_sse41_round_ss: BuiltinName = "__builtin_ia32_roundss"; break;
  case Intrinsic::x86_sse42_crc32_16: BuiltinName = "__builtin_ia32_crc32hi"; break;
  case Intrinsic::x86_sse42_crc32_32: BuiltinName = "__builtin_ia32_crc32si"; break;
  case Intrinsic::x86_sse42_crc32_8: BuiltinName = "__builtin_ia32_crc32qi"; break;
  case Intrinsic::x86_sse42_crc64_64: BuiltinName = "__builtin_ia32_crc32di"; break;
  case Intrinsic::x86_sse42_pcmpestri128: BuiltinName = "__builtin_ia32_pcmpestri128"; break;
  case Intrinsic::x86_sse42_pcmpestria128: BuiltinName = "__builtin_ia32_pcmpestria128"; break;
  case Intrinsic::x86_sse42_pcmpestric128: BuiltinName = "__builtin_ia32_pcmpestric128"; break;
  case Intrinsic::x86_sse42_pcmpestrio128: BuiltinName = "__builtin_ia32_pcmpestrio128"; break;
  case Intrinsic::x86_sse42_pcmpestris128: BuiltinName = "__builtin_ia32_pcmpestris128"; break;
  case Intrinsic::x86_sse42_pcmpestriz128: BuiltinName = "__builtin_ia32_pcmpestriz128"; break;
  case Intrinsic::x86_sse42_pcmpestrm128: BuiltinName = "__builtin_ia32_pcmpestrm128"; break;
  case Intrinsic::x86_sse42_pcmpgtq: BuiltinName = "__builtin_ia32_pcmpgtq"; break;
  case Intrinsic::x86_sse42_pcmpistri128: BuiltinName = "__builtin_ia32_pcmpistri128"; break;
  case Intrinsic::x86_sse42_pcmpistria128: BuiltinName = "__builtin_ia32_pcmpistria128"; break;
  case Intrinsic::x86_sse42_pcmpistric128: BuiltinName = "__builtin_ia32_pcmpistric128"; break;
  case Intrinsic::x86_sse42_pcmpistrio128: BuiltinName = "__builtin_ia32_pcmpistrio128"; break;
  case Intrinsic::x86_sse42_pcmpistris128: BuiltinName = "__builtin_ia32_pcmpistris128"; break;
  case Intrinsic::x86_sse42_pcmpistriz128: BuiltinName = "__builtin_ia32_pcmpistriz128"; break;
  case Intrinsic::x86_sse42_pcmpistrm128: BuiltinName = "__builtin_ia32_pcmpistrm128"; break;
  case Intrinsic::x86_sse_add_ss: BuiltinName = "__builtin_ia32_addss"; break;
  case Intrinsic::x86_sse_comieq_ss: BuiltinName = "__builtin_ia32_comieq"; break;
  case Intrinsic::x86_sse_comige_ss: BuiltinName = "__builtin_ia32_comige"; break;
  case Intrinsic::x86_sse_comigt_ss: BuiltinName = "__builtin_ia32_comigt"; break;
  case Intrinsic::x86_sse_comile_ss: BuiltinName = "__builtin_ia32_comile"; break;
  case Intrinsic::x86_sse_comilt_ss: BuiltinName = "__builtin_ia32_comilt"; break;
  case Intrinsic::x86_sse_comineq_ss: BuiltinName = "__builtin_ia32_comineq"; break;
  case Intrinsic::x86_sse_cvtpd2pi: BuiltinName = "__builtin_ia32_cvtpd2pi"; break;
  case Intrinsic::x86_sse_cvtpi2pd: BuiltinName = "__builtin_ia32_cvtpi2pd"; break;
  case Intrinsic::x86_sse_cvtpi2ps: BuiltinName = "__builtin_ia32_cvtpi2ps"; break;
  case Intrinsic::x86_sse_cvtps2pi: BuiltinName = "__builtin_ia32_cvtps2pi"; break;
  case Intrinsic::x86_sse_cvtsi2ss: BuiltinName = "__builtin_ia32_cvtsi2ss"; break;
  case Intrinsic::x86_sse_cvtsi642ss: BuiltinName = "__builtin_ia32_cvtsi642ss"; break;
  case Intrinsic::x86_sse_cvtss2si: BuiltinName = "__builtin_ia32_cvtss2si"; break;
  case Intrinsic::x86_sse_cvtss2si64: BuiltinName = "__builtin_ia32_cvtss2si64"; break;
  case Intrinsic::x86_sse_cvttpd2pi: BuiltinName = "__builtin_ia32_cvttpd2pi"; break;
  case Intrinsic::x86_sse_cvttps2pi: BuiltinName = "__builtin_ia32_cvttps2pi"; break;
  case Intrinsic::x86_sse_cvttss2si: BuiltinName = "__builtin_ia32_cvttss2si"; break;
  case Intrinsic::x86_sse_cvttss2si64: BuiltinName = "__builtin_ia32_cvttss2si64"; break;
  case Intrinsic::x86_sse_div_ss: BuiltinName = "__builtin_ia32_divss"; break;
  case Intrinsic::x86_sse_loadu_ps: BuiltinName = "__builtin_ia32_loadups"; break;
  case Intrinsic::x86_sse_max_ps: BuiltinName = "__builtin_ia32_maxps"; break;
  case Intrinsic::x86_sse_max_ss: BuiltinName = "__builtin_ia32_maxss"; break;
  case Intrinsic::x86_sse_min_ps: BuiltinName = "__builtin_ia32_minps"; break;
  case Intrinsic::x86_sse_min_ss: BuiltinName = "__builtin_ia32_minss"; break;
  case Intrinsic::x86_sse_movmsk_ps: BuiltinName = "__builtin_ia32_movmskps"; break;
  case Intrinsic::x86_sse_movnt_ps: BuiltinName = "__builtin_ia32_movntps"; break;
  case Intrinsic::x86_sse_mul_ss: BuiltinName = "__builtin_ia32_mulss"; break;
  case Intrinsic::x86_sse_rcp_ps: BuiltinName = "__builtin_ia32_rcpps"; break;
  case Intrinsic::x86_sse_rcp_ss: BuiltinName = "__builtin_ia32_rcpss"; break;
  case Intrinsic::x86_sse_rsqrt_ps: BuiltinName = "__builtin_ia32_rsqrtps"; break;
  case Intrinsic::x86_sse_rsqrt_ss: BuiltinName = "__builtin_ia32_rsqrtss"; break;
  case Intrinsic::x86_sse_sfence: BuiltinName = "__builtin_ia32_sfence"; break;
  case Intrinsic::x86_sse_sqrt_ps: BuiltinName = "__builtin_ia32_sqrtps"; break;
  case Intrinsic::x86_sse_sqrt_ss: BuiltinName = "__builtin_ia32_sqrtss"; break;
  case Intrinsic::x86_sse_storeu_ps: BuiltinName = "__builtin_ia32_storeups"; break;
  case Intrinsic::x86_sse_sub_ss: BuiltinName = "__builtin_ia32_subss"; break;
  case Intrinsic::x86_sse_ucomieq_ss: BuiltinName = "__builtin_ia32_ucomieq"; break;
  case Intrinsic::x86_sse_ucomige_ss: BuiltinName = "__builtin_ia32_ucomige"; break;
  case Intrinsic::x86_sse_ucomigt_ss: BuiltinName = "__builtin_ia32_ucomigt"; break;
  case Intrinsic::x86_sse_ucomile_ss: BuiltinName = "__builtin_ia32_ucomile"; break;
  case Intrinsic::x86_sse_ucomilt_ss: BuiltinName = "__builtin_ia32_ucomilt"; break;
  case Intrinsic::x86_sse_ucomineq_ss: BuiltinName = "__builtin_ia32_ucomineq"; break;
  case Intrinsic::x86_ssse3_pabs_b: BuiltinName = "__builtin_ia32_pabsb"; break;
  case Intrinsic::x86_ssse3_pabs_b_128: BuiltinName = "__builtin_ia32_pabsb128"; break;
  case Intrinsic::x86_ssse3_pabs_d: BuiltinName = "__builtin_ia32_pabsd"; break;
  case Intrinsic::x86_ssse3_pabs_d_128: BuiltinName = "__builtin_ia32_pabsd128"; break;
  case Intrinsic::x86_ssse3_pabs_w: BuiltinName = "__builtin_ia32_pabsw"; break;
  case Intrinsic::x86_ssse3_pabs_w_128: BuiltinName = "__builtin_ia32_pabsw128"; break;
  case Intrinsic::x86_ssse3_phadd_d: BuiltinName = "__builtin_ia32_phaddd"; break;
  case Intrinsic::x86_ssse3_phadd_d_128: BuiltinName = "__builtin_ia32_phaddd128"; break;
  case Intrinsic::x86_ssse3_phadd_sw: BuiltinName = "__builtin_ia32_phaddsw"; break;
  case Intrinsic::x86_ssse3_phadd_sw_128: BuiltinName = "__builtin_ia32_phaddsw128"; break;
  case Intrinsic::x86_ssse3_phadd_w: BuiltinName = "__builtin_ia32_phaddw"; break;
  case Intrinsic::x86_ssse3_phadd_w_128: BuiltinName = "__builtin_ia32_phaddw128"; break;
  case Intrinsic::x86_ssse3_phsub_d: BuiltinName = "__builtin_ia32_phsubd"; break;
  case Intrinsic::x86_ssse3_phsub_d_128: BuiltinName = "__builtin_ia32_phsubd128"; break;
  case Intrinsic::x86_ssse3_phsub_sw: BuiltinName = "__builtin_ia32_phsubsw"; break;
  case Intrinsic::x86_ssse3_phsub_sw_128: BuiltinName = "__builtin_ia32_phsubsw128"; break;
  case Intrinsic::x86_ssse3_phsub_w: BuiltinName = "__builtin_ia32_phsubw"; break;
  case Intrinsic::x86_ssse3_phsub_w_128: BuiltinName = "__builtin_ia32_phsubw128"; break;
  case Intrinsic::x86_ssse3_pmadd_ub_sw: BuiltinName = "__builtin_ia32_pmaddubsw"; break;
  case Intrinsic::x86_ssse3_pmadd_ub_sw_128: BuiltinName = "__builtin_ia32_pmaddubsw128"; break;
  case Intrinsic::x86_ssse3_pmul_hr_sw: BuiltinName = "__builtin_ia32_pmulhrsw"; break;
  case Intrinsic::x86_ssse3_pmul_hr_sw_128: BuiltinName = "__builtin_ia32_pmulhrsw128"; break;
  case Intrinsic::x86_ssse3_pshuf_b: BuiltinName = "__builtin_ia32_pshufb"; break;
  case Intrinsic::x86_ssse3_pshuf_b_128: BuiltinName = "__builtin_ia32_pshufb128"; break;
  case Intrinsic::x86_ssse3_pshuf_w: BuiltinName = "__builtin_ia32_pshufw"; break;
  case Intrinsic::x86_ssse3_psign_b: BuiltinName = "__builtin_ia32_psignb"; break;
  case Intrinsic::x86_ssse3_psign_b_128: BuiltinName = "__builtin_ia32_psignb128"; break;
  case Intrinsic::x86_ssse3_psign_d: BuiltinName = "__builtin_ia32_psignd"; break;
  case Intrinsic::x86_ssse3_psign_d_128: BuiltinName = "__builtin_ia32_psignd128"; break;
  case Intrinsic::x86_ssse3_psign_w: BuiltinName = "__builtin_ia32_psignw"; break;
  case Intrinsic::x86_ssse3_psign_w_128: BuiltinName = "__builtin_ia32_psignw128"; break;
  }
#endif

// Get the LLVM intrinsic that corresponds to a GCC builtin.
// This is used by the C front-end.  The GCC builtin name is passed
// in as BuiltinName, and a target prefix (e.g. 'ppc') is passed
// in as TargetPrefix.  The result is assigned to 'IntrinsicID'.
#ifdef GET_LLVM_INTRINSIC_FOR_GCC_BUILTIN
Intrinsic::ID Intrinsic::getIntrinsicForGCCBuiltin(const char *TargetPrefix, const char *BuiltinName) {
  Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic;
  /* Target Independent Builtins */ {
    switch (strlen(BuiltinName)) {
    default: break;
    case 14:
      if (!memcmp(BuiltinName, "__", 2)) {
        switch (BuiltinName[2]) {  // "__"
        case 'b':
          if (!memcmp(BuiltinName+3, "uiltin_trap", 11))
            IntrinsicID = Intrinsic::trap;
          break;
        case 'g':
          if (!memcmp(BuiltinName+3, "nu_", 3)) {
            switch (BuiltinName[6]) {  // "__gnu_"
            case 'f':
              if (!memcmp(BuiltinName+7, "2h_ieee", 7))
                IntrinsicID = Intrinsic::convert_to_fp16;
              break;
            case 'h':
              if (!memcmp(BuiltinName+7, "2f_ieee", 7))
                IntrinsicID = Intrinsic::convert_from_fp16;
              break;
            }
          }
          break;
        }
      }
      break;
    case 19:
      if (!memcmp(BuiltinName, "__sync_fetch_and_or", 19))
        IntrinsicID = Intrinsic::atomic_load_or;
      break;
    case 20:
      if (!memcmp(BuiltinName, "__", 2)) {
        switch (BuiltinName[2]) {  // "__"
        case 'b':
          if (!memcmp(BuiltinName+3, "uiltin_", 7)) {
            switch (BuiltinName[10]) {  // "__builtin_"
            case 'f':
              if (!memcmp(BuiltinName+11, "lt_rounds", 9))
                IntrinsicID = Intrinsic::flt_rounds;
              break;
            case 's':
              if (!memcmp(BuiltinName+11, "tack_save", 9))
                IntrinsicID = Intrinsic::stacksave;
              break;
            }
          }
          break;
        case 's':
          if (!memcmp(BuiltinName+3, "ync_fetch_and_", 14)) {
            switch (BuiltinName[17]) {  // "__sync_fetch_and_"
            case 'a':
              switch (BuiltinName[18]) {  // "__sync_fetch_and_a"
              case 'd':
                if (!memcmp(BuiltinName+19, "d", 1))
                  IntrinsicID = Intrinsic::atomic_load_add;
                break;
              case 'n':
                if (!memcmp(BuiltinName+19, "d", 1))
                  IntrinsicID = Intrinsic::atomic_load_and;
                break;
              }
              break;
            case 'm':
              switch (BuiltinName[18]) {  // "__sync_fetch_and_m"
              case 'a':
                if (!memcmp(BuiltinName+19, "x", 1))
                  IntrinsicID = Intrinsic::atomic_load_max;
                break;
              case 'i':
                if (!memcmp(BuiltinName+19, "n", 1))
                  IntrinsicID = Intrinsic::atomic_load_min;
                break;
              }
              break;
            case 's':
              if (!memcmp(BuiltinName+18, "ub", 2))
                IntrinsicID = Intrinsic::atomic_load_sub;
              break;
            case 'x':
              if (!memcmp(BuiltinName+18, "or", 2))
                IntrinsicID = Intrinsic::atomic_load_xor;
              break;
            }
          }
          break;
        }
      }
      break;
    case 21:
      if (!memcmp(BuiltinName, "__", 2)) {
        switch (BuiltinName[2]) {  // "__"
        case 'b':
          if (!memcmp(BuiltinName+3, "uiltin_", 7)) {
            switch (BuiltinName[10]) {  // "__builtin_"
            case 'o':
              if (!memcmp(BuiltinName+11, "bject_size", 10))
                IntrinsicID = Intrinsic::objectsize;
              break;
            case 'u':
              if (!memcmp(BuiltinName+11, "nwind_init", 10))
                IntrinsicID = Intrinsic::eh_unwind_init;
              break;
            }
          }
          break;
        case 's':
          if (!memcmp(BuiltinName+3, "ync_fetch_and_", 14)) {
            switch (BuiltinName[17]) {  // "__sync_fetch_and_"
            case 'n':
              if (!memcmp(BuiltinName+18, "and", 3))
                IntrinsicID = Intrinsic::atomic_load_nand;
              break;
            case 'u':
              if (!memcmp(BuiltinName+18, "m", 1)) {
                switch (BuiltinName[19]) {  // "__sync_fetch_and_um"
                case 'a':
                  if (!memcmp(BuiltinName+20, "x", 1))
                    IntrinsicID = Intrinsic::atomic_load_umax;
                  break;
                case 'i':
                  if (!memcmp(BuiltinName+20, "n", 1))
                    IntrinsicID = Intrinsic::atomic_load_umin;
                  break;
                }
              }
              break;
            }
          }
          break;
        }
      }
      break;
    case 23:
      if (!memcmp(BuiltinName, "__builtin_stack_restore", 23))
        IntrinsicID = Intrinsic::stackrestore;
      break;
    case 24:
      if (!memcmp(BuiltinName, "__sync_lock_test_and_set", 24))
        IntrinsicID = Intrinsic::atomic_swap;
      break;
    case 25:
      if (!memcmp(BuiltinName, "__builtin_init_trampoline", 25))
        IntrinsicID = Intrinsic::init_trampoline;
      break;
    case 27:
      if (!memcmp(BuiltinName, "__sync_val_compare_and_swap", 27))
        IntrinsicID = Intrinsic::atomic_cmp_swap;
      break;
    case 29:
      if (!memcmp(BuiltinName, "__builtin_llvm_memory_barrier", 29))
        IntrinsicID = Intrinsic::memory_barrier;
      break;
    }
  }
  if (!strcmp(TargetPrefix, "alpha")) {
    switch (strlen(BuiltinName)) {
    default: break;
    case 21:
      if (!memcmp(BuiltinName, "__builtin_alpha_umulh", 21))
        IntrinsicID = Intrinsic::alpha_umulh;
      break;
    }
  }
  if (!strcmp(TargetPrefix, "arm")) {
    switch (strlen(BuiltinName)) {
    default: break;
    case 18:
      if (!memcmp(BuiltinName, "__builtin_arm_", 14)) {
        switch (BuiltinName[14]) {  // "__builtin_arm_"
        case 'q':
          switch (BuiltinName[15]) {  // "__builtin_arm_q"
          case 'a':
            if (!memcmp(BuiltinName+16, "dd", 2))
              IntrinsicID = Intrinsic::arm_qadd;
            break;
          case 's':
            if (!memcmp(BuiltinName+16, "ub", 2))
              IntrinsicID = Intrinsic::arm_qsub;
            break;
          }
          break;
        case 's':
          if (!memcmp(BuiltinName+15, "sat", 3))
            IntrinsicID = Intrinsic::arm_ssat;
          break;
        case 'u':
          if (!memcmp(BuiltinName+15, "sat", 3))
            IntrinsicID = Intrinsic::arm_usat;
          break;
        }
      }
      break;
    case 23:
      if (!memcmp(BuiltinName, "__builtin_arm_", 14)) {
        switch (BuiltinName[14]) {  // "__builtin_arm_"
        case 'g':
          if (!memcmp(BuiltinName+15, "et_fpscr", 8))
            IntrinsicID = Intrinsic::arm_get_fpscr;
          break;
        case 's':
          if (!memcmp(BuiltinName+15, "et_fpscr", 8))
            IntrinsicID = Intrinsic::arm_set_fpscr;
          break;
        }
      }
      break;
    case 24:
      if (!memcmp(BuiltinName, "__builtin_thread_pointer", 24))
        IntrinsicID = Intrinsic::arm_thread_pointer;
      break;
    }
  }
  if (!strcmp(TargetPrefix, "ppc")) {
    switch (strlen(BuiltinName)) {
    default: break;
    case 21:
      if (!memcmp(BuiltinName, "__builtin_altivec_", 18)) {
        switch (BuiltinName[18]) {  // "__builtin_altivec_"
        case 'd':
          if (!memcmp(BuiltinName+19, "s", 1)) {
            switch (BuiltinName[20]) {  // "__builtin_altivec_ds"
            case 's':
              IntrinsicID = Intrinsic::ppc_altivec_dss;
              break;
            case 't':
              IntrinsicID = Intrinsic::ppc_altivec_dst;
              break;
            }
          }
          break;
        case 'v':
          if (!memcmp(BuiltinName+19, "s", 1)) {
            switch (BuiltinName[20]) {  // "__builtin_altivec_vs"
            case 'l':
              IntrinsicID = Intrinsic::ppc_altivec_vsl;
              break;
            case 'r':
              IntrinsicID = Intrinsic::ppc_altivec_vsr;
              break;
            }
          }
          break;
        }
      }
      break;
    case 22:
      if (!memcmp(BuiltinName, "__builtin_altivec_", 18)) {
        switch (BuiltinName[18]) {  // "__builtin_altivec_"
        case 'd':
          if (!memcmp(BuiltinName+19, "stt", 3))
            IntrinsicID = Intrinsic::ppc_altivec_dstt;
          break;
        case 'v':
          switch (BuiltinName[19]) {  // "__builtin_altivec_v"
          case 'r':
            if (!memcmp(BuiltinName+20, "l", 1)) {
              switch (BuiltinName[21]) {  // "__builtin_altivec_vrl"
              case 'b':
                IntrinsicID = Intrinsic::ppc_altivec_vrlb;
                break;
              case 'h':
                IntrinsicID = Intrinsic::ppc_altivec_vrlh;
                break;
              case 'w':
                IntrinsicID = Intrinsic::ppc_altivec_vrlw;
                break;
              }
            }
            break;
          case 's':
            switch (BuiltinName[20]) {  // "__builtin_altivec_vs"
            case 'l':
              switch (BuiltinName[21]) {  // "__builtin_altivec_vsl"
              case 'b':
                IntrinsicID = Intrinsic::ppc_altivec_vslb;
                break;
              case 'h':
                IntrinsicID = Intrinsic::ppc_altivec_vslh;
                break;
              case 'o':
                IntrinsicID = Intrinsic::ppc_altivec_vslo;
                break;
              case 'w':
                IntrinsicID = Intrinsic::ppc_altivec_vslw;
                break;
              }
              break;
            case 'r':
              switch (BuiltinName[21]) {  // "__builtin_altivec_vsr"
              case 'b':
                IntrinsicID = Intrinsic::ppc_altivec_vsrb;
                break;
              case 'h':
                IntrinsicID = Intrinsic::ppc_altivec_vsrh;
                break;
              case 'o':
                IntrinsicID = Intrinsic::ppc_altivec_vsro;
                break;
              case 'w':
                IntrinsicID = Intrinsic::ppc_altivec_vsrw;
                break;
              }
              break;
            }
            break;
          }
          break;
        }
      }
      break;
    case 23:
      if (!memcmp(BuiltinName, "__builtin_altivec_", 18)) {
        switch (BuiltinName[18]) {  // "__builtin_altivec_"
        case 'd':
          if (!memcmp(BuiltinName+19, "stst", 4))
            IntrinsicID = Intrinsic::ppc_altivec_dstst;
          break;
        case 'v':
          switch (BuiltinName[19]) {  // "__builtin_altivec_v"
          case 'c':
            if (!memcmp(BuiltinName+20, "f", 1)) {
              switch (BuiltinName[21]) {  // "__builtin_altivec_vcf"
              case 's':
                if (!memcmp(BuiltinName+22, "x", 1))
                  IntrinsicID = Intrinsic::ppc_altivec_vcfsx;
                break;
              case 'u':
                if (!memcmp(BuiltinName+22, "x", 1))
                  IntrinsicID = Intrinsic::ppc_altivec_vcfux;
                break;
              }
            }
            break;
          case 'p':
            if (!memcmp(BuiltinName+20, "kpx", 3))
              IntrinsicID = Intrinsic::ppc_altivec_vpkpx;
            break;
          case 'r':
            switch (BuiltinName[20]) {  // "__builtin_altivec_vr"
            case 'e':
              if (!memcmp(BuiltinName+21, "fp", 2))
                IntrinsicID = Intrinsic::ppc_altivec_vrefp;
              break;
            case 'f':
              if (!memcmp(BuiltinName+21, "i", 1)) {
                switch (BuiltinName[22]) {  // "__builtin_altivec_vrfi"
                case 'm':
                  IntrinsicID = Intrinsic::ppc_altivec_vrfim;
                  break;
                case 'n':
                  IntrinsicID = Intrinsic::ppc_altivec_vrfin;
                  break;
                case 'p':
                  IntrinsicID = Intrinsic::ppc_altivec_vrfip;
                  break;
                case 'z':
                  IntrinsicID = Intrinsic::ppc_altivec_vrfiz;
                  break;
                }
              }
              break;
            }
            break;
          case 's':
            if (!memcmp(BuiltinName+20, "ra", 2)) {
              switch (BuiltinName[22]) {  // "__builtin_altivec_vsra"
              case 'b':
                IntrinsicID = Intrinsic::ppc_altivec_vsrab;
                break;
              case 'h':
                IntrinsicID = Intrinsic::ppc_altivec_vsrah;
                break;
              case 'w':
                IntrinsicID = Intrinsic::ppc_altivec_vsraw;
                break;
              }
            }
            break;
          }
          break;
        }
      }
      break;
    case 24:
      if (!memcmp(BuiltinName, "__builtin_altivec_", 18)) {
        switch (BuiltinName[18]) {  // "__builtin_altivec_"
        case 'd':
          if (!memcmp(BuiltinName+19, "s", 1)) {
            switch (BuiltinName[20]) {  // "__builtin_altivec_ds"
            case 's':
              if (!memcmp(BuiltinName+21, "all", 3))
                IntrinsicID = Intrinsic::ppc_altivec_dssall;
              break;
            case 't':
              if (!memcmp(BuiltinName+21, "stt", 3))
                IntrinsicID = Intrinsic::ppc_altivec_dststt;
              break;
            }
          }
          break;
        case 'm':
          switch (BuiltinName[19]) {  // "__builtin_altivec_m"
          case 'f':
            if (!memcmp(BuiltinName+20, "vscr", 4))
              IntrinsicID = Intrinsic::ppc_altivec_mfvscr;
            break;
          case 't':
            if (!memcmp(BuiltinName+20, "vscr", 4))
              IntrinsicID = Intrinsic::ppc_altivec_mtvscr;
            break;
          }
          break;
        case 'v':
          switch (BuiltinName[19]) {  // "__builtin_altivec_v"
          case 'a':
            if (!memcmp(BuiltinName+20, "vg", 2)) {
              switch (BuiltinName[22]) {  // "__builtin_altivec_vavg"
              case 's':
                switch (BuiltinName[23]) {  // "__builtin_altivec_vavgs"
                case 'b':
                  IntrinsicID = Intrinsic::ppc_altivec_vavgsb;
                  break;
                case 'h':
                  IntrinsicID = Intrinsic::ppc_altivec_vavgsh;
                  break;
                case 'w':
                  IntrinsicID = Intrinsic::ppc_altivec_vavgsw;
                  break;
                }
                break;
              case 'u':
                switch (BuiltinName[23]) {  // "__builtin_altivec_vavgu"
                case 'b':
                  IntrinsicID = Intrinsic::ppc_altivec_vavgub;
                  break;
                case 'h':
                  IntrinsicID = Intrinsic::ppc_altivec_vavguh;
                  break;
                case 'w':
                  IntrinsicID = Intrinsic::ppc_altivec_vavguw;
                  break;
                }
                break;
              }
            }
            break;
          case 'c':
            if (!memcmp(BuiltinName+20, "t", 1)) {
              switch (BuiltinName[21]) {  // "__builtin_altivec_vct"
              case 's':
                if (!memcmp(BuiltinName+22, "xs", 2))
                  IntrinsicID = Intrinsic::ppc_altivec_vctsxs;
                break;
              case 'u':
                if (!memcmp(BuiltinName+22, "xs", 2))
                  IntrinsicID = Intrinsic::ppc_altivec_vctuxs;
                break;
              }
            }
            break;
          case 'm':
            switch (BuiltinName[20]) {  // "__builtin_altivec_vm"
            case 'a':
              if (!memcmp(BuiltinName+21, "x", 1)) {
                switch (BuiltinName[22]) {  // "__builtin_altivec_vmax"
                case 'f':
                  if (!memcmp(BuiltinName+23, "p", 1))
                    IntrinsicID = Intrinsic::ppc_altivec_vmaxfp;
                  break;
                case 's':
                  switch (BuiltinName[23]) {  // "__builtin_altivec_vmaxs"
                  case 'b':
                    IntrinsicID = Intrinsic::ppc_altivec_vmaxsb;
                    break;
                  case 'h':
                    IntrinsicID = Intrinsic::ppc_altivec_vmaxsh;
                    break;
                  case 'w':
                    IntrinsicID = Intrinsic::ppc_altivec_vmaxsw;
                    break;
                  }
                  break;
                case 'u':
                  switch (BuiltinName[23]) {  // "__builtin_altivec_vmaxu"
                  case 'b':
                    IntrinsicID = Intrinsic::ppc_altivec_vmaxub;
                    break;
                  case 'h':
                    IntrinsicID = Intrinsic::ppc_altivec_vmaxuh;
                    break;
                  case 'w':
                    IntrinsicID = Intrinsic::ppc_altivec_vmaxuw;
                    break;
                  }
                  break;
                }
              }
              break;
            case 'i':
              if (!memcmp(BuiltinName+21, "n", 1)) {
                switch (BuiltinName[22]) {  // "__builtin_altivec_vmin"
                case 'f':
                  if (!memcmp(BuiltinName+23, "p", 1))
                    IntrinsicID = Intrinsic::ppc_altivec_vminfp;
                  break;
                case 's':
                  switch (BuiltinName[23]) {  // "__builtin_altivec_vmins"
                  case 'b':
                    IntrinsicID = Intrinsic::ppc_altivec_vminsb;
                    break;
                  case 'h':
                    IntrinsicID = Intrinsic::ppc_altivec_vminsh;
                    break;
                  case 'w':
                    IntrinsicID = Intrinsic::ppc_altivec_vminsw;
                    break;
                  }
                  break;
                case 'u':
                  switch (BuiltinName[23]) {  // "__builtin_altivec_vminu"
                  case 'b':
                    IntrinsicID = Intrinsic::ppc_altivec_vminub;
                    break;
                  case 'h':
                    IntrinsicID = Intrinsic::ppc_altivec_vminuh;
                    break;
                  case 'w':
                    IntrinsicID = Intrinsic::ppc_altivec_vminuw;
                    break;
                  }
                  break;
                }
              }
              break;
            }
            break;
          }
          break;
        }
      }
      break;
    case 25:
      if (!memcmp(BuiltinName, "__builtin_altivec_v", 19)) {
        switch (BuiltinName[19]) {  // "__builtin_altivec_v"
        case 'a':
          if (!memcmp(BuiltinName+20, "dd", 2)) {
            switch (BuiltinName[22]) {  // "__builtin_altivec_vadd"
            case 'c':
              if (!memcmp(BuiltinName+23, "uw", 2))
                IntrinsicID = Intrinsic::ppc_altivec_vaddcuw;
              break;
            case 's':
              switch (BuiltinName[23]) {  // "__builtin_altivec_vadds"
              case 'b':
                if (!memcmp(BuiltinName+24, "s", 1))
                  IntrinsicID = Intrinsic::ppc_altivec_vaddsbs;
                break;
              case 'h':
                if (!memcmp(BuiltinName+24, "s", 1))
                  IntrinsicID = Intrinsic::ppc_altivec_vaddshs;
                break;
              case 'w':
                if (!memcmp(BuiltinName+24, "s", 1))
                  IntrinsicID = Intrinsic::ppc_altivec_vaddsws;
                break;
              }
              break;
            case 'u':
              switch (BuiltinName[23]) {  // "__builtin_altivec_vaddu"
              case 'b':
                if (!memcmp(BuiltinName+24, "s", 1))
                  IntrinsicID = Intrinsic::ppc_altivec_vaddubs;
                break;
              case 'h':
                if (!memcmp(BuiltinName+24, "s", 1))
                  IntrinsicID = Intrinsic::ppc_altivec_vadduhs;
                break;
              case 'w':
                if (!memcmp(BuiltinName+24, "s", 1))
                  IntrinsicID = Intrinsic::ppc_altivec_vadduws;
                break;
              }
              break;
            }
          }
          break;
        case 'c':
          if (!memcmp(BuiltinName+20, "mpbfp", 5))
            IntrinsicID = Intrinsic::ppc_altivec_vcmpbfp;
          break;
        case 'l':
          if (!memcmp(BuiltinName+20, "ogefp", 5))
            IntrinsicID = Intrinsic::ppc_altivec_vlogefp;
          break;
        case 'm':
          switch (BuiltinName[20]) {  // "__builtin_altivec_vm"
          case 'a':
            if (!memcmp(BuiltinName+21, "ddfp", 4))
              IntrinsicID = Intrinsic::ppc_altivec_vmaddfp;
            break;
          case 'u':
            if (!memcmp(BuiltinName+21, "l", 1)) {
              switch (BuiltinName[22]) {  // "__builtin_altivec_vmul"
              case 'e':
                switch (BuiltinName[23]) {  // "__builtin_altivec_vmule"
                case 's':
                  switch (BuiltinName[24]) {  // "__builtin_altivec_vmules"
                  case 'b':
                    IntrinsicID = Intrinsic::ppc_altivec_vmulesb;
                    break;
                  case 'h':
                    IntrinsicID = Intrinsic::ppc_altivec_vmulesh;
                    break;
                  }
                  break;
                case 'u':
                  switch (BuiltinName[24]) {  // "__builtin_altivec_vmuleu"
                  case 'b':
                    IntrinsicID = Intrinsic::ppc_altivec_vmuleub;
                    break;
                  case 'h':
                    IntrinsicID = Intrinsic::ppc_altivec_vmuleuh;
                    break;
                  }
                  break;
                }
                break;
              case 'o':
                switch (BuiltinName[23]) {  // "__builtin_altivec_vmulo"
                case 's':
                  switch (BuiltinName[24]) {  // "__builtin_altivec_vmulos"
                  case 'b':
                    IntrinsicID = Intrinsic::ppc_altivec_vmulosb;
                    break;
                  case 'h':
                    IntrinsicID = Intrinsic::ppc_altivec_vmulosh;
                    break;
                  }
                  break;
                case 'u':
                  switch (BuiltinName[24]) {  // "__builtin_altivec_vmulou"
                  case 'b':
                    IntrinsicID = Intrinsic::ppc_altivec_vmuloub;
                    break;
                  case 'h':
                    IntrinsicID = Intrinsic::ppc_altivec_vmulouh;
                    break;
                  }
                  break;
                }
                break;
              }
            }
            break;
          }
          break;
        case 'p':
          if (!memcmp(BuiltinName+20, "k", 1)) {
            switch (BuiltinName[21]) {  // "__builtin_altivec_vpk"
            case 's':
              switch (BuiltinName[22]) {  // "__builtin_altivec_vpks"
              case 'h':
                switch (BuiltinName[23]) {  // "__builtin_altivec_vpksh"
                case 's':
                  if (!memcmp(BuiltinName+24, "s", 1))
                    IntrinsicID = Intrinsic::ppc_altivec_vpkshss;
                  break;
                case 'u':
                  if (!memcmp(BuiltinName+24, "s", 1))
                    IntrinsicID = Intrinsic::ppc_altivec_vpkshus;
                  break;
                }
                break;
              case 'w':
                switch (BuiltinName[23]) {  // "__builtin_altivec_vpksw"
                case 's':
                  if (!memcmp(BuiltinName+24, "s", 1))
                    IntrinsicID = Intrinsic::ppc_altivec_vpkswss;
                  break;
                case 'u':
                  if (!memcmp(BuiltinName+24, "s", 1))
                    IntrinsicID = Intrinsic::ppc_altivec_vpkswus;
                  break;
                }
                break;
              }
              break;
            case 'u':
              switch (BuiltinName[22]) {  // "__builtin_altivec_vpku"
              case 'h':
                if (!memcmp(BuiltinName+23, "us", 2))
                  IntrinsicID = Intrinsic::ppc_altivec_vpkuhus;
                break;
              case 'w':
                if (!memcmp(BuiltinName+23, "us", 2))
                  IntrinsicID = Intrinsic::ppc_altivec_vpkuwus;
                break;
              }
              break;
            }
          }
          break;
        case 's':
          if (!memcmp(BuiltinName+20, "u", 1)) {
            switch (BuiltinName[21]) {  // "__builtin_altivec_vsu"
            case 'b':
              switch (BuiltinName[22]) {  // "__builtin_altivec_vsub"
              case 'c':
                if (!memcmp(BuiltinName+23, "uw", 2))
                  IntrinsicID = Intrinsic::ppc_altivec_vsubcuw;
                break;
              case 's':
                switch (BuiltinName[23]) {  // "__builtin_altivec_vsubs"
                case 'b':
                  if (!memcmp(BuiltinName+24, "s", 1))
                    IntrinsicID = Intrinsic::ppc_altivec_vsubsbs;
                  break;
                case 'h':
                  if (!memcmp(BuiltinName+24, "s", 1))
                    IntrinsicID = Intrinsic::ppc_altivec_vsubshs;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+24, "s", 1))
                    IntrinsicID = Intrinsic::ppc_altivec_vsubsws;
                  break;
                }
                break;
              case 'u':
                switch (BuiltinName[23]) {  // "__builtin_altivec_vsubu"
                case 'b':
                  if (!memcmp(BuiltinName+24, "s", 1))
                    IntrinsicID = Intrinsic::ppc_altivec_vsububs;
                  break;
                case 'h':
                  if (!memcmp(BuiltinName+24, "s", 1))
                    IntrinsicID = Intrinsic::ppc_altivec_vsubuhs;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+24, "s", 1))
                    IntrinsicID = Intrinsic::ppc_altivec_vsubuws;
                  break;
                }
                break;
              }
              break;
            case 'm':
              if (!memcmp(BuiltinName+22, "sws", 3))
                IntrinsicID = Intrinsic::ppc_altivec_vsumsws;
              break;
            }
          }
          break;
        case 'u':
          if (!memcmp(BuiltinName+20, "pk", 2)) {
            switch (BuiltinName[22]) {  // "__builtin_altivec_vupk"
            case 'h':
              switch (BuiltinName[23]) {  // "__builtin_altivec_vupkh"
              case 'p':
                if (!memcmp(BuiltinName+24, "x", 1))
                  IntrinsicID = Intrinsic::ppc_altivec_vupkhpx;
                break;
              case 's':
                switch (BuiltinName[24]) {  // "__builtin_altivec_vupkhs"
                case 'b':
                  IntrinsicID = Intrinsic::ppc_altivec_vupkhsb;
                  break;
                case 'h':
                  IntrinsicID = Intrinsic::ppc_altivec_vupkhsh;
                  break;
                }
                break;
              }
              break;
            case 'l':
              switch (BuiltinName[23]) {  // "__builtin_altivec_vupkl"
              case 'p':
                if (!memcmp(BuiltinName+24, "x", 1))
                  IntrinsicID = Intrinsic::ppc_altivec_vupklpx;
                break;
              case 's':
                switch (BuiltinName[24]) {  // "__builtin_altivec_vupkls"
                case 'b':
                  IntrinsicID = Intrinsic::ppc_altivec_vupklsb;
                  break;
                case 'h':
                  IntrinsicID = Intrinsic::ppc_altivec_vupklsh;
                  break;
                }
                break;
              }
              break;
            }
          }
          break;
        }
      }
      break;
    case 26:
      if (!memcmp(BuiltinName, "__builtin_altivec_v", 19)) {
        switch (BuiltinName[19]) {  // "__builtin_altivec_v"
        case 'c':
          if (!memcmp(BuiltinName+20, "mp", 2)) {
            switch (BuiltinName[22]) {  // "__builtin_altivec_vcmp"
            case 'e':
              if (!memcmp(BuiltinName+23, "q", 1)) {
                switch (BuiltinName[24]) {  // "__builtin_altivec_vcmpeq"
                case 'f':
                  if (!memcmp(BuiltinName+25, "p", 1))
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpeqfp;
                  break;
                case 'u':
                  switch (BuiltinName[25]) {  // "__builtin_altivec_vcmpequ"
                  case 'b':
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpequb;
                    break;
                  case 'h':
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpequh;
                    break;
                  case 'w':
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpequw;
                    break;
                  }
                  break;
                }
              }
              break;
            case 'g':
              switch (BuiltinName[23]) {  // "__builtin_altivec_vcmpg"
              case 'e':
                if (!memcmp(BuiltinName+24, "fp", 2))
                  IntrinsicID = Intrinsic::ppc_altivec_vcmpgefp;
                break;
              case 't':
                switch (BuiltinName[24]) {  // "__builtin_altivec_vcmpgt"
                case 'f':
                  if (!memcmp(BuiltinName+25, "p", 1))
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtfp;
                  break;
                case 's':
                  switch (BuiltinName[25]) {  // "__builtin_altivec_vcmpgts"
                  case 'b':
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsb;
                    break;
                  case 'h':
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsh;
                    break;
                  case 'w':
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsw;
                    break;
                  }
                  break;
                case 'u':
                  switch (BuiltinName[25]) {  // "__builtin_altivec_vcmpgtu"
                  case 'b':
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtub;
                    break;
                  case 'h':
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtuh;
                    break;
                  case 'w':
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtuw;
                    break;
                  }
                  break;
                }
                break;
              }
              break;
            }
          }
          break;
        case 'e':
          if (!memcmp(BuiltinName+20, "xptefp", 6))
            IntrinsicID = Intrinsic::ppc_altivec_vexptefp;
          break;
        case 'm':
          if (!memcmp(BuiltinName+20, "sum", 3)) {
            switch (BuiltinName[23]) {  // "__builtin_altivec_vmsum"
            case 'm':
              if (!memcmp(BuiltinName+24, "bm", 2))
                IntrinsicID = Intrinsic::ppc_altivec_vmsummbm;
              break;
            case 's':
              if (!memcmp(BuiltinName+24, "h", 1)) {
                switch (BuiltinName[25]) {  // "__builtin_altivec_vmsumsh"
                case 'm':
                  IntrinsicID = Intrinsic::ppc_altivec_vmsumshm;
                  break;
                case 's':
                  IntrinsicID = Intrinsic::ppc_altivec_vmsumshs;
                  break;
                }
              }
              break;
            case 'u':
              switch (BuiltinName[24]) {  // "__builtin_altivec_vmsumu"
              case 'b':
                if (!memcmp(BuiltinName+25, "m", 1))
                  IntrinsicID = Intrinsic::ppc_altivec_vmsumubm;
                break;
              case 'h':
                switch (BuiltinName[25]) {  // "__builtin_altivec_vmsumuh"
                case 'm':
                  IntrinsicID = Intrinsic::ppc_altivec_vmsumuhm;
                  break;
                case 's':
                  IntrinsicID = Intrinsic::ppc_altivec_vmsumuhs;
                  break;
                }
                break;
              }
              break;
            }
          }
          break;
        case 'n':
          if (!memcmp(BuiltinName+20, "msubfp", 6))
            IntrinsicID = Intrinsic::ppc_altivec_vnmsubfp;
          break;
        case 's':
          switch (BuiltinName[20]) {  // "__builtin_altivec_vs"
          case 'e':
            if (!memcmp(BuiltinName+21, "l_4si", 5))
              IntrinsicID = Intrinsic::ppc_altivec_vsel;
            break;
          case 'u':
            if (!memcmp(BuiltinName+21, "m", 1)) {
              switch (BuiltinName[22]) {  // "__builtin_altivec_vsum"
              case '2':
                if (!memcmp(BuiltinName+23, "sws", 3))
                  IntrinsicID = Intrinsic::ppc_altivec_vsum2sws;
                break;
              case '4':
                switch (BuiltinName[23]) {  // "__builtin_altivec_vsum4"
                case 's':
                  switch (BuiltinName[24]) {  // "__builtin_altivec_vsum4s"
                  case 'b':
                    if (!memcmp(BuiltinName+25, "s", 1))
                      IntrinsicID = Intrinsic::ppc_altivec_vsum4sbs;
                    break;
                  case 'h':
                    if (!memcmp(BuiltinName+25, "s", 1))
                      IntrinsicID = Intrinsic::ppc_altivec_vsum4shs;
                    break;
                  }
                  break;
                case 'u':
                  if (!memcmp(BuiltinName+24, "bs", 2))
                    IntrinsicID = Intrinsic::ppc_altivec_vsum4ubs;
                  break;
                }
                break;
              }
            }
            break;
          }
          break;
        }
      }
      break;
    case 27:
      if (!memcmp(BuiltinName, "__builtin_altivec_v", 19)) {
        switch (BuiltinName[19]) {  // "__builtin_altivec_v"
        case 'c':
          if (!memcmp(BuiltinName+20, "mpbfp_p", 7))
            IntrinsicID = Intrinsic::ppc_altivec_vcmpbfp_p;
          break;
        case 'm':
          switch (BuiltinName[20]) {  // "__builtin_altivec_vm"
          case 'h':
            if (!memcmp(BuiltinName+21, "addshs", 6))
              IntrinsicID = Intrinsic::ppc_altivec_vmhaddshs;
            break;
          case 'l':
            if (!memcmp(BuiltinName+21, "adduhm", 6))
              IntrinsicID = Intrinsic::ppc_altivec_vmladduhm;
            break;
          }
          break;
        case 'p':
          if (!memcmp(BuiltinName+20, "erm_4si", 7))
            IntrinsicID = Intrinsic::ppc_altivec_vperm;
          break;
        case 'r':
          if (!memcmp(BuiltinName+20, "sqrtefp", 7))
            IntrinsicID = Intrinsic::ppc_altivec_vrsqrtefp;
          break;
        }
      }
      break;
    case 28:
      if (!memcmp(BuiltinName, "__builtin_altivec_v", 19)) {
        switch (BuiltinName[19]) {  // "__builtin_altivec_v"
        case 'c':
          if (!memcmp(BuiltinName+20, "mp", 2)) {
            switch (BuiltinName[22]) {  // "__builtin_altivec_vcmp"
            case 'e':
              if (!memcmp(BuiltinName+23, "q", 1)) {
                switch (BuiltinName[24]) {  // "__builtin_altivec_vcmpeq"
                case 'f':
                  if (!memcmp(BuiltinName+25, "p_p", 3))
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpeqfp_p;
                  break;
                case 'u':
                  switch (BuiltinName[25]) {  // "__builtin_altivec_vcmpequ"
                  case 'b':
                    if (!memcmp(BuiltinName+26, "_p", 2))
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpequb_p;
                    break;
                  case 'h':
                    if (!memcmp(BuiltinName+26, "_p", 2))
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpequh_p;
                    break;
                  case 'w':
                    if (!memcmp(BuiltinName+26, "_p", 2))
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpequw_p;
                    break;
                  }
                  break;
                }
              }
              break;
            case 'g':
              switch (BuiltinName[23]) {  // "__builtin_altivec_vcmpg"
              case 'e':
                if (!memcmp(BuiltinName+24, "fp_p", 4))
                  IntrinsicID = Intrinsic::ppc_altivec_vcmpgefp_p;
                break;
              case 't':
                switch (BuiltinName[24]) {  // "__builtin_altivec_vcmpgt"
                case 'f':
                  if (!memcmp(BuiltinName+25, "p_p", 3))
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtfp_p;
                  break;
                case 's':
                  switch (BuiltinName[25]) {  // "__builtin_altivec_vcmpgts"
                  case 'b':
                    if (!memcmp(BuiltinName+26, "_p", 2))
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsb_p;
                    break;
                  case 'h':
                    if (!memcmp(BuiltinName+26, "_p", 2))
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsh_p;
                    break;
                  case 'w':
                    if (!memcmp(BuiltinName+26, "_p", 2))
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsw_p;
                    break;
                  }
                  break;
                case 'u':
                  switch (BuiltinName[25]) {  // "__builtin_altivec_vcmpgtu"
                  case 'b':
                    if (!memcmp(BuiltinName+26, "_p", 2))
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpgtub_p;
                    break;
                  case 'h':
                    if (!memcmp(BuiltinName+26, "_p", 2))
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpgtuh_p;
                    break;
                  case 'w':
                    if (!memcmp(BuiltinName+26, "_p", 2))
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpgtuw_p;
                    break;
                  }
                  break;
                }
                break;
              }
              break;
            }
          }
          break;
        case 'm':
          if (!memcmp(BuiltinName+20, "hraddshs", 8))
            IntrinsicID = Intrinsic::ppc_altivec_vmhraddshs;
          break;
        }
      }
      break;
    }
  }
  if (!strcmp(TargetPrefix, "spu")) {
    switch (strlen(BuiltinName)) {
    default: break;
    case 14:
      if (!memcmp(BuiltinName, "__builtin_si_a", 14))
        IntrinsicID = Intrinsic::spu_si_a;
      break;
    case 15:
      if (!memcmp(BuiltinName, "__builtin_si_", 13)) {
        switch (BuiltinName[13]) {  // "__builtin_si_"
        case 'a':
          switch (BuiltinName[14]) {  // "__builtin_si_a"
          case 'h':
            IntrinsicID = Intrinsic::spu_si_ah;
            break;
          case 'i':
            IntrinsicID = Intrinsic::spu_si_ai;
            break;
          }
          break;
        case 'b':
          if (!memcmp(BuiltinName+14, "g", 1))
            IntrinsicID = Intrinsic::spu_si_bg;
          break;
        case 'c':
          if (!memcmp(BuiltinName+14, "g", 1))
            IntrinsicID = Intrinsic::spu_si_cg;
          break;
        case 'f':
          switch (BuiltinName[14]) {  // "__builtin_si_f"
          case 'a':
            IntrinsicID = Intrinsic::spu_si_fa;
            break;
          case 'm':
            IntrinsicID = Intrinsic::spu_si_fm;
            break;
          case 's':
            IntrinsicID = Intrinsic::spu_si_fs;
            break;
          }
          break;
        case 'o':
          if (!memcmp(BuiltinName+14, "r", 1))
            IntrinsicID = Intrinsic::spu_si_or;
          break;
        case 's':
          if (!memcmp(BuiltinName+14, "f", 1))
            IntrinsicID = Intrinsic::spu_si_sf;
          break;
        }
      }
      break;
    case 16:
      if (!memcmp(BuiltinName, "__builtin_si_", 13)) {
        switch (BuiltinName[13]) {  // "__builtin_si_"
        case 'a':
          switch (BuiltinName[14]) {  // "__builtin_si_a"
          case 'h':
            if (!memcmp(BuiltinName+15, "i", 1))
              IntrinsicID = Intrinsic::spu_si_ahi;
            break;
          case 'n':
            if (!memcmp(BuiltinName+15, "d", 1))
              IntrinsicID = Intrinsic::spu_si_and;
            break;
          }
          break;
        case 'b':
          if (!memcmp(BuiltinName+14, "gx", 2))
            IntrinsicID = Intrinsic::spu_si_bgx;
          break;
        case 'c':
          switch (BuiltinName[14]) {  // "__builtin_si_c"
          case 'e':
            if (!memcmp(BuiltinName+15, "q", 1))
              IntrinsicID = Intrinsic::spu_si_ceq;
            break;
          case 'g':
            switch (BuiltinName[15]) {  // "__builtin_si_cg"
            case 't':
              IntrinsicID = Intrinsic::spu_si_cgt;
              break;
            case 'x':
              IntrinsicID = Intrinsic::spu_si_cgx;
              break;
            }
            break;
          }
          break;
        case 'd':
          if (!memcmp(BuiltinName+14, "f", 1)) {
            switch (BuiltinName[15]) {  // "__builtin_si_df"
            case 'a':
              IntrinsicID = Intrinsic::spu_si_dfa;
              break;
            case 'm':
              IntrinsicID = Intrinsic::spu_si_dfm;
              break;
            case 's':
              IntrinsicID = Intrinsic::spu_si_dfs;
              break;
            }
          }
          break;
        case 'f':
          if (!memcmp(BuiltinName+14, "m", 1)) {
            switch (BuiltinName[15]) {  // "__builtin_si_fm"
            case 'a':
              IntrinsicID = Intrinsic::spu_si_fma;
              break;
            case 's':
              IntrinsicID = Intrinsic::spu_si_fms;
              break;
            }
          }
          break;
        case 'm':
          if (!memcmp(BuiltinName+14, "py", 2))
            IntrinsicID = Intrinsic::spu_si_mpy;
          break;
        case 'n':
          if (!memcmp(BuiltinName+14, "or", 2))
            IntrinsicID = Intrinsic::spu_si_nor;
          break;
        case 'o':
          if (!memcmp(BuiltinName+14, "r", 1)) {
            switch (BuiltinName[15]) {  // "__builtin_si_or"
            case 'c':
              IntrinsicID = Intrinsic::spu_si_orc;
              break;
            case 'i':
              IntrinsicID = Intrinsic::spu_si_ori;
              break;
            }
          }
          break;
        case 's':
          if (!memcmp(BuiltinName+14, "f", 1)) {
            switch (BuiltinName[15]) {  // "__builtin_si_sf"
            case 'h':
              IntrinsicID = Intrinsic::spu_si_sfh;
              break;
            case 'i':
              IntrinsicID = Intrinsic::spu_si_sfi;
              break;
            case 'x':
              IntrinsicID = Intrinsic::spu_si_sfx;
              break;
            }
          }
          break;
        case 'x':
          if (!memcmp(BuiltinName+14, "or", 2))
            IntrinsicID = Intrinsic::spu_si_xor;
          break;
        }
      }
      break;
    case 17:
      if (!memcmp(BuiltinName, "__builtin_si_", 13)) {
        switch (BuiltinName[13]) {  // "__builtin_si_"
        case 'a':
          switch (BuiltinName[14]) {  // "__builtin_si_a"
          case 'd':
            if (!memcmp(BuiltinName+15, "dx", 2))
              IntrinsicID = Intrinsic::spu_si_addx;
            break;
          case 'n':
            if (!memcmp(BuiltinName+15, "d", 1)) {
              switch (BuiltinName[16]) {  // "__builtin_si_and"
              case 'c':
                IntrinsicID = Intrinsic::spu_si_andc;
                break;
              case 'i':
                IntrinsicID = Intrinsic::spu_si_andi;
                break;
              }
            }
            break;
          }
          break;
        case 'c':
          switch (BuiltinName[14]) {  // "__builtin_si_c"
          case 'e':
            if (!memcmp(BuiltinName+15, "q", 1)) {
              switch (BuiltinName[16]) {  // "__builtin_si_ceq"
              case 'b':
                IntrinsicID = Intrinsic::spu_si_ceqb;
                break;
              case 'h':
                IntrinsicID = Intrinsic::spu_si_ceqh;
                break;
              case 'i':
                IntrinsicID = Intrinsic::spu_si_ceqi;
                break;
              }
            }
            break;
          case 'g':
            if (!memcmp(BuiltinName+15, "t", 1)) {
              switch (BuiltinName[16]) {  // "__builtin_si_cgt"
              case 'b':
                IntrinsicID = Intrinsic::spu_si_cgtb;
                break;
              case 'h':
                IntrinsicID = Intrinsic::spu_si_cgth;
                break;
              case 'i':
                IntrinsicID = Intrinsic::spu_si_cgti;
                break;
              }
            }
            break;
          case 'l':
            if (!memcmp(BuiltinName+15, "gt", 2))
              IntrinsicID = Intrinsic::spu_si_clgt;
            break;
          }
          break;
        case 'd':
          if (!memcmp(BuiltinName+14, "fm", 2)) {
            switch (BuiltinName[16]) {  // "__builtin_si_dfm"
            case 'a':
              IntrinsicID = Intrinsic::spu_si_dfma;
              break;
            case 's':
              IntrinsicID = Intrinsic::spu_si_dfms;
              break;
            }
          }
          break;
        case 'f':
          switch (BuiltinName[14]) {  // "__builtin_si_f"
          case 'c':
            switch (BuiltinName[15]) {  // "__builtin_si_fc"
            case 'e':
              if (!memcmp(BuiltinName+16, "q", 1))
                IntrinsicID = Intrinsic::spu_si_fceq;
              break;
            case 'g':
              if (!memcmp(BuiltinName+16, "t", 1))
                IntrinsicID = Intrinsic::spu_si_fcgt;
              break;
            }
            break;
          case 'n':
            if (!memcmp(BuiltinName+15, "ms", 2))
              IntrinsicID = Intrinsic::spu_si_fnms;
            break;
          }
          break;
        case 'm':
          if (!memcmp(BuiltinName+14, "py", 2)) {
            switch (BuiltinName[16]) {  // "__builtin_si_mpy"
            case 'a':
              IntrinsicID = Intrinsic::spu_si_mpya;
              break;
            case 'h':
              IntrinsicID = Intrinsic::spu_si_mpyh;
              break;
            case 'i':
              IntrinsicID = Intrinsic::spu_si_mpyi;
              break;
            case 's':
              IntrinsicID = Intrinsic::spu_si_mpys;
              break;
            case 'u':
              IntrinsicID = Intrinsic::spu_si_mpyu;
              break;
            }
          }
          break;
        case 'n':
          if (!memcmp(BuiltinName+14, "and", 3))
            IntrinsicID = Intrinsic::spu_si_nand;
          break;
        case 'o':
          if (!memcmp(BuiltinName+14, "r", 1)) {
            switch (BuiltinName[15]) {  // "__builtin_si_or"
            case 'b':
              if (!memcmp(BuiltinName+16, "i", 1))
                IntrinsicID = Intrinsic::spu_si_orbi;
              break;
            case 'h':
              if (!memcmp(BuiltinName+16, "i", 1))
                IntrinsicID = Intrinsic::spu_si_orhi;
              break;
            }
          }
          break;
        case 's':
          switch (BuiltinName[14]) {  // "__builtin_si_s"
          case 'f':
            if (!memcmp(BuiltinName+15, "hi", 2))
              IntrinsicID = Intrinsic::spu_si_sfhi;
            break;
          case 'h':
            if (!memcmp(BuiltinName+15, "li", 2))
              IntrinsicID = Intrinsic::spu_si_shli;
            break;
          }
          break;
        case 'x':
          if (!memcmp(BuiltinName+14, "ori", 3))
            IntrinsicID = Intrinsic::spu_si_xori;
          break;
        }
      }
      break;
    case 18:
      if (!memcmp(BuiltinName, "__builtin_si_", 13)) {
        switch (BuiltinName[13]) {  // "__builtin_si_"
        case 'a':
          if (!memcmp(BuiltinName+14, "nd", 2)) {
            switch (BuiltinName[16]) {  // "__builtin_si_and"
            case 'b':
              if (!memcmp(BuiltinName+17, "i", 1))
                IntrinsicID = Intrinsic::spu_si_andbi;
              break;
            case 'h':
              if (!memcmp(BuiltinName+17, "i", 1))
                IntrinsicID = Intrinsic::spu_si_andhi;
              break;
            }
          }
          break;
        case 'c':
          switch (BuiltinName[14]) {  // "__builtin_si_c"
          case 'e':
            if (!memcmp(BuiltinName+15, "q", 1)) {
              switch (BuiltinName[16]) {  // "__builtin_si_ceq"
              case 'b':
                if (!memcmp(BuiltinName+17, "i", 1))
                  IntrinsicID = Intrinsic::spu_si_ceqbi;
                break;
              case 'h':
                if (!memcmp(BuiltinName+17, "i", 1))
                  IntrinsicID = Intrinsic::spu_si_ceqhi;
                break;
              }
            }
            break;
          case 'g':
            if (!memcmp(BuiltinName+15, "t", 1)) {
              switch (BuiltinName[16]) {  // "__builtin_si_cgt"
              case 'b':
                if (!memcmp(BuiltinName+17, "i", 1))
                  IntrinsicID = Intrinsic::spu_si_cgtbi;
                break;
              case 'h':
                if (!memcmp(BuiltinName+17, "i", 1))
                  IntrinsicID = Intrinsic::spu_si_cgthi;
                break;
              }
            }
            break;
          case 'l':
            if (!memcmp(BuiltinName+15, "gt", 2)) {
              switch (BuiltinName[17]) {  // "__builtin_si_clgt"
              case 'b':
                IntrinsicID = Intrinsic::spu_si_clgtb;
                break;
              case 'h':
                IntrinsicID = Intrinsic::spu_si_clgth;
                break;
              case 'i':
                IntrinsicID = Intrinsic::spu_si_clgti;
                break;
              }
            }
            break;
          }
          break;
        case 'd':
          if (!memcmp(BuiltinName+14, "fnm", 3)) {
            switch (BuiltinName[17]) {  // "__builtin_si_dfnm"
            case 'a':
              IntrinsicID = Intrinsic::spu_si_dfnma;
              break;
            case 's':
              IntrinsicID = Intrinsic::spu_si_dfnms;
              break;
            }
          }
          break;
        case 'f':
          switch (BuiltinName[14]) {  // "__builtin_si_f"
          case 'c':
            if (!memcmp(BuiltinName+15, "m", 1)) {
              switch (BuiltinName[16]) {  // "__builtin_si_fcm"
              case 'e':
                if (!memcmp(BuiltinName+17, "q", 1))
                  IntrinsicID = Intrinsic::spu_si_fcmeq;
                break;
              case 'g':
                if (!memcmp(BuiltinName+17, "t", 1))
                  IntrinsicID = Intrinsic::spu_si_fcmgt;
                break;
              }
            }
            break;
          case 's':
            if (!memcmp(BuiltinName+15, "mbi", 3))
              IntrinsicID = Intrinsic::spu_si_fsmbi;
            break;
          }
          break;
        case 'm':
          if (!memcmp(BuiltinName+14, "py", 2)) {
            switch (BuiltinName[16]) {  // "__builtin_si_mpy"
            case 'h':
              if (!memcmp(BuiltinName+17, "h", 1))
                IntrinsicID = Intrinsic::spu_si_mpyhh;
              break;
            case 'u':
              if (!memcmp(BuiltinName+17, "i", 1))
                IntrinsicID = Intrinsic::spu_si_mpyui;
              break;
            }
          }
          break;
        case 'x':
          if (!memcmp(BuiltinName+14, "or", 2)) {
            switch (BuiltinName[16]) {  // "__builtin_si_xor"
            case 'b':
              if (!memcmp(BuiltinName+17, "i", 1))
                IntrinsicID = Intrinsic::spu_si_xorbi;
              break;
            case 'h':
              if (!memcmp(BuiltinName+17, "i", 1))
                IntrinsicID = Intrinsic::spu_si_xorhi;
              break;
            }
          }
          break;
        }
      }
      break;
    case 19:
      if (!memcmp(BuiltinName, "__builtin_si_", 13)) {
        switch (BuiltinName[13]) {  // "__builtin_si_"
        case 'c':
          if (!memcmp(BuiltinName+14, "lgt", 3)) {
            switch (BuiltinName[17]) {  // "__builtin_si_clgt"
            case 'b':
              if (!memcmp(BuiltinName+18, "i", 1))
                IntrinsicID = Intrinsic::spu_si_clgtbi;
              break;
            case 'h':
              if (!memcmp(BuiltinName+18, "i", 1))
                IntrinsicID = Intrinsic::spu_si_clgthi;
              break;
            }
          }
          break;
        case 'm':
          if (!memcmp(BuiltinName+14, "pyhh", 4)) {
            switch (BuiltinName[18]) {  // "__builtin_si_mpyhh"
            case 'a':
              IntrinsicID = Intrinsic::spu_si_mpyhha;
              break;
            case 'u':
              IntrinsicID = Intrinsic::spu_si_mpyhhu;
              break;
            }
          }
          break;
        case 's':
          if (!memcmp(BuiltinName+14, "hlqb", 4)) {
            switch (BuiltinName[18]) {  // "__builtin_si_shlqb"
            case 'i':
              IntrinsicID = Intrinsic::spu_si_shlqbi;
              break;
            case 'y':
              IntrinsicID = Intrinsic::spu_si_shlqby;
              break;
            }
          }
          break;
        }
      }
      break;
    case 20:
      if (!memcmp(BuiltinName, "__builtin_si_", 13)) {
        switch (BuiltinName[13]) {  // "__builtin_si_"
        case 'm':
          if (!memcmp(BuiltinName+14, "pyhhau", 6))
            IntrinsicID = Intrinsic::spu_si_mpyhhau;
          break;
        case 's':
          if (!memcmp(BuiltinName+14, "hlqb", 4)) {
            switch (BuiltinName[18]) {  // "__builtin_si_shlqb"
            case 'i':
              if (!memcmp(BuiltinName+19, "i", 1))
                IntrinsicID = Intrinsic::spu_si_shlqbii;
              break;
            case 'y':
              if (!memcmp(BuiltinName+19, "i", 1))
                IntrinsicID = Intrinsic::spu_si_shlqbyi;
              break;
            }
          }
          break;
        }
      }
      break;
    }
  }
  if (!strcmp(TargetPrefix, "x86")) {
    switch (strlen(BuiltinName)) {
    default: break;
    case 18:
      if (!memcmp(BuiltinName, "__builtin_ia32_por", 18))
        IntrinsicID = Intrinsic::x86_mmx_por;
      break;
    case 19:
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
        case 'd':
          if (!memcmp(BuiltinName+16, "pp", 2)) {
            switch (BuiltinName[18]) {  // "__builtin_ia32_dpp"
            case 'd':
              IntrinsicID = Intrinsic::x86_sse41_dppd;
              break;
            case 's':
              IntrinsicID = Intrinsic::x86_sse41_dpps;
              break;
            }
          }
          break;
        case 'e':
          if (!memcmp(BuiltinName+16, "mms", 3))
            IntrinsicID = Intrinsic::x86_mmx_emms;
          break;
        case 'p':
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
          case 'a':
            if (!memcmp(BuiltinName+17, "nd", 2))
              IntrinsicID = Intrinsic::x86_mmx_pand;
            break;
          case 'x':
            if (!memcmp(BuiltinName+17, "or", 2))
              IntrinsicID = Intrinsic::x86_mmx_pxor;
            break;
          }
          break;
        }
      }
      break;
    case 20:
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
        case 'a':
          if (!memcmp(BuiltinName+16, "dds", 3)) {
            switch (BuiltinName[19]) {  // "__builtin_ia32_adds"
            case 'd':
              IntrinsicID = Intrinsic::x86_sse2_add_sd;
              break;
            case 's':
              IntrinsicID = Intrinsic::x86_sse_add_ss;
              break;
            }
          }
          break;
        case 'd':
          if (!memcmp(BuiltinName+16, "ivs", 3)) {
            switch (BuiltinName[19]) {  // "__builtin_ia32_divs"
            case 'd':
              IntrinsicID = Intrinsic::x86_sse2_div_sd;
              break;
            case 's':
              IntrinsicID = Intrinsic::x86_sse_div_ss;
              break;
            }
          }
          break;
        case 'f':
          if (!memcmp(BuiltinName+16, "emms", 4))
            IntrinsicID = Intrinsic::x86_mmx_femms;
          break;
        case 'l':
          if (!memcmp(BuiltinName+16, "ddqu", 4))
            IntrinsicID = Intrinsic::x86_sse3_ldu_dq;
          break;
        case 'm':
          switch (BuiltinName[16]) {  // "__builtin_ia32_m"
          case 'a':
            if (!memcmp(BuiltinName+17, "x", 1)) {
              switch (BuiltinName[18]) {  // "__builtin_ia32_max"
              case 'p':
                switch (BuiltinName[19]) {  // "__builtin_ia32_maxp"
                case 'd':
                  IntrinsicID = Intrinsic::x86_sse2_max_pd;
                  break;
                case 's':
                  IntrinsicID = Intrinsic::x86_sse_max_ps;
                  break;
                }
                break;
              case 's':
                switch (BuiltinName[19]) {  // "__builtin_ia32_maxs"
                case 'd':
                  IntrinsicID = Intrinsic::x86_sse2_max_sd;
                  break;
                case 's':
                  IntrinsicID = Intrinsic::x86_sse_max_ss;
                  break;
                }
                break;
              }
            }
            break;
          case 'i':
            if (!memcmp(BuiltinName+17, "n", 1)) {
              switch (BuiltinName[18]) {  // "__builtin_ia32_min"
              case 'p':
                switch (BuiltinName[19]) {  // "__builtin_ia32_minp"
                case 'd':
                  IntrinsicID = Intrinsic::x86_sse2_min_pd;
                  break;
                case 's':
                  IntrinsicID = Intrinsic::x86_sse_min_ps;
                  break;
                }
                break;
              case 's':
                switch (BuiltinName[19]) {  // "__builtin_ia32_mins"
                case 'd':
                  IntrinsicID = Intrinsic::x86_sse2_min_sd;
                  break;
                case 's':
                  IntrinsicID = Intrinsic::x86_sse_min_ss;
                  break;
                }
                break;
              }
            }
            break;
          case 'u':
            if (!memcmp(BuiltinName+17, "ls", 2)) {
              switch (BuiltinName[19]) {  // "__builtin_ia32_muls"
              case 'd':
                IntrinsicID = Intrinsic::x86_sse2_mul_sd;
                break;
              case 's':
                IntrinsicID = Intrinsic::x86_sse_mul_ss;
                break;
              }
            }
            break;
          case 'w':
            if (!memcmp(BuiltinName+17, "ait", 3))
              IntrinsicID = Intrinsic::x86_sse3_mwait;
            break;
          }
          break;
        case 'p':
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
          case 'a':
            switch (BuiltinName[17]) {  // "__builtin_ia32_pa"
            case 'b':
              if (!memcmp(BuiltinName+18, "s", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_pabs"
                case 'b':
                  IntrinsicID = Intrinsic::x86_ssse3_pabs_b;
                  break;
                case 'd':
                  IntrinsicID = Intrinsic::x86_ssse3_pabs_d;
                  break;
                case 'w':
                  IntrinsicID = Intrinsic::x86_ssse3_pabs_w;
                  break;
                }
              }
              break;
            case 'd':
              if (!memcmp(BuiltinName+18, "d", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_padd"
                case 'b':
                  IntrinsicID = Intrinsic::x86_mmx_padd_b;
                  break;
                case 'd':
                  IntrinsicID = Intrinsic::x86_mmx_padd_d;
                  break;
                case 'q':
                  IntrinsicID = Intrinsic::x86_mmx_padd_q;
                  break;
                case 'w':
                  IntrinsicID = Intrinsic::x86_mmx_padd_w;
                  break;
                }
              }
              break;
            case 'n':
              if (!memcmp(BuiltinName+18, "dn", 2))
                IntrinsicID = Intrinsic::x86_mmx_pandn;
              break;
            case 'v':
              if (!memcmp(BuiltinName+18, "g", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_pavg"
                case 'b':
                  IntrinsicID = Intrinsic::x86_mmx_pavg_b;
                  break;
                case 'w':
                  IntrinsicID = Intrinsic::x86_mmx_pavg_w;
                  break;
                }
              }
              break;
            }
            break;
          case 's':
            switch (BuiltinName[17]) {  // "__builtin_ia32_ps"
            case 'l':
              if (!memcmp(BuiltinName+18, "l", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_psll"
                case 'd':
                  IntrinsicID = Intrinsic::x86_mmx_psll_d;
                  break;
                case 'q':
                  IntrinsicID = Intrinsic::x86_mmx_psll_q;
                  break;
                case 'w':
                  IntrinsicID = Intrinsic::x86_mmx_psll_w;
                  break;
                }
              }
              break;
            case 'r':
              switch (BuiltinName[18]) {  // "__builtin_ia32_psr"
              case 'a':
                switch (BuiltinName[19]) {  // "__builtin_ia32_psra"
                case 'd':
                  IntrinsicID = Intrinsic::x86_mmx_psra_d;
                  break;
                case 'w':
                  IntrinsicID = Intrinsic::x86_mmx_psra_w;
                  break;
                }
                break;
              case 'l':
                switch (BuiltinName[19]) {  // "__builtin_ia32_psrl"
                case 'd':
                  IntrinsicID = Intrinsic::x86_mmx_psrl_d;
                  break;
                case 'q':
                  IntrinsicID = Intrinsic::x86_mmx_psrl_q;
                  break;
                case 'w':
                  IntrinsicID = Intrinsic::x86_mmx_psrl_w;
                  break;
                }
                break;
              }
              break;
            case 'u':
              if (!memcmp(BuiltinName+18, "b", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_psub"
                case 'b':
                  IntrinsicID = Intrinsic::x86_mmx_psub_b;
                  break;
                case 'd':
                  IntrinsicID = Intrinsic::x86_mmx_psub_d;
                  break;
                case 'q':
                  IntrinsicID = Intrinsic::x86_mmx_psub_q;
                  break;
                case 'w':
                  IntrinsicID = Intrinsic::x86_mmx_psub_w;
                  break;
                }
              }
              break;
            }
            break;
          }
          break;
        case 'r':
          if (!memcmp(BuiltinName+16, "cp", 2)) {
            switch (BuiltinName[18]) {  // "__builtin_ia32_rcp"
            case 'p':
              if (!memcmp(BuiltinName+19, "s", 1))
                IntrinsicID = Intrinsic::x86_sse_rcp_ps;
              break;
            case 's':
              if (!memcmp(BuiltinName+19, "s", 1))
                IntrinsicID = Intrinsic::x86_sse_rcp_ss;
              break;
            }
          }
          break;
        case 's':
          if (!memcmp(BuiltinName+16, "ubs", 3)) {
            switch (BuiltinName[19]) {  // "__builtin_ia32_subs"
            case 'd':
              IntrinsicID = Intrinsic::x86_sse2_sub_sd;
              break;
            case 's':
              IntrinsicID = Intrinsic::x86_sse_sub_ss;
              break;
            }
          }
          break;
        }
      }
      break;
    case 21:
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
        case 'c':
          if (!memcmp(BuiltinName+16, "omi", 3)) {
            switch (BuiltinName[19]) {  // "__builtin_ia32_comi"
            case 'e':
              if (!memcmp(BuiltinName+20, "q", 1))
                IntrinsicID = Intrinsic::x86_sse_comieq_ss;
              break;
            case 'g':
              switch (BuiltinName[20]) {  // "__builtin_ia32_comig"
              case 'e':
                IntrinsicID = Intrinsic::x86_sse_comige_ss;
                break;
              case 't':
                IntrinsicID = Intrinsic::x86_sse_comigt_ss;
                break;
              }
              break;
            case 'l':
              switch (BuiltinName[20]) {  // "__builtin_ia32_comil"
              case 'e':
                IntrinsicID = Intrinsic::x86_sse_comile_ss;
                break;
              case 't':
                IntrinsicID = Intrinsic::x86_sse_comilt_ss;
                break;
              }
              break;
            }
          }
          break;
        case 'h':
          switch (BuiltinName[16]) {  // "__builtin_ia32_h"
          case 'a':
            if (!memcmp(BuiltinName+17, "ddp", 3)) {
              switch (BuiltinName[20]) {  // "__builtin_ia32_haddp"
              case 'd':
                IntrinsicID = Intrinsic::x86_sse3_hadd_pd;
                break;
              case 's':
                IntrinsicID = Intrinsic::x86_sse3_hadd_ps;
                break;
              }
            }
            break;
          case 's':
            if (!memcmp(BuiltinName+17, "ubp", 3)) {
              switch (BuiltinName[20]) {  // "__builtin_ia32_hsubp"
              case 'd':
                IntrinsicID = Intrinsic::x86_sse3_hsub_pd;
                break;
              case 's':
                IntrinsicID = Intrinsic::x86_sse3_hsub_ps;
                break;
              }
            }
            break;
          }
          break;
        case 'l':
          if (!memcmp(BuiltinName+16, "fence", 5))
            IntrinsicID = Intrinsic::x86_sse2_lfence;
          break;
        case 'm':
          switch (BuiltinName[16]) {  // "__builtin_ia32_m"
          case 'f':
            if (!memcmp(BuiltinName+17, "ence", 4))
              IntrinsicID = Intrinsic::x86_sse2_mfence;
            break;
          case 'o':
            if (!memcmp(BuiltinName+17, "vnt", 3)) {
              switch (BuiltinName[20]) {  // "__builtin_ia32_movnt"
              case 'i':
                IntrinsicID = Intrinsic::x86_sse2_movnt_i;
                break;
              case 'q':
                IntrinsicID = Intrinsic::x86_mmx_movnt_dq;
                break;
              }
            }
            break;
          }
          break;
        case 'p':
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
          case 'a':
            if (!memcmp(BuiltinName+17, "dds", 3)) {
              switch (BuiltinName[20]) {  // "__builtin_ia32_padds"
              case 'b':
                IntrinsicID = Intrinsic::x86_mmx_padds_b;
                break;
              case 'w':
                IntrinsicID = Intrinsic::x86_mmx_padds_w;
                break;
              }
            }
            break;
          case 'h':
            switch (BuiltinName[17]) {  // "__builtin_ia32_ph"
            case 'a':
              if (!memcmp(BuiltinName+18, "dd", 2)) {
                switch (BuiltinName[20]) {  // "__builtin_ia32_phadd"
                case 'd':
                  IntrinsicID = Intrinsic::x86_ssse3_phadd_d;
                  break;
                case 'w':
                  IntrinsicID = Intrinsic::x86_ssse3_phadd_w;
                  break;
                }
              }
              break;
            case 's':
              if (!memcmp(BuiltinName+18, "ub", 2)) {
                switch (BuiltinName[20]) {  // "__builtin_ia32_phsub"
                case 'd':
                  IntrinsicID = Intrinsic::x86_ssse3_phsub_d;
                  break;
                case 'w':
                  IntrinsicID = Intrinsic::x86_ssse3_phsub_w;
                  break;
                }
              }
              break;
            }
            break;
          case 'm':
            switch (BuiltinName[17]) {  // "__builtin_ia32_pm"
            case 'a':
              if (!memcmp(BuiltinName+18, "x", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmax"
                case 's':
                  if (!memcmp(BuiltinName+20, "w", 1))
                    IntrinsicID = Intrinsic::x86_mmx_pmaxs_w;
                  break;
                case 'u':
                  if (!memcmp(BuiltinName+20, "b", 1))
                    IntrinsicID = Intrinsic::x86_mmx_pmaxu_b;
                  break;
                }
              }
              break;
            case 'i':
              if (!memcmp(BuiltinName+18, "n", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmin"
                case 's':
                  if (!memcmp(BuiltinName+20, "w", 1))
                    IntrinsicID = Intrinsic::x86_mmx_pmins_w;
                  break;
                case 'u':
                  if (!memcmp(BuiltinName+20, "b", 1))
                    IntrinsicID = Intrinsic::x86_mmx_pminu_b;
                  break;
                }
              }
              break;
            case 'u':
              if (!memcmp(BuiltinName+18, "l", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmul"
                case 'h':
                  if (!memcmp(BuiltinName+20, "w", 1))
                    IntrinsicID = Intrinsic::x86_mmx_pmulh_w;
                  break;
                case 'l':
                  if (!memcmp(BuiltinName+20, "w", 1))
                    IntrinsicID = Intrinsic::x86_mmx_pmull_w;
                  break;
                }
              }
              break;
            }
            break;
          case 's':
            switch (BuiltinName[17]) {  // "__builtin_ia32_ps"
            case 'a':
              if (!memcmp(BuiltinName+18, "dbw", 3))
                IntrinsicID = Intrinsic::x86_mmx_psad_bw;
              break;
            case 'h':
              if (!memcmp(BuiltinName+18, "uf", 2)) {
                switch (BuiltinName[20]) {  // "__builtin_ia32_pshuf"
                case 'b':
                  IntrinsicID = Intrinsic::x86_ssse3_pshuf_b;
                  break;
                case 'w':
                  IntrinsicID = Intrinsic::x86_ssse3_pshuf_w;
                  break;
                }
              }
              break;
            case 'i':
              if (!memcmp(BuiltinName+18, "gn", 2)) {
                switch (BuiltinName[20]) {  // "__builtin_ia32_psign"
                case 'b':
                  IntrinsicID = Intrinsic::x86_ssse3_psign_b;
                  break;
                case 'd':
                  IntrinsicID = Intrinsic::x86_ssse3_psign_d;
                  break;
                case 'w':
                  IntrinsicID = Intrinsic::x86_ssse3_psign_w;
                  break;
                }
              }
              break;
            case 'l':
              if (!memcmp(BuiltinName+18, "l", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_psll"
                case 'd':
                  if (!memcmp(BuiltinName+20, "i", 1))
                    IntrinsicID = Intrinsic::x86_mmx_pslli_d;
                  break;
                case 'q':
                  if (!memcmp(BuiltinName+20, "i", 1))
                    IntrinsicID = Intrinsic::x86_mmx_pslli_q;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+20, "i", 1))
                    IntrinsicID = Intrinsic::x86_mmx_pslli_w;
                  break;
                }
              }
              break;
            case 'r':
              switch (BuiltinName[18]) {  // "__builtin_ia32_psr"
              case 'a':
                switch (BuiltinName[19]) {  // "__builtin_ia32_psra"
                case 'd':
                  if (!memcmp(BuiltinName+20, "i", 1))
                    IntrinsicID = Intrinsic::x86_mmx_psrai_d;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+20, "i", 1))
                    IntrinsicID = Intrinsic::x86_mmx_psrai_w;
                  break;
                }
                break;
              case 'l':
                switch (BuiltinName[19]) {  // "__builtin_ia32_psrl"
                case 'd':
                  if (!memcmp(BuiltinName+20, "i", 1))
                    IntrinsicID = Intrinsic::x86_mmx_psrli_d;
                  break;
                case 'q':
                  if (!memcmp(BuiltinName+20, "i", 1))
                    IntrinsicID = Intrinsic::x86_mmx_psrli_q;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+20, "i", 1))
                    IntrinsicID = Intrinsic::x86_mmx_psrli_w;
                  break;
                }
                break;
              }
              break;
            case 'u':
              if (!memcmp(BuiltinName+18, "bs", 2)) {
                switch (BuiltinName[20]) {  // "__builtin_ia32_psubs"
                case 'b':
                  IntrinsicID = Intrinsic::x86_mmx_psubs_b;
                  break;
                case 'w':
                  IntrinsicID = Intrinsic::x86_mmx_psubs_w;
                  break;
                }
              }
              break;
            }
            break;
          }
          break;
        case 's':
          switch (BuiltinName[16]) {  // "__builtin_ia32_s"
          case 'f':
            if (!memcmp(BuiltinName+17, "ence", 4))
              IntrinsicID = Intrinsic::x86_sse_sfence;
            break;
          case 'q':
            if (!memcmp(BuiltinName+17, "rt", 2)) {
              switch (BuiltinName[19]) {  // "__builtin_ia32_sqrt"
              case 'p':
                switch (BuiltinName[20]) {  // "__builtin_ia32_sqrtp"
                case 'd':
                  IntrinsicID = Intrinsic::x86_sse2_sqrt_pd;
                  break;
                case 's':
                  IntrinsicID = Intrinsic::x86_sse_sqrt_ps;
                  break;
                }
                break;
              case 's':
                switch (BuiltinName[20]) {  // "__builtin_ia32_sqrts"
                case 'd':
                  IntrinsicID = Intrinsic::x86_sse2_sqrt_sd;
                  break;
                case 's':
                  IntrinsicID = Intrinsic::x86_sse_sqrt_ss;
                  break;
                }
                break;
              }
            }
            break;
          }
          break;
        }
      }
      break;
    case 22:
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
        case 'b':
          if (!memcmp(BuiltinName+16, "lendp", 5)) {
            switch (BuiltinName[21]) {  // "__builtin_ia32_blendp"
            case 'd':
              IntrinsicID = Intrinsic::x86_sse41_blendpd;
              break;
            case 's':
              IntrinsicID = Intrinsic::x86_sse41_blendps;
              break;
            }
          }
          break;
        case 'c':
          switch (BuiltinName[16]) {  // "__builtin_ia32_c"
          case 'l':
            if (!memcmp(BuiltinName+17, "flush", 5))
              IntrinsicID = Intrinsic::x86_sse2_clflush;
            break;
          case 'o':
            if (!memcmp(BuiltinName+17, "mineq", 5))
              IntrinsicID = Intrinsic::x86_sse_comineq_ss;
            break;
          case 'r':
            if (!memcmp(BuiltinName+17, "c32", 3)) {
              switch (BuiltinName[20]) {  // "__builtin_ia32_crc32"
              case 'd':
                if (!memcmp(BuiltinName+21, "i", 1))
                  IntrinsicID = Intrinsic::x86_sse42_crc64_64;
                break;
              case 'h':
                if (!memcmp(BuiltinName+21, "i", 1))
                  IntrinsicID = Intrinsic::x86_sse42_crc32_16;
                break;
              case 'q':
                if (!memcmp(BuiltinName+21, "i", 1))
                  IntrinsicID = Intrinsic::x86_sse42_crc32_8;
                break;
              case 's':
                if (!memcmp(BuiltinName+21, "i", 1))
                  IntrinsicID = Intrinsic::x86_sse42_crc32_32;
                break;
              }
            }
            break;
          }
          break;
        case 'd':
          if (!memcmp(BuiltinName+16, "pps256", 6))
            IntrinsicID = Intrinsic::x86_avx_dp_ps_256;
          break;
        case 'l':
          if (!memcmp(BuiltinName+16, "oad", 3)) {
            switch (BuiltinName[19]) {  // "__builtin_ia32_load"
            case 'd':
              if (!memcmp(BuiltinName+20, "qu", 2))
                IntrinsicID = Intrinsic::x86_sse2_loadu_dq;
              break;
            case 'u':
              if (!memcmp(BuiltinName+20, "p", 1)) {
                switch (BuiltinName[21]) {  // "__builtin_ia32_loadup"
                case 'd':
                  IntrinsicID = Intrinsic::x86_sse2_loadu_pd;
                  break;
                case 's':
                  IntrinsicID = Intrinsic::x86_sse_loadu_ps;
                  break;
                }
              }
              break;
            }
          }
          break;
        case 'm':
          if (!memcmp(BuiltinName+16, "o", 1)) {
            switch (BuiltinName[17]) {  // "__builtin_ia32_mo"
            case 'n':
              if (!memcmp(BuiltinName+18, "itor", 4))
                IntrinsicID = Intrinsic::x86_sse3_monitor;
              break;
            case 'v':
              if (!memcmp(BuiltinName+18, "nt", 2)) {
                switch (BuiltinName[20]) {  // "__builtin_ia32_movnt"
                case 'd':
                  if (!memcmp(BuiltinName+21, "q", 1))
                    IntrinsicID = Intrinsic::x86_sse2_movnt_dq;
                  break;
                case 'p':
                  switch (BuiltinName[21]) {  // "__builtin_ia32_movntp"
                  case 'd':
                    IntrinsicID = Intrinsic::x86_sse2_movnt_pd;
                    break;
                  case 's':
                    IntrinsicID = Intrinsic::x86_sse_movnt_ps;
                    break;
                  }
                  break;
                }
              }
              break;
            }
          }
          break;
        case 'p':
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
          case 'a':
            if (!memcmp(BuiltinName+17, "ddus", 4)) {
              switch (BuiltinName[21]) {  // "__builtin_ia32_paddus"
              case 'b':
                IntrinsicID = Intrinsic::x86_mmx_paddus_b;
                break;
              case 'w':
                IntrinsicID = Intrinsic::x86_mmx_paddus_w;
                break;
              }
            }
            break;
          case 'c':
            if (!memcmp(BuiltinName+17, "mp", 2)) {
              switch (BuiltinName[19]) {  // "__builtin_ia32_pcmp"
              case 'e':
                if (!memcmp(BuiltinName+20, "q", 1)) {
                  switch (BuiltinName[21]) {  // "__builtin_ia32_pcmpeq"
                  case 'b':
                    IntrinsicID = Intrinsic::x86_mmx_pcmpeq_b;
                    break;
                  case 'd':
                    IntrinsicID = Intrinsic::x86_mmx_pcmpeq_d;
                    break;
                  case 'q':
                    IntrinsicID = Intrinsic::x86_sse41_pcmpeqq;
                    break;
                  case 'w':
                    IntrinsicID = Intrinsic::x86_mmx_pcmpeq_w;
                    break;
                  }
                }
                break;
              case 'g':
                if (!memcmp(BuiltinName+20, "t", 1)) {
                  switch (BuiltinName[21]) {  // "__builtin_ia32_pcmpgt"
                  case 'b':
                    IntrinsicID = Intrinsic::x86_mmx_pcmpgt_b;
                    break;
                  case 'd':
                    IntrinsicID = Intrinsic::x86_mmx_pcmpgt_d;
                    break;
                  case 'q':
                    IntrinsicID = Intrinsic::x86_sse42_pcmpgtq;
                    break;
                  case 'w':
                    IntrinsicID = Intrinsic::x86_mmx_pcmpgt_w;
                    break;
                  }
                }
                break;
              }
            }
            break;
          case 'h':
            switch (BuiltinName[17]) {  // "__builtin_ia32_ph"
            case 'a':
              if (!memcmp(BuiltinName+18, "ddsw", 4))
                IntrinsicID = Intrinsic::x86_ssse3_phadd_sw;
              break;
            case 's':
              if (!memcmp(BuiltinName+18, "ubsw", 4))
                IntrinsicID = Intrinsic::x86_ssse3_phsub_sw;
              break;
            }
            break;
          case 'm':
            switch (BuiltinName[17]) {  // "__builtin_ia32_pm"
            case 'a':
              if (!memcmp(BuiltinName+18, "ddwd", 4))
                IntrinsicID = Intrinsic::x86_mmx_pmadd_wd;
              break;
            case 'u':
              if (!memcmp(BuiltinName+18, "l", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmul"
                case 'h':
                  if (!memcmp(BuiltinName+20, "uw", 2))
                    IntrinsicID = Intrinsic::x86_mmx_pmulhu_w;
                  break;
                case 'u':
                  if (!memcmp(BuiltinName+20, "dq", 2))
                    IntrinsicID = Intrinsic::x86_mmx_pmulu_dq;
                  break;
                }
              }
              break;
            }
            break;
          case 's':
            if (!memcmp(BuiltinName+17, "ubus", 4)) {
              switch (BuiltinName[21]) {  // "__builtin_ia32_psubus"
              case 'b':
                IntrinsicID = Intrinsic::x86_mmx_psubus_b;
                break;
              case 'w':
                IntrinsicID = Intrinsic::x86_mmx_psubus_w;
                break;
              }
            }
            break;
          }
          break;
        case 'r':
          switch (BuiltinName[16]) {  // "__builtin_ia32_r"
          case 'o':
            if (!memcmp(BuiltinName+17, "und", 3)) {
              switch (BuiltinName[20]) {  // "__builtin_ia32_round"
              case 'p':
                switch (BuiltinName[21]) {  // "__builtin_ia32_roundp"
                case 'd':
                  IntrinsicID = Intrinsic::x86_sse41_round_pd;
                  break;
                case 's':
                  IntrinsicID = Intrinsic::x86_sse41_round_ps;
                  break;
                }
                break;
              case 's':
                switch (BuiltinName[21]) {  // "__builtin_ia32_rounds"
                case 'd':
                  IntrinsicID = Intrinsic::x86_sse41_round_sd;
                  break;
                case 's':
                  IntrinsicID = Intrinsic::x86_sse41_round_ss;
                  break;
                }
                break;
              }
            }
            break;
          case 's':
            if (!memcmp(BuiltinName+17, "qrt", 3)) {
              switch (BuiltinName[20]) {  // "__builtin_ia32_rsqrt"
              case 'p':
                if (!memcmp(BuiltinName+21, "s", 1))
                  IntrinsicID = Intrinsic::x86_sse_rsqrt_ps;
                break;
              case 's':
                if (!memcmp(BuiltinName+21, "s", 1))
                  IntrinsicID = Intrinsic::x86_sse_rsqrt_ss;
                break;
              }
            }
            break;
          }
          break;
        case 'u':
          if (!memcmp(BuiltinName+16, "comi", 4)) {
            switch (BuiltinName[20]) {  // "__builtin_ia32_ucomi"
            case 'e':
              if (!memcmp(BuiltinName+21, "q", 1))
                IntrinsicID = Intrinsic::x86_sse_ucomieq_ss;
              break;
            case 'g':
              switch (BuiltinName[21]) {  // "__builtin_ia32_ucomig"
              case 'e':
                IntrinsicID = Intrinsic::x86_sse_ucomige_ss;
                break;
              case 't':
                IntrinsicID = Intrinsic::x86_sse_ucomigt_ss;
                break;
              }
              break;
            case 'l':
              switch (BuiltinName[21]) {  // "__builtin_ia32_ucomil"
              case 'e':
                IntrinsicID = Intrinsic::x86_sse_ucomile_ss;
                break;
              case 't':
                IntrinsicID = Intrinsic::x86_sse_ucomilt_ss;
                break;
              }
              break;
            }
          }
          break;
        }
      }
      break;
    case 23:
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
        case 'a':
          if (!memcmp(BuiltinName+16, "ddsubp", 6)) {
            switch (BuiltinName[22]) {  // "__builtin_ia32_addsubp"
            case 'd':
              IntrinsicID = Intrinsic::x86_sse3_addsub_pd;
              break;
            case 's':
              IntrinsicID = Intrinsic::x86_sse3_addsub_ps;
              break;
            }
          }
          break;
        case 'b':
          if (!memcmp(BuiltinName+16, "lendvp", 6)) {
            switch (BuiltinName[22]) {  // "__builtin_ia32_blendvp"
            case 'd':
              IntrinsicID = Intrinsic::x86_sse41_blendvpd;
              break;
            case 's':
              IntrinsicID = Intrinsic::x86_sse41_blendvps;
              break;
            }
          }
          break;
        case 'c':
          switch (BuiltinName[16]) {  // "__builtin_ia32_c"
          case 'm':
            if (!memcmp(BuiltinName+17, "pp", 2)) {
              switch (BuiltinName[19]) {  // "__builtin_ia32_cmpp"
              case 'd':
                if (!memcmp(BuiltinName+20, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_cmp_pd_256;
                break;
              case 's':
                if (!memcmp(BuiltinName+20, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_cmp_ps_256;
                break;
              }
            }
            break;
          case 'o':
            if (!memcmp(BuiltinName+17, "misd", 4)) {
              switch (BuiltinName[21]) {  // "__builtin_ia32_comisd"
              case 'e':
                if (!memcmp(BuiltinName+22, "q", 1))
                  IntrinsicID = Intrinsic::x86_sse2_comieq_sd;
                break;
              case 'g':
                switch (BuiltinName[22]) {  // "__builtin_ia32_comisdg"
                case 'e':
                  IntrinsicID = Intrinsic::x86_sse2_comige_sd;
                  break;
                case 't':
                  IntrinsicID = Intrinsic::x86_sse2_comigt_sd;
                  break;
                }
                break;
              case 'l':
                switch (BuiltinName[22]) {  // "__builtin_ia32_comisdl"
                case 'e':
                  IntrinsicID = Intrinsic::x86_sse2_comile_sd;
                  break;
                case 't':
                  IntrinsicID = Intrinsic::x86_sse2_comilt_sd;
                  break;
                }
                break;
              }
            }
            break;
          case 'v':
            if (!memcmp(BuiltinName+17, "t", 1)) {
              switch (BuiltinName[18]) {  // "__builtin_ia32_cvt"
              case 'd':
                if (!memcmp(BuiltinName+19, "q2p", 3)) {
                  switch (BuiltinName[22]) {  // "__builtin_ia32_cvtdq2p"
                  case 'd':
                    IntrinsicID = Intrinsic::x86_sse2_cvtdq2pd;
                    break;
                  case 's':
                    IntrinsicID = Intrinsic::x86_sse2_cvtdq2ps;
                    break;
                  }
                }
                break;
              case 'p':
                switch (BuiltinName[19]) {  // "__builtin_ia32_cvtp"
                case 'd':
                  if (!memcmp(BuiltinName+20, "2", 1)) {
                    switch (BuiltinName[21]) {  // "__builtin_ia32_cvtpd2"
                    case 'd':
                      if (!memcmp(BuiltinName+22, "q", 1))
                        IntrinsicID = Intrinsic::x86_sse2_cvtpd2dq;
                      break;
                    case 'p':
                      switch (BuiltinName[22]) {  // "__builtin_ia32_cvtpd2p"
                      case 'i':
                        IntrinsicID = Intrinsic::x86_sse_cvtpd2pi;
                        break;
                      case 's':
                        IntrinsicID = Intrinsic::x86_sse2_cvtpd2ps;
                        break;
                      }
                      break;
                    }
                  }
                  break;
                case 'i':
                  if (!memcmp(BuiltinName+20, "2p", 2)) {
                    switch (BuiltinName[22]) {  // "__builtin_ia32_cvtpi2p"
                    case 'd':
                      IntrinsicID = Intrinsic::x86_sse_cvtpi2pd;
                      break;
                    case 's':
                      IntrinsicID = Intrinsic::x86_sse_cvtpi2ps;
                      break;
                    }
                  }
                  break;
                case 's':
                  if (!memcmp(BuiltinName+20, "2", 1)) {
                    switch (BuiltinName[21]) {  // "__builtin_ia32_cvtps2"
                    case 'd':
                      if (!memcmp(BuiltinName+22, "q", 1))
                        IntrinsicID = Intrinsic::x86_sse2_cvtps2dq;
                      break;
                    case 'p':
                      switch (BuiltinName[22]) {  // "__builtin_ia32_cvtps2p"
                      case 'd':
                        IntrinsicID = Intrinsic::x86_sse2_cvtps2pd;
                        break;
                      case 'i':
                        IntrinsicID = Intrinsic::x86_sse_cvtps2pi;
                        break;
                      }
                      break;
                    }
                  }
                  break;
                }
                break;
              case 's':
                switch (BuiltinName[19]) {  // "__builtin_ia32_cvts"
                case 'd':
                  if (!memcmp(BuiltinName+20, "2s", 2)) {
                    switch (BuiltinName[22]) {  // "__builtin_ia32_cvtsd2s"
                    case 'i':
                      IntrinsicID = Intrinsic::x86_sse2_cvtsd2si;
                      break;
                    case 's':
                      IntrinsicID = Intrinsic::x86_sse2_cvtsd2ss;
                      break;
                    }
                  }
                  break;
                case 'i':
                  if (!memcmp(BuiltinName+20, "2s", 2)) {
                    switch (BuiltinName[22]) {  // "__builtin_ia32_cvtsi2s"
                    case 'd':
                      IntrinsicID = Intrinsic::x86_sse2_cvtsi2sd;
                      break;
                    case 's':
                      IntrinsicID = Intrinsic::x86_sse_cvtsi2ss;
                      break;
                    }
                  }
                  break;
                case 's':
                  if (!memcmp(BuiltinName+20, "2s", 2)) {
                    switch (BuiltinName[22]) {  // "__builtin_ia32_cvtss2s"
                    case 'd':
                      IntrinsicID = Intrinsic::x86_sse2_cvtss2sd;
                      break;
                    case 'i':
                      IntrinsicID = Intrinsic::x86_sse_cvtss2si;
                      break;
                    }
                  }
                  break;
                }
                break;
              }
            }
            break;
          }
          break;
        case 'l':
          if (!memcmp(BuiltinName+16, "ddqu256", 7))
            IntrinsicID = Intrinsic::x86_avx_ldu_dq_256;
          break;
        case 'm':
          switch (BuiltinName[16]) {  // "__builtin_ia32_m"
          case 'a':
            switch (BuiltinName[17]) {  // "__builtin_ia32_ma"
            case 's':
              if (!memcmp(BuiltinName+18, "kmovq", 5))
                IntrinsicID = Intrinsic::x86_mmx_maskmovq;
              break;
            case 'x':
              if (!memcmp(BuiltinName+18, "p", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_maxp"
                case 'd':
                  if (!memcmp(BuiltinName+20, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_max_pd_256;
                  break;
                case 's':
                  if (!memcmp(BuiltinName+20, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_max_ps_256;
                  break;
                }
              }
              break;
            }
            break;
          case 'i':
            if (!memcmp(BuiltinName+17, "np", 2)) {
              switch (BuiltinName[19]) {  // "__builtin_ia32_minp"
              case 'd':
                if (!memcmp(BuiltinName+20, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_min_pd_256;
                break;
              case 's':
                if (!memcmp(BuiltinName+20, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_min_ps_256;
                break;
              }
            }
            break;
          case 'o':
            if (!memcmp(BuiltinName+17, "v", 1)) {
              switch (BuiltinName[18]) {  // "__builtin_ia32_mov"
              case 'm':
                if (!memcmp(BuiltinName+19, "skp", 3)) {
                  switch (BuiltinName[22]) {  // "__builtin_ia32_movmskp"
                  case 'd':
                    IntrinsicID = Intrinsic::x86_sse2_movmsk_pd;
                    break;
                  case 's':
                    IntrinsicID = Intrinsic::x86_sse_movmsk_ps;
                    break;
                  }
                }
                break;
              case 'n':
                if (!memcmp(BuiltinName+19, "tdqa", 4))
                  IntrinsicID = Intrinsic::x86_sse41_movntdqa;
                break;
              }
            }
            break;
          }
          break;
        case 'p':
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
          case 'a':
            switch (BuiltinName[17]) {  // "__builtin_ia32_pa"
            case 'b':
              if (!memcmp(BuiltinName+18, "s", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_pabs"
                case 'b':
                  if (!memcmp(BuiltinName+20, "128", 3))
                    IntrinsicID = Intrinsic::x86_ssse3_pabs_b_128;
                  break;
                case 'd':
                  if (!memcmp(BuiltinName+20, "128", 3))
                    IntrinsicID = Intrinsic::x86_ssse3_pabs_d_128;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+20, "128", 3))
                    IntrinsicID = Intrinsic::x86_ssse3_pabs_w_128;
                  break;
                }
              }
              break;
            case 'c':
              if (!memcmp(BuiltinName+18, "k", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_pack"
                case 's':
                  if (!memcmp(BuiltinName+20, "s", 1)) {
                    switch (BuiltinName[21]) {  // "__builtin_ia32_packss"
                    case 'd':
                      if (!memcmp(BuiltinName+22, "w", 1))
                        IntrinsicID = Intrinsic::x86_mmx_packssdw;
                      break;
                    case 'w':
                      if (!memcmp(BuiltinName+22, "b", 1))
                        IntrinsicID = Intrinsic::x86_mmx_packsswb;
                      break;
                    }
                  }
                  break;
                case 'u':
                  if (!memcmp(BuiltinName+20, "swb", 3))
                    IntrinsicID = Intrinsic::x86_mmx_packuswb;
                  break;
                }
              }
              break;
            case 'v':
              if (!memcmp(BuiltinName+18, "g", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_pavg"
                case 'b':
                  if (!memcmp(BuiltinName+20, "128", 3))
                    IntrinsicID = Intrinsic::x86_sse2_pavg_b;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+20, "128", 3))
                    IntrinsicID = Intrinsic::x86_sse2_pavg_w;
                  break;
                }
              }
              break;
            }
            break;
          case 'm':
            switch (BuiltinName[17]) {  // "__builtin_ia32_pm"
            case 'o':
              if (!memcmp(BuiltinName+18, "vmskb", 5))
                IntrinsicID = Intrinsic::x86_mmx_pmovmskb;
              break;
            case 'u':
              if (!memcmp(BuiltinName+18, "lhrsw", 5))
                IntrinsicID = Intrinsic::x86_ssse3_pmul_hr_sw;
              break;
            }
            break;
          case 's':
            switch (BuiltinName[17]) {  // "__builtin_ia32_ps"
            case 'l':
              if (!memcmp(BuiltinName+18, "l", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_psll"
                case 'd':
                  if (!memcmp(BuiltinName+20, "128", 3))
                    IntrinsicID = Intrinsic::x86_sse2_psll_d;
                  break;
                case 'q':
                  if (!memcmp(BuiltinName+20, "128", 3))
                    IntrinsicID = Intrinsic::x86_sse2_psll_q;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+20, "128", 3))
                    IntrinsicID = Intrinsic::x86_sse2_psll_w;
                  break;
                }
              }
              break;
            case 'r':
              switch (BuiltinName[18]) {  // "__builtin_ia32_psr"
              case 'a':
                switch (BuiltinName[19]) {  // "__builtin_ia32_psra"
                case 'd':
                  if (!memcmp(BuiltinName+20, "128", 3))
                    IntrinsicID = Intrinsic::x86_sse2_psra_d;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+20, "128", 3))
                    IntrinsicID = Intrinsic::x86_sse2_psra_w;
                  break;
                }
                break;
              case 'l':
                switch (BuiltinName[19]) {  // "__builtin_ia32_psrl"
                case 'd':
                  if (!memcmp(BuiltinName+20, "128", 3))
                    IntrinsicID = Intrinsic::x86_sse2_psrl_d;
                  break;
                case 'q':
                  if (!memcmp(BuiltinName+20, "128", 3))
                    IntrinsicID = Intrinsic::x86_sse2_psrl_q;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+20, "128", 3))
                    IntrinsicID = Intrinsic::x86_sse2_psrl_w;
                  break;
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case 'r':
          if (!memcmp(BuiltinName+16, "cpps256", 7))
            IntrinsicID = Intrinsic::x86_avx_rcp_ps_256;
          break;
        case 's':
          if (!memcmp(BuiltinName+16, "tore", 4)) {
            switch (BuiltinName[20]) {  // "__builtin_ia32_store"
            case 'd':
              if (!memcmp(BuiltinName+21, "qu", 2))
                IntrinsicID = Intrinsic::x86_sse2_storeu_dq;
              break;
            case 'u':
              if (!memcmp(BuiltinName+21, "p", 1)) {
                switch (BuiltinName[22]) {  // "__builtin_ia32_storeup"
                case 'd':
                  IntrinsicID = Intrinsic::x86_sse2_storeu_pd;
                  break;
                case 's':
                  IntrinsicID = Intrinsic::x86_sse_storeu_ps;
                  break;
                }
              }
              break;
            }
          }
          break;
        case 'u':
          if (!memcmp(BuiltinName+16, "comineq", 7))
            IntrinsicID = Intrinsic::x86_sse_ucomineq_ss;
          break;
        case 'v':
          switch (BuiltinName[16]) {  // "__builtin_ia32_v"
          case 't':
            if (!memcmp(BuiltinName+17, "est", 3)) {
              switch (BuiltinName[20]) {  // "__builtin_ia32_vtest"
              case 'c':
                if (!memcmp(BuiltinName+21, "p", 1)) {
                  switch (BuiltinName[22]) {  // "__builtin_ia32_vtestcp"
                  case 'd':
                    IntrinsicID = Intrinsic::x86_avx_vtestc_pd;
                    break;
                  case 's':
                    IntrinsicID = Intrinsic::x86_avx_vtestc_ps;
                    break;
                  }
                }
                break;
              case 'z':
                if (!memcmp(BuiltinName+21, "p", 1)) {
                  switch (BuiltinName[22]) {  // "__builtin_ia32_vtestzp"
                  case 'd':
                    IntrinsicID = Intrinsic::x86_avx_vtestz_pd;
                    break;
                  case 's':
                    IntrinsicID = Intrinsic::x86_avx_vtestz_ps;
                    break;
                  }
                }
                break;
              }
            }
            break;
          case 'z':
            if (!memcmp(BuiltinName+17, "eroall", 6))
              IntrinsicID = Intrinsic::x86_avx_vzeroall;
            break;
          }
          break;
        }
      }
      break;
    case 24:
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
        case 'a':
          if (!memcmp(BuiltinName+16, "es", 2)) {
            switch (BuiltinName[18]) {  // "__builtin_ia32_aes"
            case 'd':
              if (!memcmp(BuiltinName+19, "ec128", 5))
                IntrinsicID = Intrinsic::x86_aesni_aesdec;
              break;
            case 'e':
              if (!memcmp(BuiltinName+19, "nc128", 5))
                IntrinsicID = Intrinsic::x86_aesni_aesenc;
              break;
            case 'i':
              if (!memcmp(BuiltinName+19, "mc128", 5))
                IntrinsicID = Intrinsic::x86_aesni_aesimc;
              break;
            }
          }
          break;
        case 'c':
          switch (BuiltinName[16]) {  // "__builtin_ia32_c"
          case 'o':
            if (!memcmp(BuiltinName+17, "misdneq", 7))
              IntrinsicID = Intrinsic::x86_sse2_comineq_sd;
            break;
          case 'v':
            if (!memcmp(BuiltinName+17, "tt", 2)) {
              switch (BuiltinName[19]) {  // "__builtin_ia32_cvtt"
              case 'p':
                switch (BuiltinName[20]) {  // "__builtin_ia32_cvttp"
                case 'd':
                  if (!memcmp(BuiltinName+21, "2", 1)) {
                    switch (BuiltinName[22]) {  // "__builtin_ia32_cvttpd2"
                    case 'd':
                      if (!memcmp(BuiltinName+23, "q", 1))
                        IntrinsicID = Intrinsic::x86_sse2_cvttpd2dq;
                      break;
                    case 'p':
                      if (!memcmp(BuiltinName+23, "i", 1))
                        IntrinsicID = Intrinsic::x86_sse_cvttpd2pi;
                      break;
                    }
                  }
                  break;
                case 's':
                  if (!memcmp(BuiltinName+21, "2", 1)) {
                    switch (BuiltinName[22]) {  // "__builtin_ia32_cvttps2"
                    case 'd':
                      if (!memcmp(BuiltinName+23, "q", 1))
                        IntrinsicID = Intrinsic::x86_sse2_cvttps2dq;
                      break;
                    case 'p':
                      if (!memcmp(BuiltinName+23, "i", 1))
                        IntrinsicID = Intrinsic::x86_sse_cvttps2pi;
                      break;
                    }
                  }
                  break;
                }
                break;
              case 's':
                switch (BuiltinName[20]) {  // "__builtin_ia32_cvtts"
                case 'd':
                  if (!memcmp(BuiltinName+21, "2si", 3))
                    IntrinsicID = Intrinsic::x86_sse2_cvttsd2si;
                  break;
                case 's':
                  if (!memcmp(BuiltinName+21, "2si", 3))
                    IntrinsicID = Intrinsic::x86_sse_cvttss2si;
                  break;
                }
                break;
              }
            }
            break;
          }
          break;
        case 'h':
          switch (BuiltinName[16]) {  // "__builtin_ia32_h"
          case 'a':
            if (!memcmp(BuiltinName+17, "ddp", 3)) {
              switch (BuiltinName[20]) {  // "__builtin_ia32_haddp"
              case 'd':
                if (!memcmp(BuiltinName+21, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_hadd_pd_256;
                break;
              case 's':
                if (!memcmp(BuiltinName+21, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_hadd_ps_256;
                break;
              }
            }
            break;
          case 's':
            if (!memcmp(BuiltinName+17, "ubp", 3)) {
              switch (BuiltinName[20]) {  // "__builtin_ia32_hsubp"
              case 'd':
                if (!memcmp(BuiltinName+21, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_hsub_pd_256;
                break;
              case 's':
                if (!memcmp(BuiltinName+21, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_hsub_ps_256;
                break;
              }
            }
            break;
          }
          break;
        case 'p':
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
          case 'a':
            if (!memcmp(BuiltinName+17, "dds", 3)) {
              switch (BuiltinName[20]) {  // "__builtin_ia32_padds"
              case 'b':
                if (!memcmp(BuiltinName+21, "128", 3))
                  IntrinsicID = Intrinsic::x86_sse2_padds_b;
                break;
              case 'w':
                if (!memcmp(BuiltinName+21, "128", 3))
                  IntrinsicID = Intrinsic::x86_sse2_padds_w;
                break;
              }
            }
            break;
          case 'h':
            switch (BuiltinName[17]) {  // "__builtin_ia32_ph"
            case 'a':
              if (!memcmp(BuiltinName+18, "dd", 2)) {
                switch (BuiltinName[20]) {  // "__builtin_ia32_phadd"
                case 'd':
                  if (!memcmp(BuiltinName+21, "128", 3))
                    IntrinsicID = Intrinsic::x86_ssse3_phadd_d_128;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+21, "128", 3))
                    IntrinsicID = Intrinsic::x86_ssse3_phadd_w_128;
                  break;
                }
              }
              break;
            case 's':
              if (!memcmp(BuiltinName+18, "ub", 2)) {
                switch (BuiltinName[20]) {  // "__builtin_ia32_phsub"
                case 'd':
                  if (!memcmp(BuiltinName+21, "128", 3))
                    IntrinsicID = Intrinsic::x86_ssse3_phsub_d_128;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+21, "128", 3))
                    IntrinsicID = Intrinsic::x86_ssse3_phsub_w_128;
                  break;
                }
              }
              break;
            }
            break;
          case 'm':
            switch (BuiltinName[17]) {  // "__builtin_ia32_pm"
            case 'a':
              switch (BuiltinName[18]) {  // "__builtin_ia32_pma"
              case 'd':
                if (!memcmp(BuiltinName+19, "dubsw", 5))
                  IntrinsicID = Intrinsic::x86_ssse3_pmadd_ub_sw;
                break;
              case 'x':
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmax"
                case 's':
                  switch (BuiltinName[20]) {  // "__builtin_ia32_pmaxs"
                  case 'b':
                    if (!memcmp(BuiltinName+21, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse41_pmaxsb;
                    break;
                  case 'd':
                    if (!memcmp(BuiltinName+21, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse41_pmaxsd;
                    break;
                  case 'w':
                    if (!memcmp(BuiltinName+21, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse2_pmaxs_w;
                    break;
                  }
                  break;
                case 'u':
                  switch (BuiltinName[20]) {  // "__builtin_ia32_pmaxu"
                  case 'b':
                    if (!memcmp(BuiltinName+21, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse2_pmaxu_b;
                    break;
                  case 'd':
                    if (!memcmp(BuiltinName+21, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse41_pmaxud;
                    break;
                  case 'w':
                    if (!memcmp(BuiltinName+21, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse41_pmaxuw;
                    break;
                  }
                  break;
                }
                break;
              }
              break;
            case 'i':
              if (!memcmp(BuiltinName+18, "n", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmin"
                case 's':
                  switch (BuiltinName[20]) {  // "__builtin_ia32_pmins"
                  case 'b':
                    if (!memcmp(BuiltinName+21, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse41_pminsb;
                    break;
                  case 'd':
                    if (!memcmp(BuiltinName+21, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse41_pminsd;
                    break;
                  case 'w':
                    if (!memcmp(BuiltinName+21, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse2_pmins_w;
                    break;
                  }
                  break;
                case 'u':
                  switch (BuiltinName[20]) {  // "__builtin_ia32_pminu"
                  case 'b':
                    if (!memcmp(BuiltinName+21, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse2_pminu_b;
                    break;
                  case 'd':
                    if (!memcmp(BuiltinName+21, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse41_pminud;
                    break;
                  case 'w':
                    if (!memcmp(BuiltinName+21, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse41_pminuw;
                    break;
                  }
                  break;
                }
              }
              break;
            case 'u':
              if (!memcmp(BuiltinName+18, "l", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmul"
                case 'd':
                  if (!memcmp(BuiltinName+20, "q128", 4))
                    IntrinsicID = Intrinsic::x86_sse41_pmuldq;
                  break;
                case 'h':
                  if (!memcmp(BuiltinName+20, "w128", 4))
                    IntrinsicID = Intrinsic::x86_sse2_pmulh_w;
                  break;
                }
              }
              break;
            }
            break;
          case 's':
            switch (BuiltinName[17]) {  // "__builtin_ia32_ps"
            case 'a':
              if (!memcmp(BuiltinName+18, "dbw128", 6))
                IntrinsicID = Intrinsic::x86_sse2_psad_bw;
              break;
            case 'h':
              if (!memcmp(BuiltinName+18, "ufb128", 6))
                IntrinsicID = Intrinsic::x86_ssse3_pshuf_b_128;
              break;
            case 'i':
              if (!memcmp(BuiltinName+18, "gn", 2)) {
                switch (BuiltinName[20]) {  // "__builtin_ia32_psign"
                case 'b':
                  if (!memcmp(BuiltinName+21, "128", 3))
                    IntrinsicID = Intrinsic::x86_ssse3_psign_b_128;
                  break;
                case 'd':
                  if (!memcmp(BuiltinName+21, "128", 3))
                    IntrinsicID = Intrinsic::x86_ssse3_psign_d_128;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+21, "128", 3))
                    IntrinsicID = Intrinsic::x86_ssse3_psign_w_128;
                  break;
                }
              }
              break;
            case 'l':
              if (!memcmp(BuiltinName+18, "l", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_psll"
                case 'd':
                  if (!memcmp(BuiltinName+20, "i128", 4))
                    IntrinsicID = Intrinsic::x86_sse2_pslli_d;
                  break;
                case 'q':
                  if (!memcmp(BuiltinName+20, "i128", 4))
                    IntrinsicID = Intrinsic::x86_sse2_pslli_q;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+20, "i128", 4))
                    IntrinsicID = Intrinsic::x86_sse2_pslli_w;
                  break;
                }
              }
              break;
            case 'r':
              switch (BuiltinName[18]) {  // "__builtin_ia32_psr"
              case 'a':
                switch (BuiltinName[19]) {  // "__builtin_ia32_psra"
                case 'd':
                  if (!memcmp(BuiltinName+20, "i128", 4))
                    IntrinsicID = Intrinsic::x86_sse2_psrai_d;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+20, "i128", 4))
                    IntrinsicID = Intrinsic::x86_sse2_psrai_w;
                  break;
                }
                break;
              case 'l':
                switch (BuiltinName[19]) {  // "__builtin_ia32_psrl"
                case 'd':
                  if (!memcmp(BuiltinName+20, "i128", 4))
                    IntrinsicID = Intrinsic::x86_sse2_psrli_d;
                  break;
                case 'q':
                  if (!memcmp(BuiltinName+20, "i128", 4))
                    IntrinsicID = Intrinsic::x86_sse2_psrli_q;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+20, "i128", 4))
                    IntrinsicID = Intrinsic::x86_sse2_psrli_w;
                  break;
                }
                break;
              }
              break;
            case 'u':
              if (!memcmp(BuiltinName+18, "bs", 2)) {
                switch (BuiltinName[20]) {  // "__builtin_ia32_psubs"
                case 'b':
                  if (!memcmp(BuiltinName+21, "128", 3))
                    IntrinsicID = Intrinsic::x86_sse2_psubs_b;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+21, "128", 3))
                    IntrinsicID = Intrinsic::x86_sse2_psubs_w;
                  break;
                }
              }
              break;
            }
            break;
          case 't':
            if (!memcmp(BuiltinName+17, "est", 3)) {
              switch (BuiltinName[20]) {  // "__builtin_ia32_ptest"
              case 'c':
                switch (BuiltinName[21]) {  // "__builtin_ia32_ptestc"
                case '1':
                  if (!memcmp(BuiltinName+22, "28", 2))
                    IntrinsicID = Intrinsic::x86_sse41_ptestc;
                  break;
                case '2':
                  if (!memcmp(BuiltinName+22, "56", 2))
                    IntrinsicID = Intrinsic::x86_avx_ptestc_256;
                  break;
                }
                break;
              case 'z':
                switch (BuiltinName[21]) {  // "__builtin_ia32_ptestz"
                case '1':
                  if (!memcmp(BuiltinName+22, "28", 2))
                    IntrinsicID = Intrinsic::x86_sse41_ptestz;
                  break;
                case '2':
                  if (!memcmp(BuiltinName+22, "56", 2))
                    IntrinsicID = Intrinsic::x86_avx_ptestz_256;
                  break;
                }
                break;
              }
            }
            break;
          case 'u':
            if (!memcmp(BuiltinName+17, "npck", 4)) {
              switch (BuiltinName[21]) {  // "__builtin_ia32_punpck"
              case 'h':
                switch (BuiltinName[22]) {  // "__builtin_ia32_punpckh"
                case 'b':
                  if (!memcmp(BuiltinName+23, "w", 1))
                    IntrinsicID = Intrinsic::x86_mmx_punpckhbw;
                  break;
                case 'd':
                  if (!memcmp(BuiltinName+23, "q", 1))
                    IntrinsicID = Intrinsic::x86_mmx_punpckhdq;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+23, "d", 1))
                    IntrinsicID = Intrinsic::x86_mmx_punpckhwd;
                  break;
                }
                break;
              case 'l':
                switch (BuiltinName[22]) {  // "__builtin_ia32_punpckl"
                case 'b':
                  if (!memcmp(BuiltinName+23, "w", 1))
                    IntrinsicID = Intrinsic::x86_mmx_punpcklbw;
                  break;
                case 'd':
                  if (!memcmp(BuiltinName+23, "q", 1))
                    IntrinsicID = Intrinsic::x86_mmx_punpckldq;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+23, "d", 1))
                    IntrinsicID = Intrinsic::x86_mmx_punpcklwd;
                  break;
                }
                break;
              }
            }
            break;
          }
          break;
        case 's':
          if (!memcmp(BuiltinName+16, "qrtp", 4)) {
            switch (BuiltinName[20]) {  // "__builtin_ia32_sqrtp"
            case 'd':
              if (!memcmp(BuiltinName+21, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_sqrt_pd_256;
              break;
            case 's':
              if (!memcmp(BuiltinName+21, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_sqrt_ps_256;
              break;
            }
          }
          break;
        case 'u':
          if (!memcmp(BuiltinName+16, "comisd", 6)) {
            switch (BuiltinName[22]) {  // "__builtin_ia32_ucomisd"
            case 'e':
              if (!memcmp(BuiltinName+23, "q", 1))
                IntrinsicID = Intrinsic::x86_sse2_ucomieq_sd;
              break;
            case 'g':
              switch (BuiltinName[23]) {  // "__builtin_ia32_ucomisdg"
              case 'e':
                IntrinsicID = Intrinsic::x86_sse2_ucomige_sd;
                break;
              case 't':
                IntrinsicID = Intrinsic::x86_sse2_ucomigt_sd;
                break;
              }
              break;
            case 'l':
              switch (BuiltinName[23]) {  // "__builtin_ia32_ucomisdl"
              case 'e':
                IntrinsicID = Intrinsic::x86_sse2_ucomile_sd;
                break;
              case 't':
                IntrinsicID = Intrinsic::x86_sse2_ucomilt_sd;
                break;
              }
              break;
            }
          }
          break;
        case 'v':
          if (!memcmp(BuiltinName+16, "permilp", 7)) {
            switch (BuiltinName[23]) {  // "__builtin_ia32_vpermilp"
            case 'd':
              IntrinsicID = Intrinsic::x86_avx_vpermil_pd;
              break;
            case 's':
              IntrinsicID = Intrinsic::x86_avx_vpermil_ps;
              break;
            }
          }
          break;
        }
      }
      break;
    case 25:
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
        case 'b':
          if (!memcmp(BuiltinName+16, "lendp", 5)) {
            switch (BuiltinName[21]) {  // "__builtin_ia32_blendp"
            case 'd':
              if (!memcmp(BuiltinName+22, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_blend_pd_256;
              break;
            case 's':
              if (!memcmp(BuiltinName+22, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_blend_ps_256;
              break;
            }
          }
          break;
        case 'c':
          if (!memcmp(BuiltinName+16, "vts", 3)) {
            switch (BuiltinName[19]) {  // "__builtin_ia32_cvts"
            case 'd':
              if (!memcmp(BuiltinName+20, "2si64", 5))
                IntrinsicID = Intrinsic::x86_sse2_cvtsd2si64;
              break;
            case 'i':
              if (!memcmp(BuiltinName+20, "642s", 4)) {
                switch (BuiltinName[24]) {  // "__builtin_ia32_cvtsi642s"
                case 'd':
                  IntrinsicID = Intrinsic::x86_sse2_cvtsi642sd;
                  break;
                case 's':
                  IntrinsicID = Intrinsic::x86_sse_cvtsi642ss;
                  break;
                }
              }
              break;
            case 's':
              if (!memcmp(BuiltinName+20, "2si64", 5))
                IntrinsicID = Intrinsic::x86_sse_cvtss2si64;
              break;
            }
          }
          break;
        case 'l':
          if (!memcmp(BuiltinName+16, "oad", 3)) {
            switch (BuiltinName[19]) {  // "__builtin_ia32_load"
            case 'd':
              if (!memcmp(BuiltinName+20, "qu256", 5))
                IntrinsicID = Intrinsic::x86_avx_loadu_dq_256;
              break;
            case 'u':
              if (!memcmp(BuiltinName+20, "p", 1)) {
                switch (BuiltinName[21]) {  // "__builtin_ia32_loadup"
                case 'd':
                  if (!memcmp(BuiltinName+22, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_loadu_pd_256;
                  break;
                case 's':
                  if (!memcmp(BuiltinName+22, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_loadu_ps_256;
                  break;
                }
              }
              break;
            }
          }
          break;
        case 'm':
          switch (BuiltinName[16]) {  // "__builtin_ia32_m"
          case 'a':
            if (!memcmp(BuiltinName+17, "sk", 2)) {
              switch (BuiltinName[19]) {  // "__builtin_ia32_mask"
              case 'l':
                if (!memcmp(BuiltinName+20, "oadp", 4)) {
                  switch (BuiltinName[24]) {  // "__builtin_ia32_maskloadp"
                  case 'd':
                    IntrinsicID = Intrinsic::x86_avx_maskload_pd;
                    break;
                  case 's':
                    IntrinsicID = Intrinsic::x86_avx_maskload_ps;
                    break;
                  }
                }
                break;
              case 'm':
                if (!memcmp(BuiltinName+20, "ovdqu", 5))
                  IntrinsicID = Intrinsic::x86_sse2_maskmov_dqu;
                break;
              }
            }
            break;
          case 'o':
            if (!memcmp(BuiltinName+17, "vnt", 3)) {
              switch (BuiltinName[20]) {  // "__builtin_ia32_movnt"
              case 'd':
                if (!memcmp(BuiltinName+21, "q256", 4))
                  IntrinsicID = Intrinsic::x86_avx_movnt_dq_256;
                break;
              case 'p':
                switch (BuiltinName[21]) {  // "__builtin_ia32_movntp"
                case 'd':
                  if (!memcmp(BuiltinName+22, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_movnt_pd_256;
                  break;
                case 's':
                  if (!memcmp(BuiltinName+22, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_movnt_ps_256;
                  break;
                }
                break;
              }
            }
            break;
          case 'p':
            if (!memcmp(BuiltinName+17, "sadbw128", 8))
              IntrinsicID = Intrinsic::x86_sse41_mpsadbw;
            break;
          }
          break;
        case 'p':
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
          case 'a':
            if (!memcmp(BuiltinName+17, "ddus", 4)) {
              switch (BuiltinName[21]) {  // "__builtin_ia32_paddus"
              case 'b':
                if (!memcmp(BuiltinName+22, "128", 3))
                  IntrinsicID = Intrinsic::x86_sse2_paddus_b;
                break;
              case 'w':
                if (!memcmp(BuiltinName+22, "128", 3))
                  IntrinsicID = Intrinsic::x86_sse2_paddus_w;
                break;
              }
            }
            break;
          case 'b':
            if (!memcmp(BuiltinName+17, "lendw128", 8))
              IntrinsicID = Intrinsic::x86_sse41_pblendw;
            break;
          case 'c':
            if (!memcmp(BuiltinName+17, "mp", 2)) {
              switch (BuiltinName[19]) {  // "__builtin_ia32_pcmp"
              case 'e':
                if (!memcmp(BuiltinName+20, "q", 1)) {
                  switch (BuiltinName[21]) {  // "__builtin_ia32_pcmpeq"
                  case 'b':
                    if (!memcmp(BuiltinName+22, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse2_pcmpeq_b;
                    break;
                  case 'd':
                    if (!memcmp(BuiltinName+22, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse2_pcmpeq_d;
                    break;
                  case 'w':
                    if (!memcmp(BuiltinName+22, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse2_pcmpeq_w;
                    break;
                  }
                }
                break;
              case 'g':
                if (!memcmp(BuiltinName+20, "t", 1)) {
                  switch (BuiltinName[21]) {  // "__builtin_ia32_pcmpgt"
                  case 'b':
                    if (!memcmp(BuiltinName+22, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse2_pcmpgt_b;
                    break;
                  case 'd':
                    if (!memcmp(BuiltinName+22, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse2_pcmpgt_d;
                    break;
                  case 'w':
                    if (!memcmp(BuiltinName+22, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse2_pcmpgt_w;
                    break;
                  }
                }
                break;
              }
            }
            break;
          case 'h':
            switch (BuiltinName[17]) {  // "__builtin_ia32_ph"
            case 'a':
              if (!memcmp(BuiltinName+18, "ddsw128", 7))
                IntrinsicID = Intrinsic::x86_ssse3_phadd_sw_128;
              break;
            case 's':
              if (!memcmp(BuiltinName+18, "ubsw128", 7))
                IntrinsicID = Intrinsic::x86_ssse3_phsub_sw_128;
              break;
            }
            break;
          case 'm':
            switch (BuiltinName[17]) {  // "__builtin_ia32_pm"
            case 'a':
              if (!memcmp(BuiltinName+18, "ddwd128", 7))
                IntrinsicID = Intrinsic::x86_sse2_pmadd_wd;
              break;
            case 'u':
              if (!memcmp(BuiltinName+18, "l", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmul"
                case 'h':
                  if (!memcmp(BuiltinName+20, "uw128", 5))
                    IntrinsicID = Intrinsic::x86_sse2_pmulhu_w;
                  break;
                case 'u':
                  if (!memcmp(BuiltinName+20, "dq128", 5))
                    IntrinsicID = Intrinsic::x86_sse2_pmulu_dq;
                  break;
                }
              }
              break;
            }
            break;
          case 's':
            switch (BuiltinName[17]) {  // "__builtin_ia32_ps"
            case 'l':
              if (!memcmp(BuiltinName+18, "ldqi128", 7))
                IntrinsicID = Intrinsic::x86_sse2_psll_dq;
              break;
            case 'r':
              if (!memcmp(BuiltinName+18, "ldqi128", 7))
                IntrinsicID = Intrinsic::x86_sse2_psrl_dq;
              break;
            case 'u':
              if (!memcmp(BuiltinName+18, "bus", 3)) {
                switch (BuiltinName[21]) {  // "__builtin_ia32_psubus"
                case 'b':
                  if (!memcmp(BuiltinName+22, "128", 3))
                    IntrinsicID = Intrinsic::x86_sse2_psubus_b;
                  break;
                case 'w':
                  if (!memcmp(BuiltinName+22, "128", 3))
                    IntrinsicID = Intrinsic::x86_sse2_psubus_w;
                  break;
                }
              }
              break;
            }
            break;
          }
          break;
        case 'r':
          switch (BuiltinName[16]) {  // "__builtin_ia32_r"
          case 'o':
            if (!memcmp(BuiltinName+17, "undp", 4)) {
              switch (BuiltinName[21]) {  // "__builtin_ia32_roundp"
              case 'd':
                if (!memcmp(BuiltinName+22, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_round_pd_256;
                break;
              case 's':
                if (!memcmp(BuiltinName+22, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_round_ps_256;
                break;
              }
            }
            break;
          case 's':
            if (!memcmp(BuiltinName+17, "qrtps256", 8))
              IntrinsicID = Intrinsic::x86_avx_rsqrt_ps_256;
            break;
          }
          break;
        case 's':
          if (!memcmp(BuiltinName+16, "torelv4si", 9))
            IntrinsicID = Intrinsic::x86_sse2_storel_dq;
          break;
        case 'u':
          if (!memcmp(BuiltinName+16, "comisdneq", 9))
            IntrinsicID = Intrinsic::x86_sse2_ucomineq_sd;
          break;
        case 'v':
          switch (BuiltinName[16]) {  // "__builtin_ia32_v"
          case 't':
            if (!memcmp(BuiltinName+17, "estnzcp", 7)) {
              switch (BuiltinName[24]) {  // "__builtin_ia32_vtestnzcp"
              case 'd':
                IntrinsicID = Intrinsic::x86_avx_vtestnzc_pd;
                break;
              case 's':
                IntrinsicID = Intrinsic::x86_avx_vtestnzc_ps;
                break;
              }
            }
            break;
          case 'z':
            if (!memcmp(BuiltinName+17, "eroupper", 8))
              IntrinsicID = Intrinsic::x86_avx_vzeroupper;
            break;
          }
          break;
        }
      }
      break;
    case 26:
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
        case 'a':
          if (!memcmp(BuiltinName+16, "ddsubp", 6)) {
            switch (BuiltinName[22]) {  // "__builtin_ia32_addsubp"
            case 'd':
              if (!memcmp(BuiltinName+23, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_addsub_pd_256;
              break;
            case 's':
              if (!memcmp(BuiltinName+23, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_addsub_ps_256;
              break;
            }
          }
          break;
        case 'b':
          if (!memcmp(BuiltinName+16, "lendvp", 6)) {
            switch (BuiltinName[22]) {  // "__builtin_ia32_blendvp"
            case 'd':
              if (!memcmp(BuiltinName+23, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_blendv_pd_256;
              break;
            case 's':
              if (!memcmp(BuiltinName+23, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_blendv_ps_256;
              break;
            }
          }
          break;
        case 'c':
          if (!memcmp(BuiltinName+16, "vt", 2)) {
            switch (BuiltinName[18]) {  // "__builtin_ia32_cvt"
            case 'd':
              if (!memcmp(BuiltinName+19, "q2p", 3)) {
                switch (BuiltinName[22]) {  // "__builtin_ia32_cvtdq2p"
                case 'd':
                  if (!memcmp(BuiltinName+23, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_cvtdq2_pd_256;
                  break;
                case 's':
                  if (!memcmp(BuiltinName+23, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_cvtdq2_ps_256;
                  break;
                }
              }
              break;
            case 'p':
              switch (BuiltinName[19]) {  // "__builtin_ia32_cvtp"
              case 'd':
                if (!memcmp(BuiltinName+20, "2", 1)) {
                  switch (BuiltinName[21]) {  // "__builtin_ia32_cvtpd2"
                  case 'd':
                    if (!memcmp(BuiltinName+22, "q256", 4))
                      IntrinsicID = Intrinsic::x86_avx_cvt_pd2dq_256;
                    break;
                  case 'p':
                    if (!memcmp(BuiltinName+22, "s256", 4))
                      IntrinsicID = Intrinsic::x86_avx_cvt_pd2_ps_256;
                    break;
                  }
                }
                break;
              case 's':
                if (!memcmp(BuiltinName+20, "2", 1)) {
                  switch (BuiltinName[21]) {  // "__builtin_ia32_cvtps2"
                  case 'd':
                    if (!memcmp(BuiltinName+22, "q256", 4))
                      IntrinsicID = Intrinsic::x86_avx_cvt_ps2dq_256;
                    break;
                  case 'p':
                    if (!memcmp(BuiltinName+22, "d256", 4))
                      IntrinsicID = Intrinsic::x86_avx_cvt_ps2_pd_256;
                    break;
                  }
                }
                break;
              }
              break;
            case 't':
              if (!memcmp(BuiltinName+19, "s", 1)) {
                switch (BuiltinName[20]) {  // "__builtin_ia32_cvtts"
                case 'd':
                  if (!memcmp(BuiltinName+21, "2si64", 5))
                    IntrinsicID = Intrinsic::x86_sse2_cvttsd2si64;
                  break;
                case 's':
                  if (!memcmp(BuiltinName+21, "2si64", 5))
                    IntrinsicID = Intrinsic::x86_sse_cvttss2si64;
                  break;
                }
              }
              break;
            }
          }
          break;
        case 'i':
          if (!memcmp(BuiltinName+16, "nsertps128", 10))
            IntrinsicID = Intrinsic::x86_sse41_insertps;
          break;
        case 'm':
          switch (BuiltinName[16]) {  // "__builtin_ia32_m"
          case 'a':
            if (!memcmp(BuiltinName+17, "skstorep", 8)) {
              switch (BuiltinName[25]) {  // "__builtin_ia32_maskstorep"
              case 'd':
                IntrinsicID = Intrinsic::x86_avx_maskstore_pd;
                break;
              case 's':
                IntrinsicID = Intrinsic::x86_avx_maskstore_ps;
                break;
              }
            }
            break;
          case 'o':
            if (!memcmp(BuiltinName+17, "vmskp", 5)) {
              switch (BuiltinName[22]) {  // "__builtin_ia32_movmskp"
              case 'd':
                if (!memcmp(BuiltinName+23, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_movmsk_pd_256;
                break;
              case 's':
                if (!memcmp(BuiltinName+23, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_movmsk_ps_256;
                break;
              }
            }
            break;
          }
          break;
        case 'p':
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
          case 'a':
            if (!memcmp(BuiltinName+17, "ck", 2)) {
              switch (BuiltinName[19]) {  // "__builtin_ia32_pack"
              case 's':
                if (!memcmp(BuiltinName+20, "s", 1)) {
                  switch (BuiltinName[21]) {  // "__builtin_ia32_packss"
                  case 'd':
                    if (!memcmp(BuiltinName+22, "w128", 4))
                      IntrinsicID = Intrinsic::x86_sse2_packssdw_128;
                    break;
                  case 'w':
                    if (!memcmp(BuiltinName+22, "b128", 4))
                      IntrinsicID = Intrinsic::x86_sse2_packsswb_128;
                    break;
                  }
                }
                break;
              case 'u':
                if (!memcmp(BuiltinName+20, "s", 1)) {
                  switch (BuiltinName[21]) {  // "__builtin_ia32_packus"
                  case 'd':
                    if (!memcmp(BuiltinName+22, "w128", 4))
                      IntrinsicID = Intrinsic::x86_sse41_packusdw;
                    break;
                  case 'w':
                    if (!memcmp(BuiltinName+22, "b128", 4))
                      IntrinsicID = Intrinsic::x86_sse2_packuswb_128;
                    break;
                  }
                }
                break;
              }
            }
            break;
          case 'b':
            if (!memcmp(BuiltinName+17, "lendvb128", 9))
              IntrinsicID = Intrinsic::x86_sse41_pblendvb;
            break;
          case 'm':
            switch (BuiltinName[17]) {  // "__builtin_ia32_pm"
            case 'o':
              if (!memcmp(BuiltinName+18, "v", 1)) {
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmov"
                case 'm':
                  if (!memcmp(BuiltinName+20, "skb128", 6))
                    IntrinsicID = Intrinsic::x86_sse2_pmovmskb_128;
                  break;
                case 's':
                  if (!memcmp(BuiltinName+20, "x", 1)) {
                    switch (BuiltinName[21]) {  // "__builtin_ia32_pmovsx"
                    case 'b':
                      switch (BuiltinName[22]) {  // "__builtin_ia32_pmovsxb"
                      case 'd':
                        if (!memcmp(BuiltinName+23, "128", 3))
                          IntrinsicID = Intrinsic::x86_sse41_pmovsxbd;
                        break;
                      case 'q':
                        if (!memcmp(BuiltinName+23, "128", 3))
                          IntrinsicID = Intrinsic::x86_sse41_pmovsxbq;
                        break;
                      case 'w':
                        if (!memcmp(BuiltinName+23, "128", 3))
                          IntrinsicID = Intrinsic::x86_sse41_pmovsxbw;
                        break;
                      }
                      break;
                    case 'd':
                      if (!memcmp(BuiltinName+22, "q128", 4))
                        IntrinsicID = Intrinsic::x86_sse41_pmovsxdq;
                      break;
                    case 'w':
                      switch (BuiltinName[22]) {  // "__builtin_ia32_pmovsxw"
                      case 'd':
                        if (!memcmp(BuiltinName+23, "128", 3))
                          IntrinsicID = Intrinsic::x86_sse41_pmovsxwd;
                        break;
                      case 'q':
                        if (!memcmp(BuiltinName+23, "128", 3))
                          IntrinsicID = Intrinsic::x86_sse41_pmovsxwq;
                        break;
                      }
                      break;
                    }
                  }
                  break;
                case 'z':
                  if (!memcmp(BuiltinName+20, "x", 1)) {
                    switch (BuiltinName[21]) {  // "__builtin_ia32_pmovzx"
                    case 'b':
                      switch (BuiltinName[22]) {  // "__builtin_ia32_pmovzxb"
                      case 'd':
                        if (!memcmp(BuiltinName+23, "128", 3))
                          IntrinsicID = Intrinsic::x86_sse41_pmovzxbd;
                        break;
                      case 'q':
                        if (!memcmp(BuiltinName+23, "128", 3))
                          IntrinsicID = Intrinsic::x86_sse41_pmovzxbq;
                        break;
                      case 'w':
                        if (!memcmp(BuiltinName+23, "128", 3))
                          IntrinsicID = Intrinsic::x86_sse41_pmovzxbw;
                        break;
                      }
                      break;
                    case 'd':
                      if (!memcmp(BuiltinName+22, "q128", 4))
                        IntrinsicID = Intrinsic::x86_sse41_pmovzxdq;
                      break;
                    case 'w':
                      switch (BuiltinName[22]) {  // "__builtin_ia32_pmovzxw"
                      case 'd':
                        if (!memcmp(BuiltinName+23, "128", 3))
                          IntrinsicID = Intrinsic::x86_sse41_pmovzxwd;
                        break;
                      case 'q':
                        if (!memcmp(BuiltinName+23, "128", 3))
                          IntrinsicID = Intrinsic::x86_sse41_pmovzxwq;
                        break;
                      }
                      break;
                    }
                  }
                  break;
                }
              }
              break;
            case 'u':
              if (!memcmp(BuiltinName+18, "lhrsw128", 8))
                IntrinsicID = Intrinsic::x86_ssse3_pmul_hr_sw_128;
              break;
            }
            break;
          case 't':
            if (!memcmp(BuiltinName+17, "estnzc", 6)) {
              switch (BuiltinName[23]) {  // "__builtin_ia32_ptestnzc"
              case '1':
                if (!memcmp(BuiltinName+24, "28", 2))
                  IntrinsicID = Intrinsic::x86_sse41_ptestnzc;
                break;
              case '2':
                if (!memcmp(BuiltinName+24, "56", 2))
                  IntrinsicID = Intrinsic::x86_avx_ptestnzc_256;
                break;
              }
            }
            break;
          }
          break;
        case 's':
          if (!memcmp(BuiltinName+16, "tore", 4)) {
            switch (BuiltinName[20]) {  // "__builtin_ia32_store"
            case 'd':
              if (!memcmp(BuiltinName+21, "qu256", 5))
                IntrinsicID = Intrinsic::x86_avx_storeu_dq_256;
              break;
            case 'u':
              if (!memcmp(BuiltinName+21, "p", 1)) {
                switch (BuiltinName[22]) {  // "__builtin_ia32_storeup"
                case 'd':
                  if (!memcmp(BuiltinName+23, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_storeu_pd_256;
                  break;
                case 's':
                  if (!memcmp(BuiltinName+23, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_storeu_ps_256;
                  break;
                }
              }
              break;
            }
          }
          break;
        case 'v':
          if (!memcmp(BuiltinName+16, "test", 4)) {
            switch (BuiltinName[20]) {  // "__builtin_ia32_vtest"
            case 'c':
              if (!memcmp(BuiltinName+21, "p", 1)) {
                switch (BuiltinName[22]) {  // "__builtin_ia32_vtestcp"
                case 'd':
                  if (!memcmp(BuiltinName+23, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_vtestc_pd_256;
                  break;
                case 's':
                  if (!memcmp(BuiltinName+23, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_vtestc_ps_256;
                  break;
                }
              }
              break;
            case 'z':
              if (!memcmp(BuiltinName+21, "p", 1)) {
                switch (BuiltinName[22]) {  // "__builtin_ia32_vtestzp"
                case 'd':
                  if (!memcmp(BuiltinName+23, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_vtestz_pd_256;
                  break;
                case 's':
                  if (!memcmp(BuiltinName+23, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_vtestz_ps_256;
                  break;
                }
              }
              break;
            }
          }
          break;
        }
      }
      break;
    case 27:
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
        case 'c':
          if (!memcmp(BuiltinName+16, "vttp", 4)) {
            switch (BuiltinName[20]) {  // "__builtin_ia32_cvttp"
            case 'd':
              if (!memcmp(BuiltinName+21, "2dq256", 6))
                IntrinsicID = Intrinsic::x86_avx_cvtt_pd2dq_256;
              break;
            case 's':
              if (!memcmp(BuiltinName+21, "2dq256", 6))
                IntrinsicID = Intrinsic::x86_avx_cvtt_ps2dq_256;
              break;
            }
          }
          break;
        case 'e':
          if (!memcmp(BuiltinName+16, "xtractps128", 11))
            IntrinsicID = Intrinsic::x86_sse41_extractps;
          break;
        case 'p':
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
          case 'c':
            if (!memcmp(BuiltinName+17, "mp", 2)) {
              switch (BuiltinName[19]) {  // "__builtin_ia32_pcmp"
              case 'e':
                if (!memcmp(BuiltinName+20, "str", 3)) {
                  switch (BuiltinName[23]) {  // "__builtin_ia32_pcmpestr"
                  case 'i':
                    if (!memcmp(BuiltinName+24, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse42_pcmpestri128;
                    break;
                  case 'm':
                    if (!memcmp(BuiltinName+24, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse42_pcmpestrm128;
                    break;
                  }
                }
                break;
              case 'i':
                if (!memcmp(BuiltinName+20, "str", 3)) {
                  switch (BuiltinName[23]) {  // "__builtin_ia32_pcmpistr"
                  case 'i':
                    if (!memcmp(BuiltinName+24, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse42_pcmpistri128;
                    break;
                  case 'm':
                    if (!memcmp(BuiltinName+24, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse42_pcmpistrm128;
                    break;
                  }
                }
                break;
              }
            }
            break;
          case 'm':
            if (!memcmp(BuiltinName+17, "addubsw128", 10))
              IntrinsicID = Intrinsic::x86_ssse3_pmadd_ub_sw_128;
            break;
          }
          break;
        case 'v':
          switch (BuiltinName[16]) {  // "__builtin_ia32_v"
          case 'b':
            if (!memcmp(BuiltinName+17, "roadcastss", 10))
              IntrinsicID = Intrinsic::x86_avx_vbroadcastss;
            break;
          case 'e':
            if (!memcmp(BuiltinName+17, "c_ext_v2si", 10))
              IntrinsicID = Intrinsic::x86_mmx_vec_ext_d;
            break;
          case 'p':
            if (!memcmp(BuiltinName+17, "ermil", 5)) {
              switch (BuiltinName[22]) {  // "__builtin_ia32_vpermil"
              case 'p':
                switch (BuiltinName[23]) {  // "__builtin_ia32_vpermilp"
                case 'd':
                  if (!memcmp(BuiltinName+24, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_vpermil_pd_256;
                  break;
                case 's':
                  if (!memcmp(BuiltinName+24, "256", 3))
                    IntrinsicID = Intrinsic::x86_avx_vpermil_ps_256;
                  break;
                }
                break;
              case 'v':
                if (!memcmp(BuiltinName+23, "arp", 3)) {
                  switch (BuiltinName[26]) {  // "__builtin_ia32_vpermilvarp"
                  case 'd':
                    IntrinsicID = Intrinsic::x86_avx_vpermilvar_pd;
                    break;
                  case 's':
                    IntrinsicID = Intrinsic::x86_avx_vpermilvar_ps;
                    break;
                  }
                }
                break;
              }
            }
            break;
          }
          break;
        }
      }
      break;
    case 28:
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
        case 'a':
          if (!memcmp(BuiltinName+16, "es", 2)) {
            switch (BuiltinName[18]) {  // "__builtin_ia32_aes"
            case 'd':
              if (!memcmp(BuiltinName+19, "eclast128", 9))
                IntrinsicID = Intrinsic::x86_aesni_aesdeclast;
              break;
            case 'e':
              if (!memcmp(BuiltinName+19, "nclast128", 9))
                IntrinsicID = Intrinsic::x86_aesni_aesenclast;
              break;
            }
          }
          break;
        case 'm':
          if (!memcmp(BuiltinName+16, "askloadp", 8)) {
            switch (BuiltinName[24]) {  // "__builtin_ia32_maskloadp"
            case 'd':
              if (!memcmp(BuiltinName+25, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_maskload_pd_256;
              break;
            case 's':
              if (!memcmp(BuiltinName+25, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_maskload_ps_256;
              break;
            }
          }
          break;
        case 'p':
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
          case 'c':
            if (!memcmp(BuiltinName+17, "mp", 2)) {
              switch (BuiltinName[19]) {  // "__builtin_ia32_pcmp"
              case 'e':
                if (!memcmp(BuiltinName+20, "stri", 4)) {
                  switch (BuiltinName[24]) {  // "__builtin_ia32_pcmpestri"
                  case 'a':
                    if (!memcmp(BuiltinName+25, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse42_pcmpestria128;
                    break;
                  case 'c':
                    if (!memcmp(BuiltinName+25, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse42_pcmpestric128;
                    break;
                  case 'o':
                    if (!memcmp(BuiltinName+25, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse42_pcmpestrio128;
                    break;
                  case 's':
                    if (!memcmp(BuiltinName+25, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse42_pcmpestris128;
                    break;
                  case 'z':
                    if (!memcmp(BuiltinName+25, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse42_pcmpestriz128;
                    break;
                  }
                }
                break;
              case 'i':
                if (!memcmp(BuiltinName+20, "stri", 4)) {
                  switch (BuiltinName[24]) {  // "__builtin_ia32_pcmpistri"
                  case 'a':
                    if (!memcmp(BuiltinName+25, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse42_pcmpistria128;
                    break;
                  case 'c':
                    if (!memcmp(BuiltinName+25, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse42_pcmpistric128;
                    break;
                  case 'o':
                    if (!memcmp(BuiltinName+25, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse42_pcmpistrio128;
                    break;
                  case 's':
                    if (!memcmp(BuiltinName+25, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse42_pcmpistris128;
                    break;
                  case 'z':
                    if (!memcmp(BuiltinName+25, "128", 3))
                      IntrinsicID = Intrinsic::x86_sse42_pcmpistriz128;
                    break;
                  }
                }
                break;
              }
            }
            break;
          case 'h':
            if (!memcmp(BuiltinName+17, "minposuw128", 11))
              IntrinsicID = Intrinsic::x86_sse41_phminposuw;
            break;
          }
          break;
        case 'v':
          switch (BuiltinName[16]) {  // "__builtin_ia32_v"
          case 'e':
            if (!memcmp(BuiltinName+17, "c_init_v", 8)) {
              switch (BuiltinName[25]) {  // "__builtin_ia32_vec_init_v"
              case '2':
                if (!memcmp(BuiltinName+26, "si", 2))
                  IntrinsicID = Intrinsic::x86_mmx_vec_init_d;
                break;
              case '4':
                if (!memcmp(BuiltinName+26, "hi", 2))
                  IntrinsicID = Intrinsic::x86_mmx_vec_init_w;
                break;
              case '8':
                if (!memcmp(BuiltinName+26, "qi", 2))
                  IntrinsicID = Intrinsic::x86_mmx_vec_init_b;
                break;
              }
            }
            break;
          case 't':
            if (!memcmp(BuiltinName+17, "estnzcp", 7)) {
              switch (BuiltinName[24]) {  // "__builtin_ia32_vtestnzcp"
              case 'd':
                if (!memcmp(BuiltinName+25, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_vtestnzc_pd_256;
                break;
              case 's':
                if (!memcmp(BuiltinName+25, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_vtestnzc_ps_256;
                break;
              }
            }
            break;
          }
          break;
        }
      }
      break;
    case 29:
      if (!memcmp(BuiltinName, "__builtin_ia32_maskstorep", 25)) {
        switch (BuiltinName[25]) {  // "__builtin_ia32_maskstorep"
        case 'd':
          if (!memcmp(BuiltinName+26, "256", 3))
            IntrinsicID = Intrinsic::x86_avx_maskstore_pd_256;
          break;
        case 's':
          if (!memcmp(BuiltinName+26, "256", 3))
            IntrinsicID = Intrinsic::x86_avx_maskstore_ps_256;
          break;
        }
      }
      break;
    case 30:
      if (!memcmp(BuiltinName, "__builtin_ia32_v", 16)) {
        switch (BuiltinName[16]) {  // "__builtin_ia32_v"
        case 'b':
          if (!memcmp(BuiltinName+17, "roadcasts", 9)) {
            switch (BuiltinName[26]) {  // "__builtin_ia32_vbroadcasts"
            case 'd':
              if (!memcmp(BuiltinName+27, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_vbroadcast_sd_256;
              break;
            case 's':
              if (!memcmp(BuiltinName+27, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_vbroadcastss_256;
              break;
            }
          }
          break;
        case 'p':
          if (!memcmp(BuiltinName+17, "ermilvarp", 9)) {
            switch (BuiltinName[26]) {  // "__builtin_ia32_vpermilvarp"
            case 'd':
              if (!memcmp(BuiltinName+27, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_vpermilvar_pd_256;
              break;
            case 's':
              if (!memcmp(BuiltinName+27, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_vpermilvar_ps_256;
              break;
            }
          }
          break;
        }
      }
      break;
    case 31:
      if (!memcmp(BuiltinName, "__builtin_ia32_vperm2f128_", 26)) {
        switch (BuiltinName[26]) {  // "__builtin_ia32_vperm2f128_"
        case 'p':
          switch (BuiltinName[27]) {  // "__builtin_ia32_vperm2f128_p"
          case 'd':
            if (!memcmp(BuiltinName+28, "256", 3))
              IntrinsicID = Intrinsic::x86_avx_vperm2f128_pd_256;
            break;
          case 's':
            if (!memcmp(BuiltinName+28, "256", 3))
              IntrinsicID = Intrinsic::x86_avx_vperm2f128_ps_256;
            break;
          }
          break;
        case 's':
          if (!memcmp(BuiltinName+27, "i256", 4))
            IntrinsicID = Intrinsic::x86_avx_vperm2f128_si_256;
          break;
        }
      }
      break;
    case 32:
      if (!memcmp(BuiltinName, "__builtin_ia32_vinsertf128_", 27)) {
        switch (BuiltinName[27]) {  // "__builtin_ia32_vinsertf128_"
        case 'p':
          switch (BuiltinName[28]) {  // "__builtin_ia32_vinsertf128_p"
          case 'd':
            if (!memcmp(BuiltinName+29, "256", 3))
              IntrinsicID = Intrinsic::x86_avx_vinsertf128_pd_256;
            break;
          case 's':
            if (!memcmp(BuiltinName+29, "256", 3))
              IntrinsicID = Intrinsic::x86_avx_vinsertf128_ps_256;
            break;
          }
          break;
        case 's':
          if (!memcmp(BuiltinName+28, "i256", 4))
            IntrinsicID = Intrinsic::x86_avx_vinsertf128_si_256;
          break;
        }
      }
      break;
    case 33:
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
        case 'a':
          if (!memcmp(BuiltinName+16, "eskeygenassist128", 17))
            IntrinsicID = Intrinsic::x86_aesni_aeskeygenassist;
          break;
        case 'v':
          if (!memcmp(BuiltinName+16, "extractf128_", 12)) {
            switch (BuiltinName[28]) {  // "__builtin_ia32_vextractf128_"
            case 'p':
              switch (BuiltinName[29]) {  // "__builtin_ia32_vextractf128_p"
              case 'd':
                if (!memcmp(BuiltinName+30, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_vextractf128_pd_256;
                break;
              case 's':
                if (!memcmp(BuiltinName+30, "256", 3))
                  IntrinsicID = Intrinsic::x86_avx_vextractf128_ps_256;
                break;
              }
              break;
            case 's':
              if (!memcmp(BuiltinName+29, "i256", 4))
                IntrinsicID = Intrinsic::x86_avx_vextractf128_si_256;
              break;
            }
          }
          break;
        }
      }
      break;
    case 35:
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
        case 'p':
          if (!memcmp(BuiltinName+16, "s", 1)) {
            switch (BuiltinName[17]) {  // "__builtin_ia32_ps"
            case 'l':
              if (!memcmp(BuiltinName+18, "ldqi128_byteshift", 17))
                IntrinsicID = Intrinsic::x86_sse2_psll_dq_bs;
              break;
            case 'r':
              if (!memcmp(BuiltinName+18, "ldqi128_byteshift", 17))
                IntrinsicID = Intrinsic::x86_sse2_psrl_dq_bs;
              break;
            }
          }
          break;
        case 'v':
          if (!memcmp(BuiltinName+16, "broadcastf128_p", 15)) {
            switch (BuiltinName[31]) {  // "__builtin_ia32_vbroadcastf128_p"
            case 'd':
              if (!memcmp(BuiltinName+32, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_vbroadcastf128_pd_256;
              break;
            case 's':
              if (!memcmp(BuiltinName+32, "256", 3))
                IntrinsicID = Intrinsic::x86_avx_vbroadcastf128_ps_256;
              break;
            }
          }
          break;
        }
      }
      break;
    }
  }
  return IntrinsicID;
}
#endif

#if defined(_MSC_VER) && defined(setjmp_undefined_for_visual_studio)
// let's return it to _setjmp state
#define setjmp _setjmp
#endif

