This is m68k-rtems-as.info, produced by makeinfo version 4.6 from
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START-INFO-DIR-ENTRY
* As: (m68k-rtems-as).                     The GNU assembler.
* Gas: (m68k-rtems-as).                    The GNU assembler.
END-INFO-DIR-ENTRY

   This file documents the GNU Assembler "as".

   Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002
Free Software Foundation, Inc.

   Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.1 or
any later version published by the Free Software Foundation; with no
Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
Texts.  A copy of the license is included in the section entitled "GNU
Free Documentation License".


File: m68k-rtems-as.info,  Node: Top,  Next: Overview,  Up: (dir)

Using as
********

This file is a user guide to the GNU assembler `as' version 2.13.2.1.

   This document is distributed under the terms of the GNU Free
Documentation License.  A copy of the license is included in the
section entitled "GNU Free Documentation License".

* Menu:

* Overview::                    Overview
* Invoking::                    Command-Line Options
* Syntax::                      Syntax
* Sections::                    Sections and Relocation
* Symbols::                     Symbols
* Expressions::                 Expressions
* Pseudo Ops::                  Assembler Directives
* Machine Dependencies::        Machine Dependent Features
* Reporting Bugs::              Reporting Bugs
* Acknowledgements::            Who Did What
* GNU Free Documentation License::  GNU Free Documentation License
* Index::                       Index


File: m68k-rtems-as.info,  Node: Overview,  Next: Invoking,  Prev: Top,  Up: Top

Overview
********

Here is a brief summary of how to invoke `as'.  For details, *note
Comand-Line Options: Invoking..

     as [-a[cdhlns][=FILE]] [-D] [-defsym SYM=VAL]
      [-f] [-gstabs] [-gdwarf2] [-help] [-I DIR]
      [-J] [-K] [-L]
      [-listing-lhs-width=NUM] [-listing-lhs-width2=NUM]
      [-listing-rhs-width=NUM] [-listing-cont-lines=NUM]
      [-keep-locals] [-o OBJFILE] [-R] [-statistics] [-v]
      [-version] [-version] [-W] [-warn] [-fatal-warnings]
      [-w] [-x] [-Z] [-target-help] [TARGET-OPTIONS]
      [-|FILES ...]
     
     _Target Alpha options:_
        [-mCPU]
        [-mdebug | -no-mdebug]
        [-relax] [-g] [-GSIZE]
        [-F] [-32addr]
     
     _Target ARC options:_
        [-marc[5|6|7|8]]
        [-EB|-EL]
     
     _Target ARM options:_
        [-mcpu=PROCESSOR[+EXTENSION...]]
        [-march=ARCHITECTURE[+EXTENSION...]]
        [-mfpu=FLOATING-POINT-FROMAT]
        [-mthumb]
        [-EB|-EL]
        [-mapcs-32|-mapcs-26|-mapcs-float|
         -mapcs-reentrant]
        [-mthumb-interwork] [-moabi] [-k]
     
     _Target CRIS options:_
        [-underscore | -no-underscore]
        [-pic] [-N]
        [-emulation=criself | -emulation=crisaout]
     
     _Target D10V options:_
        [-O]
     
     _Target D30V options:_
        [-O|-n|-N]
     
     _Target i386 options:_
        [-32|-64]
     
     _Target i960 options:_
        [-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB|
         -AKC|-AMC]
        [-b] [-no-relax]
     
     _Target M32R options:_
        [-m32rx|-[no-]warn-explicit-parallel-conflicts|
        -W[n]p]
     
     _Target M680X0 options:_
        [-l] [-m68000|-m68010|-m68020|...]
     
     _Target M68HC11 options:_
        [-m68hc11|-m68hc12]
        [-force-long-branchs] [-short-branchs]
        [-strict-direct-mode] [-print-insn-syntax]
        [-print-opcodes] [-generate-example]
     
     _Target MCORE options:_
        [-jsri2bsr] [-sifilter] [-relax]
        [-mcpu=[210|340]]
     
     _Target MIPS options:_
        [-nocpp] [-EL] [-EB] [-n] [-O[OPTIMIZATION LEVEL]]
        [-g[DEBUG LEVEL]] [-G NUM] [-KPIC] [-call_shared]
        [-non_shared] [-xgot] [-membedded-pic]
        [-mabi=ABI] [-32] [-n32] [-64] [-mfp32] [-mgp32]
        [-march=CPU] [-mtune=CPU] [-mips1] [-mips2]
        [-mips3] [-mips4] [-mips5] [-mips32] [-mips64]
        [-construct-floats] [-no-construct-floats]
        [-trap] [-no-break] [-break] [-no-trap]
        [-mfix7000] [-mno-fix7000]
        [-mips16] [-no-mips16]
        [-mips3d] [-no-mips3d]
        [-mdmx] [-no-mdmx]
        [-mdebug] [-no-mdebug]
     
     _Target MMIX options:_
        [-fixed-special-register-names] [-globalize-symbols]
        [-gnu-syntax] [-relax] [-no-predefined-symbols]
        [-no-expand] [-no-merge-gregs] [-x]
        [-linker-allocated-gregs]
     
     _Target PDP11 options:_
        [-mpic|-mno-pic] [-mall] [-mno-extensions]
        [-mEXTENSION|-mno-EXTENSION]
        [-mCPU] [-mMACHINE]
     
     _Target picoJava options:_
        [-mb|-me]
     
     _Target PowerPC options:_
        [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604|
         -m403|-m405|-mppc64|-m620|-mppc64bridge|-mbooke|
         -mbooke32|-mbooke64]
        [-mcom|-many|-maltivec] [-memb]
        [-mregnames|-mno-regnames]
        [-mrelocatable|-mrelocatable-lib]
        [-mlittle|-mlittle-endian|-mbig|-mbig-endian]
        [-msolaris|-mno-solaris]
     
     _Target SPARC options:_
        [-Av6|-Av7|-Av8|-Asparclet|-Asparclite
         -Av8plus|-Av8plusa|-Av9|-Av9a]
        [-xarch=v8plus|-xarch=v8plusa] [-bump]
        [-32|-64]

`-a[cdhlmns]'
     Turn on listings, in any of a variety of ways:

    `-ac'
          omit false conditionals

    `-ad'
          omit debugging directives

    `-ah'
          include high-level source

    `-al'
          include assembly

    `-am'
          include macro expansions

    `-an'
          omit forms processing

    `-as'
          include symbols

    `=file'
          set the name of the listing file

     You may combine these options; for example, use `-aln' for assembly
     listing without forms processing.  The `=file' option, if used,
     must be the last one.  By itself, `-a' defaults to `-ahls'.

`-D'
     Ignored.  This option is accepted for script compatibility with
     calls to other assemblers.

`--defsym SYM=VALUE'
     Define the symbol SYM to be VALUE before assembling the input file.
     VALUE must be an integer constant.  As in C, a leading `0x'
     indicates a hexadecimal value, and a leading `0' indicates an
     octal value.

`-f'
     "fast"--skip whitespace and comment preprocessing (assume source is
     compiler output).

`--gstabs'
     Generate stabs debugging information for each assembler line.  This
     may help debugging assembler code, if the debugger can handle it.

`--gdwarf2'
     Generate DWARF2 debugging information for each assembler line.
     This may help debugging assembler code, if the debugger can handle
     it.  Note - this option is only supported by some targets, not all
     of them.

`--help'
     Print a summary of the command line options and exit.

`--target-help'
     Print a summary of all target specific options and exit.

`-I DIR'
     Add directory DIR to the search list for `.include' directives.

`-J'
     Don't warn about signed overflow.

`-K'
     Issue warnings when difference tables altered for long
     displacements.

`-L'
`--keep-locals'
     Keep (in the symbol table) local symbols.  On traditional a.out
     systems these start with `L', but different systems have different
     local label prefixes.

`--listing-lhs-width=NUMBER'
     Set the maximum width, in words, of the output data column for an
     assembler listing to NUMBER.

`--listing-lhs-width2=NUMBER'
     Set the maximum width, in words, of the output data column for
     continuation lines in an assembler listing to NUMBER.

`--listing-rhs-width=NUMBER'
     Set the maximum width of an input source line, as displayed in a
     listing, to NUMBER bytes.

`--listing-cont-lines=NUMBER'
     Set the maximum number of lines printed in a listing for a single
     line of input to NUMBER + 1.

`-o OBJFILE'
     Name the object-file output from `as' OBJFILE.

`-R'
     Fold the data section into the text section.

`--statistics'
     Print the maximum space (in bytes) and total time (in seconds)
     used by assembly.

`--strip-local-absolute'
     Remove local absolute symbols from the outgoing symbol table.

`-v'
`-version'
     Print the `as' version.

`--version'
     Print the `as' version and exit.

`-W'
`--no-warn'
     Suppress warning messages.

`--fatal-warnings'
     Treat warnings as errors.

`--warn'
     Don't suppress warning messages or treat them as errors.

`-w'
     Ignored.

`-x'
     Ignored.

`-Z'
     Generate an object file even after errors.

`-- | FILES ...'
     Standard input, or source files to assemble.


   The following options are available when as is configured for an ARC
processor.

`-marc[5|6|7|8]'
     This option selects the core processor variant.

`-EB | -EL'
     Select either big-endian (-EB) or little-endian (-EL) output.

   The following options are available when as is configured for the ARM
processor family.

`-mcpu=PROCESSOR[+EXTENSION...]'
     Specify which ARM processor variant is the target.

`-march=ARCHITECTURE[+EXTENSION...]'
     Specify which ARM architecture variant is used by the target.

`-mfpu=FLOATING-POINT-FORMAT'
     Select which Floating Point architecture is the target.

`-mthumb'
     Enable Thumb only instruction decoding.

`-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant | -moabi'
     Select which procedure calling convention is in use.

`-EB | -EL'
     Select either big-endian (-EB) or little-endian (-EL) output.

`-mthumb-interwork'
     Specify that the code has been generated with interworking between
     Thumb and ARM code in mind.

`-k'
     Specify that PIC code has been generated.

   See the info pages for documentation of the CRIS-specific options.

   The following options are available when as is configured for a D10V
processor.
`-O'
     Optimize output by parallelizing instructions.

   The following options are available when as is configured for a D30V
processor.
`-O'
     Optimize output by parallelizing instructions.

`-n'
     Warn when nops are generated.

`-N'
     Warn when a nop after a 32-bit multiply instruction is generated.

   The following options are available when as is configured for the
Intel 80960 processor.

`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC'
     Specify which variant of the 960 architecture is the target.

`-b'
     Add code to collect statistics about branches taken.

`-no-relax'
     Do not alter compare-and-branch instructions for long
     displacements; error if necessary.


   The following options are available when as is configured for the
Mitsubishi M32R series.

`--m32rx'
     Specify which processor in the M32R family is the target.  The
     default is normally the M32R, but this option changes it to the
     M32RX.

`--warn-explicit-parallel-conflicts or --Wp'
     Produce warning messages when questionable parallel constructs are
     encountered.

`--no-warn-explicit-parallel-conflicts or --Wnp'
     Do not produce warning messages when questionable parallel
     constructs are encountered.


   The following options are available when as is configured for the
Motorola 68000 series.

`-l'
     Shorten references to undefined symbols, to one word instead of
     two.

`-m68000 | -m68008 | -m68010 | -m68020 | -m68030'
`| -m68040 | -m68060 | -m68302 | -m68331 | -m68332'
`| -m68333 | -m68340 | -mcpu32 | -m5200'
     Specify what processor in the 68000 family is the target.  The
     default is normally the 68020, but this can be changed at
     configuration time.

`-m68881 | -m68882 | -mno-68881 | -mno-68882'
     The target machine does (or does not) have a floating-point
     coprocessor.  The default is to assume a coprocessor for 68020,
     68030, and cpu32.  Although the basic 68000 is not compatible with
     the 68881, a combination of the two can be specified, since it's
     possible to do emulation of the coprocessor instructions with the
     main processor.

`-m68851 | -mno-68851'
     The target machine does (or does not) have a memory-management
     unit coprocessor.  The default is to assume an MMU for 68020 and
     up.


   For details about the PDP-11 machine dependent features options, see
*Note PDP-11-Options::.

`-mpic | -mno-pic'
     Generate position-independent (or position-dependent) code.  The
     default is `-mpic'.

`-mall'
`-mall-extensions'
     Enable all instruction set extensions.  This is the default.

`-mno-extensions'
     Disable all instruction set extensions.

`-mEXTENSION | -mno-EXTENSION'
     Enable (or disable) a particular instruction set extension.

`-mCPU'
     Enable the instruction set extensions supported by a particular
     CPU, and disable all other extensions.

`-mMACHINE'
     Enable the instruction set extensions supported by a particular
     machine model, and disable all other extensions.

   The following options are available when as is configured for a
picoJava processor.

`-mb'
     Generate "big endian" format output.

`-ml'
     Generate "little endian" format output.


   The following options are available when as is configured for the
Motorola 68HC11 or 68HC12 series.

`-m68hc11 | -m68hc12'
     Specify what processor is the target.  The default is defined by
     the configuration option when building the assembler.

`--force-long-branchs'
     Relative branches are turned into absolute ones. This concerns
     conditional branches, unconditional branches and branches to a sub
     routine.

`-S | --short-branchs'
     Do not turn relative branchs into absolute ones when the offset is
     out of range.

`--strict-direct-mode'
     Do not turn the direct addressing mode into extended addressing
     mode when the instruction does not support direct addressing mode.

`--print-insn-syntax'
     Print the syntax of instruction in case of error.

`--print-opcodes'
     print the list of instructions with syntax and then exit.

`--generate-example'
     print an example of instruction for each possible instruction and
     then exit.  This option is only useful for testing `as'.


   The following options are available when `as' is configured for the
SPARC architecture:

`-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite'
`-Av8plus | -Av8plusa | -Av9 | -Av9a'
     Explicitly select a variant of the SPARC architecture.

     `-Av8plus' and `-Av8plusa' select a 32 bit environment.  `-Av9'
     and `-Av9a' select a 64 bit environment.

     `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with
     UltraSPARC extensions.

`-xarch=v8plus | -xarch=v8plusa'
     For compatibility with the Solaris v9 assembler.  These options are
     equivalent to -Av8plus and -Av8plusa, respectively.

`-bump'
     Warn when the assembler switches to another architecture.

   The following options are available when as is configured for a MIPS
processor.

`-G NUM'
     This option sets the largest size of an object that can be
     referenced implicitly with the `gp' register.  It is only accepted
     for targets that use ECOFF format, such as a DECstation running
     Ultrix.  The default value is 8.

`-EB'
     Generate "big endian" format output.

`-EL'
     Generate "little endian" format output.

`-mips1'
`-mips2'
`-mips3'
`-mips4'
`-mips5'
`-mips32'
`-mips64'
     Generate code for a particular MIPS Instruction Set Architecture
     level.  `-mips1' is an alias for `-march=r3000', `-mips2' is an
     alias for `-march=r6000', `-mips3' is an alias for `-march=r4000'
     and `-mips4' is an alias for `-march=r8000'.  `-mips5', `-mips32',
     and `-mips64' correspond to generic `MIPS V', `MIPS32', and
     `MIPS64' ISA processors, respectively.

`-march=CPU'
     Generate code for a particular MIPS cpu.

`-mtune=CPU'
     Schedule and tune for a particular MIPS cpu.

`-mfix7000'
`-mno-fix7000'
     Cause nops to be inserted if the read of the destination register
     of an mfhi or mflo instruction occurs in the following two
     instructions.

`-mdebug'
`-no-mdebug'
     Cause stabs-style debugging output to go into an ECOFF-style
     .mdebug section instead of the standard ELF .stabs sections.

`-mgp32'
`-mfp32'
     The register sizes are normally inferred from the ISA and ABI, but
     these flags force a certain group of registers to be treated as 32
     bits wide at all times.  `-mgp32' controls the size of
     general-purpose registers and `-mfp32' controls the size of
     floating-point registers.

`-mips16'
`-no-mips16'
     Generate code for the MIPS 16 processor.  This is equivalent to
     putting `.set mips16' at the start of the assembly file.
     `-no-mips16' turns off this option.

`-mips3d'
`-no-mips3d'
     Generate code for the MIPS-3D Application Specific Extension.
     This tells the assembler to accept MIPS-3D instructions.
     `-no-mips3d' turns off this option.

`-mdmx'
`-no-mdmx'
     Generate code for the MDMX Application Specific Extension.  This
     tells the assembler to accept MDMX instructions.  `-no-mdmx' turns
     off this option.

`--construct-floats'
`--no-construct-floats'
     The `--no-construct-floats' option disables the construction of
     double width floating point constants by loading the two halves of
     the value into the two single width floating point registers that
     make up the double width register.  By default
     `--construct-floats' is selected, allowing construction of these
     floating point constants.

`--emulation=NAME'
     This option causes `as' to emulate `as' configured for some other
     target, in all respects, including output format (choosing between
     ELF and ECOFF only), handling of pseudo-opcodes which may generate
     debugging information or store symbol table information, and
     default endianness.  The available configuration names are:
     `mipsecoff', `mipself', `mipslecoff', `mipsbecoff', `mipslelf',
     `mipsbelf'.  The first two do not alter the default endianness
     from that of the primary target for which the assembler was
     configured; the others change the default to little- or big-endian
     as indicated by the `b' or `l' in the name.  Using `-EB' or `-EL'
     will override the endianness selection in any case.

     This option is currently supported only when the primary target
     `as' is configured for is a MIPS ELF or ECOFF target.
     Furthermore, the primary target or others specified with
     `--enable-targets=...' at configuration time must include support
     for the other format, if both are to be available.  For example,
     the Irix 5 configuration includes support for both.

     Eventually, this option will support more configurations, with more
     fine-grained control over the assembler's behavior, and will be
     supported for more processors.

`-nocpp'
     `as' ignores this option.  It is accepted for compatibility with
     the native tools.

`--trap'
`--no-trap'
`--break'
`--no-break'
     Control how to deal with multiplication overflow and division by
     zero.  `--trap' or `--no-break' (which are synonyms) take a trap
     exception (and only work for Instruction Set Architecture level 2
     and higher); `--break' or `--no-trap' (also synonyms, and the
     default) take a break exception.

`-n'
     When this option is used, `as' will issue a warning every time it
     generates a nop instruction from a macro.

   The following options are available when as is configured for an
MCore processor.

`-jsri2bsr'
`-nojsri2bsr'
     Enable or disable the JSRI to BSR transformation.  By default this
     is enabled.  The command line option `-nojsri2bsr' can be used to
     disable it.

`-sifilter'
`-nosifilter'
     Enable or disable the silicon filter behaviour.  By default this
     is disabled.  The default can be overridden by the `-sifilter'
     command line option.

`-relax'
     Alter jump instructions for long displacements.

`-mcpu=[210|340]'
     Select the cpu type on the target hardware.  This controls which
     instructions can be assembled.

`-EB'
     Assemble for a big endian target.

`-EL'
     Assemble for a little endian target.


   See the info pages for documentation of the MMIX-specific options.

* Menu:

* Manual::                      Structure of this Manual
* GNU Assembler::               The GNU Assembler
* Object Formats::              Object File Formats
* Command Line::                Command Line
* Input Files::                 Input Files
* Object::                      Output (Object) File
* Errors::                      Error and Warning Messages


File: m68k-rtems-as.info,  Node: Manual,  Next: GNU Assembler,  Up: Overview

Structure of this Manual
========================

This manual is intended to describe what you need to know to use GNU
`as'.  We cover the syntax expected in source files, including notation
for symbols, constants, and expressions; the directives that `as'
understands; and of course how to invoke `as'.

   This manual also describes some of the machine-dependent features of
various flavors of the assembler.

   On the other hand, this manual is _not_ intended as an introduction
to programming in assembly language--let alone programming in general!
In a similar vein, we make no attempt to introduce the machine
architecture; we do _not_ describe the instruction set, standard
mnemonics, registers or addressing modes that are standard to a
particular architecture.  You may want to consult the manufacturer's
machine architecture manual for this information.


File: m68k-rtems-as.info,  Node: GNU Assembler,  Next: Object Formats,  Prev: Manual,  Up: Overview

The GNU Assembler
=================

GNU `as' is really a family of assemblers.  If you use (or have used)
the GNU assembler on one architecture, you should find a fairly similar
environment when you use it on another architecture.  Each version has
much in common with the others, including object file formats, most
assembler directives (often called "pseudo-ops") and assembler syntax.

   `as' is primarily intended to assemble the output of the GNU C
compiler `gcc' for use by the linker `ld'.  Nevertheless, we've tried
to make `as' assemble correctly everything that other assemblers for
the same machine would assemble.  Any exceptions are documented
explicitly (*note Machine Dependencies::).  This doesn't mean `as'
always uses the same syntax as another assembler for the same
architecture; for example, we know of several incompatible versions of
680x0 assembly language syntax.

   Unlike older assemblers, `as' is designed to assemble a source
program in one pass of the source file.  This has a subtle impact on the
`.org' directive (*note `.org': Org.).


File: m68k-rtems-as.info,  Node: Object Formats,  Next: Command Line,  Prev: GNU Assembler,  Up: Overview

Object File Formats
===================

The GNU assembler can be configured to produce several alternative
object file formats.  For the most part, this does not affect how you
write assembly language programs; but directives for debugging symbols
are typically different in different file formats.  *Note Symbol
Attributes: Symbol Attributes.


File: m68k-rtems-as.info,  Node: Command Line,  Next: Input Files,  Prev: Object Formats,  Up: Overview

Command Line
============

After the program name `as', the command line may contain options and
file names.  Options may appear in any order, and may be before, after,
or between file names.  The order of file names is significant.

   `--' (two hyphens) by itself names the standard input file
explicitly, as one of the files for `as' to assemble.

   Except for `--' any command line argument that begins with a hyphen
(`-') is an option.  Each option changes the behavior of `as'.  No
option changes the way another option works.  An option is a `-'
followed by one or more letters; the case of the letter is important.
All options are optional.

   Some options expect exactly one file name to follow them.  The file
name may either immediately follow the option's letter (compatible with
older assemblers) or it may be the next command argument (GNU
standard).  These two command lines are equivalent:

     as -o my-object-file.o mumble.s
     as -omy-object-file.o mumble.s


File: m68k-rtems-as.info,  Node: Input Files,  Next: Object,  Prev: Command Line,  Up: Overview

Input Files
===========

We use the phrase "source program", abbreviated "source", to describe
the program input to one run of `as'.  The program may be in one or
more files; how the source is partitioned into files doesn't change the
meaning of the source.

   The source program is a concatenation of the text in all the files,
in the order specified.

   Each time you run `as' it assembles exactly one source program.  The
source program is made up of one or more files.  (The standard input is
also a file.)

   You give `as' a command line that has zero or more input file names.
The input files are read (from left file name to right).  A command
line argument (in any position) that has no special meaning is taken to
be an input file name.

   If you give `as' no file names it attempts to read one input file
from the `as' standard input, which is normally your terminal.  You may
have to type <ctl-D> to tell `as' there is no more program to assemble.

   Use `--' if you need to explicitly name the standard input file in
your command line.

   If the source is empty, `as' produces a small, empty object file.

Filenames and Line-numbers
--------------------------

There are two ways of locating a line in the input file (or files) and
either may be used in reporting error messages.  One way refers to a
line number in a physical file; the other refers to a line number in a
"logical" file.  *Note Error and Warning Messages: Errors.

   "Physical files" are those files named in the command line given to
`as'.

   "Logical files" are simply names declared explicitly by assembler
directives; they bear no relation to physical files.  Logical file
names help error messages reflect the original source file, when `as'
source is itself synthesized from other files.  `as' understands the
`#' directives emitted by the `gcc' preprocessor.  See also *Note
`.file': File.


File: m68k-rtems-as.info,  Node: Object,  Next: Errors,  Prev: Input Files,  Up: Overview

Output (Object) File
====================

Every time you run `as' it produces an output file, which is your
assembly language program translated into numbers.  This file is the
object file.  Its default name is `a.out', or `b.out' when `as' is
configured for the Intel 80960.  You can give it another name by using
the `-o' option.  Conventionally, object file names end with `.o'.  The
default name is used for historical reasons: older assemblers were
capable of assembling self-contained programs directly into a runnable
program.  (For some formats, this isn't currently possible, but it can
be done for the `a.out' format.)

   The object file is meant for input to the linker `ld'.  It contains
assembled program code, information to help `ld' integrate the
assembled program into a runnable file, and (optionally) symbolic
information for the debugger.


File: m68k-rtems-as.info,  Node: Errors,  Prev: Object,  Up: Overview

Error and Warning Messages
==========================

`as' may write warnings and error messages to the standard error file
(usually your terminal).  This should not happen when  a compiler runs
`as' automatically.  Warnings report an assumption made so that `as'
could keep assembling a flawed program; errors report a grave problem
that stops the assembly.

   Warning messages have the format

     file_name:NNN:Warning Message Text

(where NNN is a line number).  If a logical file name has been given
(*note `.file': File.) it is used for the filename, otherwise the name
of the current input file is used.  If a logical line number was given
(*note `.line': Line.)  then it is used to calculate the number printed,
otherwise the actual line in the current source file is printed.  The
message text is intended to be self explanatory (in the grand Unix
tradition).

   Error messages have the format
     file_name:NNN:FATAL:Error Message Text
   The file name and line number are derived as for warning messages.
The actual message text may be rather less explanatory because many of
them aren't supposed to happen.


File: m68k-rtems-as.info,  Node: Invoking,  Next: Syntax,  Prev: Overview,  Up: Top

Command-Line Options
********************

This chapter describes command-line options available in _all_ versions
of the GNU assembler; *note Machine Dependencies::, for options specific
to particular machine architectures.

   If you are invoking `as' via the GNU C compiler (version 2), you can
use the `-Wa' option to pass arguments through to the assembler.  The
assembler arguments must be separated from each other (and the `-Wa')
by commas.  For example:

     gcc -c -g -O -Wa,-alh,-L file.c

This passes two options to the assembler: `-alh' (emit a listing to
standard output with high-level and assembly source) and `-L' (retain
local symbols in the symbol table).

   Usually you do not need to use this `-Wa' mechanism, since many
compiler command-line options are automatically passed to the assembler
by the compiler.  (You can call the GNU compiler driver with the `-v'
option to see precisely what options it passes to each compilation
pass, including the assembler.)

* Menu:

* a::             -a[cdhlns] enable listings
* D::             -D for compatibility
* f::             -f to work faster
* I::             -I for .include search path

* K::             -K for difference tables

* L::             -L to retain local labels
* listing::       --listing-XXX to configure listing output
* M::		  -M or --mri to assemble in MRI compatibility mode
* MD::            --MD for dependency tracking
* o::             -o to name the object file
* R::             -R to join data and text sections
* statistics::    --statistics to see statistics about assembly
* traditional-format:: --traditional-format for compatible output
* v::             -v to announce version
* W::             -W, --no-warn, --warn, --fatal-warnings to control warnings
* Z::             -Z to make object file even after errors


File: m68k-rtems-as.info,  Node: a,  Next: D,  Up: Invoking

Enable Listings: `-a[cdhlns]'
=============================

These options enable listing output from the assembler.  By itself,
`-a' requests high-level, assembly, and symbols listing.  You can use
other letters to select specific options for the list: `-ah' requests a
high-level language listing, `-al' requests an output-program assembly
listing, and `-as' requests a symbol table listing.  High-level
listings require that a compiler debugging option like `-g' be used,
and that assembly listings (`-al') be requested also.

   Use the `-ac' option to omit false conditionals from a listing.  Any
lines which are not assembled because of a false `.if' (or `.ifdef', or
any other conditional), or a true `.if' followed by an `.else', will be
omitted from the listing.

   Use the `-ad' option to omit debugging directives from the listing.

   Once you have specified one of these options, you can further control
listing output and its appearance using the directives `.list',
`.nolist', `.psize', `.eject', `.title', and `.sbttl'.  The `-an'
option turns off all forms processing.  If you do not request listing
output with one of the `-a' options, the listing-control directives
have no effect.

   The letters after `-a' may be combined into one option, _e.g._,
`-aln'.

   Note if the assembler source is coming from the standard input (eg
because it is being created by `gcc' and the `-pipe' command line switch
is being used) then the listing will not contain any comments or
preprocessor directives.  This is because the listing code buffers
input source lines from stdin only after they have been preprocessed by
the assembler.  This reduces memory usage and makes the code more
efficient.


File: m68k-rtems-as.info,  Node: D,  Next: f,  Prev: a,  Up: Invoking

`-D'
====

This option has no effect whatsoever, but it is accepted to make it more
likely that scripts written for other assemblers also work with `as'.


File: m68k-rtems-as.info,  Node: f,  Next: I,  Prev: D,  Up: Invoking

Work Faster: `-f'
=================

`-f' should only be used when assembling programs written by a
(trusted) compiler.  `-f' stops the assembler from doing whitespace and
comment preprocessing on the input file(s) before assembling them.
*Note Preprocessing: Preprocessing.

     _Warning:_ if you use `-f' when the files actually need to be
     preprocessed (if they contain comments, for example), `as' does
     not work correctly.


File: m68k-rtems-as.info,  Node: I,  Next: K,  Prev: f,  Up: Invoking

`.include' search path: `-I' PATH
=================================

Use this option to add a PATH to the list of directories `as' searches
for files specified in `.include' directives (*note `.include':
Include.).  You may use `-I' as many times as necessary to include a
variety of paths.  The current working directory is always searched
first; after that, `as' searches any `-I' directories in the same order
as they were specified (left to right) on the command line.


File: m68k-rtems-as.info,  Node: K,  Next: L,  Prev: I,  Up: Invoking

Difference Tables: `-K'
=======================

`as' sometimes alters the code emitted for directives of the form
`.word SYM1-SYM2'; *note `.word': Word..  You can use the `-K' option
if you want a warning issued when this is done.


File: m68k-rtems-as.info,  Node: L,  Next: listing,  Prev: K,  Up: Invoking

Include Local Labels: `-L'
==========================

Labels beginning with `L' (upper case only) are called "local labels".
*Note Symbol Names::.  Normally you do not see such labels when
debugging, because they are intended for the use of programs (like
compilers) that compose assembler programs, not for your notice.
Normally both `as' and `ld' discard such labels, so you do not normally
debug with them.

   This option tells `as' to retain those `L...' symbols in the object
file.  Usually if you do this you also tell the linker `ld' to preserve
symbols whose names begin with `L'.

   By default, a local label is any label beginning with `L', but each
target is allowed to redefine the local label prefix.  On the HPPA
local labels begin with `L$'.


File: m68k-rtems-as.info,  Node: listing,  Next: M,  Prev: L,  Up: Invoking

Configuring listing output: `--listing'
=======================================

The listing feature of the assembler can be enabled via the command
line switch `-a' (*note a::).  This feature combines the input source
file(s) with a hex dump of the corresponding locations in the output
object file, and displays them as a listing file.  The format of this
listing can be controlled by pseudo ops inside the assembler source
(*note List:: *note Title:: *note Sbttl:: *note Psize:: *note Eject::)
and also by the following switches:

`--listing-lhs-width=`number''
     Sets the maximum width, in words, of the first line of the hex
     byte dump.  This dump appears on the left hand side of the listing
     output.

`--listing-lhs-width2=`number''
     Sets the maximum width, in words, of any further lines of the hex
     byte dump for a given inut source line.  If this value is not
     specified, it defaults to being the same as the value specified
     for `--listing-lhs-width'.  If neither switch is used the default
     is to one.

`--listing-rhs-width=`number''
     Sets the maximum width, in characters, of the source line that is
     displayed alongside the hex dump.  The default value for this
     parameter is 100.  The source line is displayed on the right hand
     side of the listing output.

`--listing-cont-lines=`number''
     Sets the maximum number of continuation lines of hex dump that
     will be displayed for a given single line of source input.  The
     default value is 4.


File: m68k-rtems-as.info,  Node: M,  Next: MD,  Prev: listing,  Up: Invoking

Assemble in MRI Compatibility Mode: `-M'
========================================

The `-M' or `--mri' option selects MRI compatibility mode.  This
changes the syntax and pseudo-op handling of `as' to make it compatible
with the `ASM68K' or the `ASM960' (depending upon the configured
target) assembler from Microtec Research.  The exact nature of the MRI
syntax will not be documented here; see the MRI manuals for more
information.  Note in particular that the handling of macros and macro
arguments is somewhat different.  The purpose of this option is to
permit assembling existing MRI assembler code using `as'.

   The MRI compatibility is not complete.  Certain operations of the
MRI assembler depend upon its object file format, and can not be
supported using other object file formats.  Supporting these would
require enhancing each object file format individually.  These are:

   * global symbols in common section

     The m68k MRI assembler supports common sections which are merged
     by the linker.  Other object file formats do not support this.
     `as' handles common sections by treating them as a single common
     symbol.  It permits local symbols to be defined within a common
     section, but it can not support global symbols, since it has no
     way to describe them.

   * complex relocations

     The MRI assemblers support relocations against a negated section
     address, and relocations which combine the start addresses of two
     or more sections.  These are not support by other object file
     formats.

   * `END' pseudo-op specifying start address

     The MRI `END' pseudo-op permits the specification of a start
     address.  This is not supported by other object file formats.  The
     start address may instead be specified using the `-e' option to
     the linker, or in a linker script.

   * `IDNT', `.ident' and `NAME' pseudo-ops

     The MRI `IDNT', `.ident' and `NAME' pseudo-ops assign a module
     name to the output file.  This is not supported by other object
     file formats.

   * `ORG' pseudo-op

     The m68k MRI `ORG' pseudo-op begins an absolute section at a given
     address.  This differs from the usual `as' `.org' pseudo-op, which
     changes the location within the current section.  Absolute
     sections are not supported by other object file formats.  The
     address of a section may be assigned within a linker script.

   There are some other features of the MRI assembler which are not
supported by `as', typically either because they are difficult or
because they seem of little consequence.  Some of these may be
supported in future releases.

   * EBCDIC strings

     EBCDIC strings are not supported.

   * packed binary coded decimal

     Packed binary coded decimal is not supported.  This means that the
     `DC.P' and `DCB.P' pseudo-ops are not supported.

   * `FEQU' pseudo-op

     The m68k `FEQU' pseudo-op is not supported.

   * `NOOBJ' pseudo-op

     The m68k `NOOBJ' pseudo-op is not supported.

   * `OPT' branch control options

     The m68k `OPT' branch control options--`B', `BRS', `BRB', `BRL',
     and `BRW'--are ignored.  `as' automatically relaxes all branches,
     whether forward or backward, to an appropriate size, so these
     options serve no purpose.

   * `OPT' list control options

     The following m68k `OPT' list control options are ignored: `C',
     `CEX', `CL', `CRE', `E', `G', `I', `M', `MEX', `MC', `MD', `X'.

   * other `OPT' options

     The following m68k `OPT' options are ignored: `NEST', `O', `OLD',
     `OP', `P', `PCO', `PCR', `PCS', `R'.

   * `OPT' `D' option is default

     The m68k `OPT' `D' option is the default, unlike the MRI assembler.
     `OPT NOD' may be used to turn it off.

   * `XREF' pseudo-op.

     The m68k `XREF' pseudo-op is ignored.

   * `.debug' pseudo-op

     The i960 `.debug' pseudo-op is not supported.

   * `.extended' pseudo-op

     The i960 `.extended' pseudo-op is not supported.

   * `.list' pseudo-op.

     The various options of the i960 `.list' pseudo-op are not
     supported.

   * `.optimize' pseudo-op

     The i960 `.optimize' pseudo-op is not supported.

   * `.output' pseudo-op

     The i960 `.output' pseudo-op is not supported.

   * `.setreal' pseudo-op

     The i960 `.setreal' pseudo-op is not supported.



File: m68k-rtems-as.info,  Node: MD,  Next: o,  Prev: M,  Up: Invoking

Dependency tracking: `--MD'
===========================

`as' can generate a dependency file for the file it creates.  This file
consists of a single rule suitable for `make' describing the
dependencies of the main source file.

   The rule is written to the file named in its argument.

   This feature is used in the automatic updating of makefiles.


File: m68k-rtems-as.info,  Node: o,  Next: R,  Prev: MD,  Up: Invoking

Name the Object File: `-o'
==========================

There is always one object file output when you run `as'.  By default
it has the name `a.out' (or `b.out', for Intel 960 targets only).  You
use this option (which takes exactly one filename) to give the object
file a different name.

   Whatever the object file is called, `as' overwrites any existing
file of the same name.


File: m68k-rtems-as.info,  Node: R,  Next: statistics,  Prev: o,  Up: Invoking

Join Data and Text Sections: `-R'
=================================

`-R' tells `as' to write the object file as if all data-section data
lives in the text section.  This is only done at the very last moment:
your binary data are the same, but data section parts are relocated
differently.  The data section part of your object file is zero bytes
long because all its bytes are appended to the text section.  (*Note
Sections and Relocation: Sections.)

   When you specify `-R' it would be possible to generate shorter
address displacements (because we do not have to cross between text and
data section).  We refrain from doing this simply for compatibility with
older versions of `as'.  In future, `-R' may work this way.

   When `as' is configured for COFF output, this option is only useful
if you use sections named `.text' and `.data'.

   `-R' is not supported for any of the HPPA targets.  Using `-R'
generates a warning from `as'.


File: m68k-rtems-as.info,  Node: statistics,  Next: traditional-format,  Prev: R,  Up: Invoking

Display Assembly Statistics: `--statistics'
===========================================

Use `--statistics' to display two statistics about the resources used by
`as': the maximum amount of space allocated during the assembly (in
bytes), and the total execution time taken for the assembly (in CPU
seconds).


File: m68k-rtems-as.info,  Node: traditional-format,  Next: v,  Prev: statistics,  Up: Invoking

Compatible output: `--traditional-format'
=========================================

For some targets, the output of `as' is different in some ways from the
output of some existing assembler.  This switch requests `as' to use
the traditional format instead.

   For example, it disables the exception frame optimizations which
`as' normally does by default on `gcc' output.


File: m68k-rtems-as.info,  Node: v,  Next: W,  Prev: traditional-format,  Up: Invoking

Announce Version: `-v'
======================

You can find out what version of as is running by including the option
`-v' (which you can also spell as `-version') on the command line.


File: m68k-rtems-as.info,  Node: W,  Next: Z,  Prev: v,  Up: Invoking

Control Warnings: `-W', `--warn', `--no-warn', `--fatal-warnings'
=================================================================

`as' should never give a warning or error message when assembling
compiler output.  But programs written by people often cause `as' to
give a warning that a particular assumption was made.  All such
warnings are directed to the standard error file.

   If you use the `-W' and `--no-warn' options, no warnings are issued.
This only affects the warning messages: it does not change any
particular of how `as' assembles your file.  Errors, which stop the
assembly, are still reported.

   If you use the `--fatal-warnings' option, `as' considers files that
generate warnings to be in error.

   You can switch these options off again by specifying `--warn', which
causes warnings to be output as usual.


File: m68k-rtems-as.info,  Node: Z,  Prev: W,  Up: Invoking

Generate Object File in Spite of Errors: `-Z'
=============================================

After an error message, `as' normally produces no output.  If for some
reason you are interested in object file output even after `as' gives
an error message on your program, use the `-Z' option.  If there are
any errors, `as' continues anyways, and writes an object file after a
final warning message of the form `N errors, M warnings, generating bad
object file.'


File: m68k-rtems-as.info,  Node: Syntax,  Next: Sections,  Prev: Invoking,  Up: Top

Syntax
******

This chapter describes the machine-independent syntax allowed in a
source file.  `as' syntax is similar to what many other assemblers use;
it is inspired by the BSD 4.2 assembler, except that `as' does not
assemble Vax bit-fields.

* Menu:

* Preprocessing::              Preprocessing
* Whitespace::                  Whitespace
* Comments::                    Comments
* Symbol Intro::                Symbols
* Statements::                  Statements
* Constants::                   Constants


File: m68k-rtems-as.info,  Node: Preprocessing,  Next: Whitespace,  Up: Syntax

Preprocessing
=============

The `as' internal preprocessor:
   * adjusts and removes extra whitespace.  It leaves one space or tab
     before the keywords on a line, and turns any other whitespace on
     the line into a single space.

   * removes all comments, replacing them with a single space, or an
     appropriate number of newlines.

   * converts character constants into the appropriate numeric values.

   It does not do macro processing, include file handling, or anything
else you may get from your C compiler's preprocessor.  You can do
include file processing with the `.include' directive (*note
`.include': Include.).  You can use the GNU C compiler driver to get
other "CPP" style preprocessing, by giving the input file a `.S'
suffix.  *Note Options Controlling the Kind of Output:
(gcc.info)Overall Options.

   Excess whitespace, comments, and character constants cannot be used
in the portions of the input text that are not preprocessed.

   If the first line of an input file is `#NO_APP' or if you use the
`-f' option, whitespace and comments are not removed from the input
file.  Within an input file, you can ask for whitespace and comment
removal in specific portions of the by putting a line that says `#APP'
before the text that may contain whitespace or comments, and putting a
line that says `#NO_APP' after this text.  This feature is mainly
intend to support `asm' statements in compilers whose output is
otherwise free of comments and whitespace.


File: m68k-rtems-as.info,  Node: Whitespace,  Next: Comments,  Prev: Preprocessing,  Up: Syntax

Whitespace
==========

"Whitespace" is one or more blanks or tabs, in any order.  Whitespace
is used to separate symbols, and to make programs neater for people to
read.  Unless within character constants (*note Character Constants:
Characters.), any whitespace means the same as exactly one space.


File: m68k-rtems-as.info,  Node: Comments,  Next: Symbol Intro,  Prev: Whitespace,  Up: Syntax

Comments
========

There are two ways of rendering comments to `as'.  In both cases the
comment is equivalent to one space.

   Anything from `/*' through the next `*/' is a comment.  This means
you may not nest these comments.

     /*
       The only way to include a newline ('\n') in a comment
       is to use this sort of comment.
     */
     
     /* This sort of comment does not nest. */

   Anything from the "line comment" character to the next newline is
considered a comment and is ignored.  The line comment character is `;'
for the AMD 29K family; `;' on the ARC; `@' on the ARM; `;' for the
H8/300 family; `!' for the H8/500 family; `;' for the HPPA; `#' on the
i386 and x86-64; `#' on the i960; `;' for the PDP-11; `;' for picoJava;
`;' for Motorola PowerPC; `!' for the Hitachi SH; `!' on the SPARC; `#'
on the m32r; `|' on the 680x0; `#' on the 68HC11 and 68HC12; `;' on the
M880x0; `#' on the Vax; `!' for the Z8000; `#' on the V850; see *Note
Machine Dependencies::.

   On some machines there are two different line comment characters.
One character only begins a comment if it is the first non-whitespace
character on a line, while the other always begins a comment.

   The V850 assembler also supports a double dash as starting a comment
that extends to the end of the line.

   `--';

   To be compatible with past assemblers, lines that begin with `#'
have a special interpretation.  Following the `#' should be an absolute
expression (*note Expressions::): the logical line number of the _next_
line.  Then a string (*note Strings: Strings.) is allowed: if present
it is a new logical file name.  The rest of the line, if any, should be
whitespace.

   If the first non-whitespace characters on the line are not numeric,
the line is ignored.  (Just like a comment.)

                               # This is an ordinary comment.
     # 42-6 "new_file_name"    # New logical file name
                               # This is logical line # 36.
   This feature is deprecated, and may disappear from future versions
of `as'.


File: m68k-rtems-as.info,  Node: Symbol Intro,  Next: Statements,  Prev: Comments,  Up: Syntax

Symbols
=======

A "symbol" is one or more characters chosen from the set of all letters
(both upper and lower case), digits and the three characters `_.$'.  On
most machines, you can also use `$' in symbol names; exceptions are
noted in *Note Machine Dependencies::.  No symbol may begin with a
digit.  Case is significant.  There is no length limit: all characters
are significant.  Symbols are delimited by characters not in that set,
or by the beginning of a file (since the source program must end with a
newline, the end of a file is not a possible symbol delimiter).  *Note
Symbols::.


File: m68k-rtems-as.info,  Node: Statements,  Next: Constants,  Prev: Symbol Intro,  Up: Syntax

Statements
==========

A "statement" ends at a newline character (`\n') or line separator
character.  (The line separator is usually `;', unless this conflicts
with the comment character; *note Machine Dependencies::.)  The newline
or separator character is considered part of the preceding statement.
Newlines and separators within character constants are an exception:
they do not end statements.

It is an error to end any statement with end-of-file:  the last
character of any input file should be a newline.

   An empty statement is allowed, and may include whitespace.  It is
ignored.

   A statement begins with zero or more labels, optionally followed by a
key symbol which determines what kind of statement it is.  The key
symbol determines the syntax of the rest of the statement.  If the
symbol begins with a dot `.' then the statement is an assembler
directive: typically valid for any computer.  If the symbol begins with
a letter the statement is an assembly language "instruction": it
assembles into a machine language instruction.  Different versions of
`as' for different computers recognize different instructions.  In
fact, the same symbol may represent a different instruction in a
different computer's assembly language.

   A label is a symbol immediately followed by a colon (`:').
Whitespace before a label or after a colon is permitted, but you may not
have whitespace between a label's symbol and its colon. *Note Labels::.

   For HPPA targets, labels need not be immediately followed by a
colon, but the definition of a label must begin in column zero.  This
also implies that only one label may be defined on each line.

     label:     .directive    followed by something
     another_label:           # This is an empty statement.
                instruction   operand_1, operand_2, ...


File: m68k-rtems-as.info,  Node: Constants,  Prev: Statements,  Up: Syntax

Constants
=========

A constant is a number, written so that its value is known by
inspection, without knowing any context.  Like this:
     .byte  74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value.
     .ascii "Ring the bell\7"                  # A string constant.
     .octa  0x123456789abcdef0123456789ABCDEF0 # A bignum.
     .float 0f-314159265358979323846264338327\
     95028841971.693993751E-40                 # - pi, a flonum.

* Menu:

* Characters::                  Character Constants
* Numbers::                     Number Constants


File: m68k-rtems-as.info,  Node: Characters,  Next: Numbers,  Up: Constants

Character Constants
-------------------

There are two kinds of character constants.  A "character" stands for
one character in one byte and its value may be used in numeric
expressions.  String constants (properly called string _literals_) are
potentially many bytes and their values may not be used in arithmetic
expressions.

* Menu:

* Strings::                     Strings
* Chars::                       Characters


File: m68k-rtems-as.info,  Node: Strings,  Next: Chars,  Up: Characters

Strings
.......

A "string" is written between double-quotes.  It may contain
double-quotes or null characters.  The way to get special characters
into a string is to "escape" these characters: precede them with a
backslash `\' character.  For example `\\' represents one backslash:
the first `\' is an escape which tells `as' to interpret the second
character literally as a backslash (which prevents `as' from
recognizing the second `\' as an escape character).  The complete list
of escapes follows.

`\b'
     Mnemonic for backspace; for ASCII this is octal code 010.

`\f'
     Mnemonic for FormFeed; for ASCII this is octal code 014.

`\n'
     Mnemonic for newline; for ASCII this is octal code 012.

`\r'
     Mnemonic for carriage-Return; for ASCII this is octal code 015.

`\t'
     Mnemonic for horizontal Tab; for ASCII this is octal code 011.

`\ DIGIT DIGIT DIGIT'
     An octal character code.  The numeric code is 3 octal digits.  For
     compatibility with other Unix systems, 8 and 9 are accepted as
     digits: for example, `\008' has the value 010, and `\009' the
     value 011.

`\`x' HEX-DIGITS...'
     A hex character code.  All trailing hex digits are combined.
     Either upper or lower case `x' works.

`\\'
     Represents one `\' character.

`\"'
     Represents one `"' character.  Needed in strings to represent this
     character, because an unescaped `"' would end the string.

`\ ANYTHING-ELSE'
     Any other character when escaped by `\' gives a warning, but
     assembles as if the `\' was not present.  The idea is that if you
     used an escape sequence you clearly didn't want the literal
     interpretation of the following character.  However `as' has no
     other interpretation, so `as' knows it is giving you the wrong
     code and warns you of the fact.

   Which characters are escapable, and what those escapes represent,
varies widely among assemblers.  The current set is what we think the
BSD 4.2 assembler recognizes, and is a subset of what most C compilers
recognize.  If you are in doubt, do not use an escape sequence.


File: m68k-rtems-as.info,  Node: Chars,  Prev: Strings,  Up: Characters

Characters
..........

A single character may be written as a single quote immediately
followed by that character.  The same escapes apply to characters as to
strings.  So if you want to write the character backslash, you must
write `'\\' where the first `\' escapes the second `\'.  As you can
see, the quote is an acute accent, not a grave accent.  A newline
immediately following an acute accent is taken as a literal character
and does not count as the end of a statement.  The value of a character
constant in a numeric expression is the machine's byte-wide code for
that character.  `as' assumes your character code is ASCII: `'A' means
65, `'B' means 66, and so on.


File: m68k-rtems-as.info,  Node: Numbers,  Prev: Characters,  Up: Constants

Number Constants
----------------

`as' distinguishes three kinds of numbers according to how they are
stored in the target machine.  _Integers_ are numbers that would fit
into an `int' in the C language.  _Bignums_ are integers, but they are
stored in more than 32 bits.  _Flonums_ are floating point numbers,
described below.

* Menu:

* Integers::                    Integers
* Bignums::                     Bignums
* Flonums::                     Flonums


File: m68k-rtems-as.info,  Node: Integers,  Next: Bignums,  Up: Numbers

Integers
........

A binary integer is `0b' or `0B' followed by zero or more of the binary
digits `01'.

   An octal integer is `0' followed by zero or more of the octal digits
(`01234567').

   A decimal integer starts with a non-zero digit followed by zero or
more digits (`0123456789').

   A hexadecimal integer is `0x' or `0X' followed by one or more
hexadecimal digits chosen from `0123456789abcdefABCDEF'.

   Integers have the usual values.  To denote a negative integer, use
the prefix operator `-' discussed under expressions (*note Prefix
Operators: Prefix Ops.).


File: m68k-rtems-as.info,  Node: Bignums,  Next: Flonums,  Prev: Integers,  Up: Numbers

Bignums
.......

A "bignum" has the same syntax and semantics as an integer except that
the number (or its negative) takes more than 32 bits to represent in
binary.  The distinction is made because in some places integers are
permitted while bignums are not.


File: m68k-rtems-as.info,  Node: Flonums,  Prev: Bignums,  Up: Numbers

Flonums
.......

A "flonum" represents a floating point number.  The translation is
indirect: a decimal floating point number from the text is converted by
`as' to a generic binary floating point number of more than sufficient
precision.  This generic floating point number is converted to a
particular computer's floating point format (or formats) by a portion
of `as' specialized to that computer.

   A flonum is written by writing (in order)
   * The digit `0'.  (`0' is optional on the HPPA.)

   * A letter, to tell `as' the rest of the number is a flonum.  `e' is
     recommended.  Case is not important.

     On the H8/300, H8/500, Hitachi SH, and AMD 29K architectures, the
     letter must be one of the letters `DFPRSX' (in upper or lower
     case).

     On the ARC, the letter must be one of the letters `DFRS' (in upper
     or lower case).

     On the Intel 960 architecture, the letter must be one of the
     letters `DFT' (in upper or lower case).

     On the HPPA architecture, the letter must be `E' (upper case only).

   * An optional sign: either `+' or `-'.

   * An optional "integer part": zero or more decimal digits.

   * An optional "fractional part": `.' followed by zero or more
     decimal digits.

   * An optional exponent, consisting of:

        * An `E' or `e'.

        * Optional sign: either `+' or `-'.

        * One or more decimal digits.


   At least one of the integer part or the fractional part must be
present.  The floating point number has the usual base-10 value.

   `as' does all processing using integers.  Flonums are computed
independently of any floating point hardware in the computer running
`as'.


File: m68k-rtems-as.info,  Node: Sections,  Next: Symbols,  Prev: Syntax,  Up: Top

Sections and Relocation
***********************

* Menu:

* Secs Background::             Background
* Ld Sections::                 Linker Sections
* As Sections::                 Assembler Internal Sections
* Sub-Sections::                Sub-Sections
* bss::                         bss Section


File: m68k-rtems-as.info,  Node: Secs Background,  Next: Ld Sections,  Up: Sections

Background
==========

Roughly, a section is a range of addresses, with no gaps; all data "in"
those addresses is treated the same for some particular purpose.  For
example there may be a "read only" section.

   The linker `ld' reads many object files (partial programs) and
combines their contents to form a runnable program.  When `as' emits an
object file, the partial program is assumed to start at address 0.
`ld' assigns the final addresses for the partial program, so that
different partial programs do not overlap.  This is actually an
oversimplification, but it suffices to explain how `as' uses sections.

   `ld' moves blocks of bytes of your program to their run-time
addresses.  These blocks slide to their run-time addresses as rigid
units; their length does not change and neither does the order of bytes
within them.  Such a rigid unit is called a _section_.  Assigning
run-time addresses to sections is called "relocation".  It includes the
task of adjusting mentions of object-file addresses so they refer to
the proper run-time addresses.  For the H8/300 and H8/500, and for the
Hitachi SH, `as' pads sections if needed to ensure they end on a word
(sixteen bit) boundary.

   An object file written by `as' has at least three sections, any of
which may be empty.  These are named "text", "data" and "bss" sections.

   When it generates COFF output, `as' can also generate whatever other
named sections you specify using the `.section' directive (*note
`.section': Section.).  If you do not use any directives that place
output in the `.text' or `.data' sections, these sections still exist,
but are empty.

   When `as' generates SOM or ELF output for the HPPA, `as' can also
generate whatever other named sections you specify using the `.space'
and `.subspace' directives.  See `HP9000 Series 800 Assembly Language
Reference Manual' (HP 92432-90001) for details on the `.space' and
`.subspace' assembler directives.

   Additionally, `as' uses different names for the standard text, data,
and bss sections when generating SOM output.  Program text is placed
into the `$CODE$' section, data into `$DATA$', and BSS into `$BSS$'.

   Within the object file, the text section starts at address `0', the
data section follows, and the bss section follows the data section.

   When generating either SOM or ELF output files on the HPPA, the text
section starts at address `0', the data section at address `0x4000000',
and the bss section follows the data section.

   To let `ld' know which data changes when the sections are relocated,
and how to change that data, `as' also writes to the object file
details of the relocation needed.  To perform relocation `ld' must
know, each time an address in the object file is mentioned:
   * Where in the object file is the beginning of this reference to an
     address?

   * How long (in bytes) is this reference?

   * Which section does the address refer to?  What is the numeric
     value of
          (ADDRESS) - (START-ADDRESS OF SECTION)?

   * Is the reference to an address "Program-Counter relative"?

   In fact, every address `as' ever uses is expressed as
     (SECTION) + (OFFSET INTO SECTION)

Further, most expressions `as' computes have this section-relative
nature.  (For some object formats, such as SOM for the HPPA, some
expressions are symbol-relative instead.)

   In this manual we use the notation {SECNAME N} to mean "offset N
into section SECNAME."

   Apart from text, data and bss sections you need to know about the
"absolute" section.  When `ld' mixes partial programs, addresses in the
absolute section remain unchanged.  For example, address `{absolute 0}'
is "relocated" to run-time address 0 by `ld'.  Although the linker
never arranges two partial programs' data sections with overlapping
addresses after linking, _by definition_ their absolute sections must
overlap.  Address `{absolute 239}' in one part of a program is always
the same address when the program is running as address `{absolute
239}' in any other part of the program.

   The idea of sections is extended to the "undefined" section.  Any
address whose section is unknown at assembly time is by definition
rendered {undefined U}--where U is filled in later.  Since numbers are
always defined, the only way to generate an undefined address is to
mention an undefined symbol.  A reference to a named common block would
be such a symbol: its value is unknown at assembly time so it has
section _undefined_.

   By analogy the word _section_ is used to describe groups of sections
in the linked program.  `ld' puts all partial programs' text sections
in contiguous addresses in the linked program.  It is customary to
refer to the _text section_ of a program, meaning all the addresses of
all partial programs' text sections.  Likewise for data and bss
sections.

   Some sections are manipulated by `ld'; others are invented for use
of `as' and have no meaning except during assembly.


File: m68k-rtems-as.info,  Node: Ld Sections,  Next: As Sections,  Prev: Secs Background,  Up: Sections

Linker Sections
===============

`ld' deals with just four kinds of sections, summarized below.

*named sections*
*text section*
*data section*
     These sections hold your program.  `as' and `ld' treat them as
     separate but equal sections.  Anything you can say of one section
     is true another.  When the program is running, however, it is
     customary for the text section to be unalterable.  The text
     section is often shared among processes: it contains instructions,
     constants and the like.  The data section of a running program is
     usually alterable: for example, C variables would be stored in the
     data section.

*bss section*
     This section contains zeroed bytes when your program begins
     running.  It is used to hold uninitialized variables or common
     storage.  The length of each partial program's bss section is
     important, but because it starts out containing zeroed bytes there
     is no need to store explicit zero bytes in the object file.  The
     bss section was invented to eliminate those explicit zeros from
     object files.

*absolute section*
     Address 0 of this section is always "relocated" to runtime address
     0.  This is useful if you want to refer to an address that `ld'
     must not change when relocating.  In this sense we speak of
     absolute addresses being "unrelocatable": they do not change
     during relocation.

*undefined section*
     This "section" is a catch-all for address references to objects
     not in the preceding sections.

   An idealized example of three relocatable sections follows.  The
example uses the traditional section names `.text' and `.data'.  Memory
addresses are on the horizontal axis.

                           +-----+----+--+
     partial program # 1:  |ttttt|dddd|00|
                           +-----+----+--+
     
                           text   data bss
                           seg.   seg. seg.
     
                           +---+---+---+
     partial program # 2:  |TTT|DDD|000|
                           +---+---+---+
     
                           +--+---+-----+--+----+---+-----+~~
     linked program:       |  |TTT|ttttt|  |dddd|DDD|00000|
                           +--+---+-----+--+----+---+-----+~~
     
         addresses:        0 ...


File: m68k-rtems-as.info,  Node: As Sections,  Next: Sub-Sections,  Prev: Ld Sections,  Up: Sections

Assembler Internal Sections
===========================

These sections are meant only for the internal use of `as'.  They have
no meaning at run-time.  You do not really need to know about these
sections for most purposes; but they can be mentioned in `as' warning
messages, so it might be helpful to have an idea of their meanings to
`as'.  These sections are used to permit the value of every expression
in your assembly language program to be a section-relative address.

ASSEMBLER-INTERNAL-LOGIC-ERROR!
     An internal assembler logic error has been found.  This means
     there is a bug in the assembler.

expr section
     The assembler stores complex expression internally as combinations
     of symbols.  When it needs to represent an expression as a symbol,
     it puts it in the expr section.


File: m68k-rtems-as.info,  Node: Sub-Sections,  Next: bss,  Prev: As Sections,  Up: Sections

Sub-Sections
============

Assembled bytes conventionally fall into two sections: text and data.
You may have separate groups of data in named sections that you want to
end up near to each other in the object file, even though they are not
contiguous in the assembler source.  `as' allows you to use
"subsections" for this purpose.  Within each section, there can be
numbered subsections with values from 0 to 8192.  Objects assembled
into the same subsection go into the object file together with other
objects in the same subsection.  For example, a compiler might want to
store constants in the text section, but might not want to have them
interspersed with the program being assembled.  In this case, the
compiler could issue a `.text 0' before each section of code being
output, and a `.text 1' before each group of constants being output.

Subsections are optional.  If you do not use subsections, everything
goes in subsection number zero.

   Each subsection is zero-padded up to a multiple of four bytes.
(Subsections may be padded a different amount on different flavors of
`as'.)

   Subsections appear in your object file in numeric order, lowest
numbered to highest.  (All this to be compatible with other people's
assemblers.)  The object file contains no representation of
subsections; `ld' and other programs that manipulate object files see
no trace of them.  They just see all your text subsections as a text
section, and all your data subsections as a data section.

   To specify which subsection you want subsequent statements assembled
into, use a numeric argument to specify it, in a `.text EXPRESSION' or
a `.data EXPRESSION' statement.  When generating COFF output, you can
also use an extra subsection argument with arbitrary named sections:
`.section NAME, EXPRESSION'.  EXPRESSION should be an absolute
expression.  (*Note Expressions::.)  If you just say `.text' then
`.text 0' is assumed.  Likewise `.data' means `.data 0'.  Assembly
begins in `text 0'.  For instance:
     .text 0     # The default subsection is text 0 anyway.
     .ascii "This lives in the first text subsection. *"
     .text 1
     .ascii "But this lives in the second text subsection."
     .data 0
     .ascii "This lives in the data section,"
     .ascii "in the first data subsection."
     .text 0
     .ascii "This lives in the first text section,"
     .ascii "immediately following the asterisk (*)."

   Each section has a "location counter" incremented by one for every
byte assembled into that section.  Because subsections are merely a
convenience restricted to `as' there is no concept of a subsection
location counter.  There is no way to directly manipulate a location
counter--but the `.align' directive changes it, and any label
definition captures its current value.  The location counter of the
section where statements are being assembled is said to be the "active"
location counter.


File: m68k-rtems-as.info,  Node: bss,  Prev: Sub-Sections,  Up: Sections

bss Section
===========

The bss section is used for local common variable storage.  You may
allocate address space in the bss section, but you may not dictate data
to load into it before your program executes.  When your program starts
running, all the contents of the bss section are zeroed bytes.

   The `.lcomm' pseudo-op defines a symbol in the bss section; see
*Note `.lcomm': Lcomm.

   The `.comm' pseudo-op may be used to declare a common symbol, which
is another form of uninitialized symbol; see *Note `.comm': Comm.

   When assembling for a target which supports multiple sections, such
as ELF or COFF, you may switch into the `.bss' section and define
symbols as usual; see *Note `.section': Section.  You may only assemble
zero values into the section.  Typically the section will only contain
symbol definitions and `.skip' directives (*note `.skip': Skip.).


File: m68k-rtems-as.info,  Node: Symbols,  Next: Expressions,  Prev: Sections,  Up: Top

Symbols
*******

Symbols are a central concept: the programmer uses symbols to name
things, the linker uses symbols to link, and the debugger uses symbols
to debug.

     _Warning:_ `as' does not place symbols in the object file in the
     same order they were declared.  This may break some debuggers.

* Menu:

* Labels::                      Labels
* Setting Symbols::             Giving Symbols Other Values
* Symbol Names::                Symbol Names
* Dot::                         The Special Dot Symbol
* Symbol Attributes::           Symbol Attributes


File: m68k-rtems-as.info,  Node: Labels,  Next: Setting Symbols,  Up: Symbols

Labels
======

A "label" is written as a symbol immediately followed by a colon `:'.
The symbol then represents the current value of the active location
counter, and is, for example, a suitable instruction operand.  You are
warned if you use the same symbol to represent two different locations:
the first definition overrides any other definitions.

   On the HPPA, the usual form for a label need not be immediately
followed by a colon, but instead must start in column zero.  Only one
label may be defined on a single line.  To work around this, the HPPA
version of `as' also provides a special directive `.label' for defining
labels more flexibly.


File: m68k-rtems-as.info,  Node: Setting Symbols,  Next: Symbol Names,  Prev: Labels,  Up: Symbols

Giving Symbols Other Values
===========================

A symbol can be given an arbitrary value by writing a symbol, followed
by an equals sign `=', followed by an expression (*note Expressions::).
This is equivalent to using the `.set' directive.  *Note `.set': Set.


File: m68k-rtems-as.info,  Node: Symbol Names,  Next: Dot,  Prev: Setting Symbols,  Up: Symbols

Symbol Names
============

Symbol names begin with a letter or with one of `._'.  On most
machines, you can also use `$' in symbol names; exceptions are noted in
*Note Machine Dependencies::.  That character may be followed by any
string of digits, letters, dollar signs (unless otherwise noted in
*Note Machine Dependencies::), and underscores.  For the AMD 29K
family, `?' is also allowed in the body of a symbol name, though not at
its beginning.

Case of letters is significant: `foo' is a different symbol name than
`Foo'.

   Each symbol has exactly one name.  Each name in an assembly language
program refers to exactly one symbol.  You may use that symbol name any
number of times in a program.

Local Symbol Names
------------------

Local symbols help compilers and programmers use names temporarily.
They create symbols which are guaranteed to be unique over the entire
scope of the input source code and which can be referred to by a simple
notation.  To define a local symbol, write a label of the form `N:'
(where N represents any positive integer).  To refer to the most recent
previous definition of that symbol write `Nb', using the same number as
when you defined the label.  To refer to the next definition of a local
label, write `Nf'-- The `b' stands for"backwards" and the `f' stands
for "forwards".

   There is no restriction on how you can use these labels, and you can
reuse them too.  So that it is possible to repeatedly define the same
local label (using the same number `N'), although you can only refer to
the most recently defined local label of that number (for a backwards
reference) or the next definition of a specific local label for a
forward reference.  It is also worth noting that the first 10 local
labels (`0:'...`9:') are implemented in a slightly more efficient
manner than the others.

   Here is an example:

     1:        branch 1f
     2:        branch 1b
     1:        branch 2f
     2:        branch 1b

   Which is the equivalent of:

     label_1:  branch label_3
     label_2:  branch label_1
     label_3:  branch label_4
     label_4:  branch label_3

   Local symbol names are only a notational device.  They are
immediately transformed into more conventional symbol names before the
assembler uses them.  The symbol names stored in the symbol table,
appearing in error messages and optionally emitted to the object file.
The names are constructed using these parts:

`L'
     All local labels begin with `L'. Normally both `as' and `ld'
     forget symbols that start with `L'. These labels are used for
     symbols you are never intended to see.  If you use the `-L' option
     then `as' retains these symbols in the object file. If you also
     instruct `ld' to retain these symbols, you may use them in
     debugging.

`NUMBER'
     This is the number that was used in the local label definition.
     So if the label is written `55:' then the number is `55'.

`C-B'
     This unusual character is included so you do not accidentally
     invent a symbol of the same name.  The character has ASCII value
     of `\002' (control-B).

`_ordinal number_'
     This is a serial number to keep the labels distinct.  The first
     definition of `0:' gets the number `1'.  The 15th definition of
     `0:' gets the number `15', and so on.  Likewise the first
     definition of `1:' gets the number `1' and its 15th defintion gets
     `15' as well.

   So for example, the first `1:' is named `L1C-B1', the 44th `3:' is
named `L3C-B44'.

Dollar Local Labels
-------------------

`as' also supports an even more local form of local labels called
dollar labels.  These labels go out of scope (ie they become undefined)
as soon as a non-local label is defined.  Thus they remain valid for
only a small region of the input source code.  Normal local labels, by
contrast, remain in scope for the entire file, or until they are
redefined by another occurrence of the same local label.

   Dollar labels are defined in exactly the same way as ordinary local
labels, except that instead of being terminated by a colon, they are
terminated by a dollar sign.  eg `55$'.

   They can also be distinguished from ordinary local labels by their
transformed name which uses ASCII character `\001' (control-A) as the
magic character to distinguish them from ordinary labels.  Thus the 5th
defintion of `6$' is named `L6C-A5'.


File: m68k-rtems-as.info,  Node: Dot,  Next: Symbol Attributes,  Prev: Symbol Names,  Up: Symbols

The Special Dot Symbol
======================

The special symbol `.' refers to the current address that `as' is
assembling into.  Thus, the expression `melvin: .long .' defines
`melvin' to contain its own address.  Assigning a value to `.' is
treated the same as a `.org' directive.  Thus, the expression `.=.+4'
is the same as saying `.space 4'.


File: m68k-rtems-as.info,  Node: Symbol Attributes,  Prev: Dot,  Up: Symbols

Symbol Attributes
=================

Every symbol has, as well as its name, the attributes "Value" and
"Type".  Depending on output format, symbols can also have auxiliary
attributes.

   If you use a symbol without defining it, `as' assumes zero for all
these attributes, and probably won't warn you.  This makes the symbol
an externally defined symbol, which is generally what you would want.

* Menu:

* Symbol Value::                Value
* Symbol Type::                 Type


* a.out Symbols::               Symbol Attributes: `a.out'

* COFF Symbols::                Symbol Attributes for COFF

* SOM Symbols::                Symbol Attributes for SOM


File: m68k-rtems-as.info,  Node: Symbol Value,  Next: Symbol Type,  Up: Symbol Attributes

Value
-----

The value of a symbol is (usually) 32 bits.  For a symbol which labels a
location in the text, data, bss or absolute sections the value is the
number of addresses from the start of that section to the label.
Naturally for text, data and bss sections the value of a symbol changes
as `ld' changes section base addresses during linking.  Absolute
symbols' values do not change during linking: that is why they are
called absolute.

   The value of an undefined symbol is treated in a special way.  If it
is 0 then the symbol is not defined in this assembler source file, and
`ld' tries to determine its value from other files linked into the same
program.  You make this kind of symbol simply by mentioning a symbol
name without defining it.  A non-zero value represents a `.comm' common
declaration.  The value is how much common storage to reserve, in bytes
(addresses).  The symbol refers to the first address of the allocated
storage.


File: m68k-rtems-as.info,  Node: Symbol Type,  Next: a.out Symbols,  Prev: Symbol Value,  Up: Symbol Attributes

Type
----

The type attribute of a symbol contains relocation (section)
information, any flag settings indicating that a symbol is external, and
(optionally), other information for linkers and debuggers.  The exact
format depends on the object-code output format in use.


File: m68k-rtems-as.info,  Node: a.out Symbols,  Next: COFF Symbols,  Prev: Symbol Type,  Up: Symbol Attributes

Symbol Attributes: `a.out'
--------------------------

* Menu:

* Symbol Desc::                 Descriptor
* Symbol Other::                Other


File: m68k-rtems-as.info,  Node: Symbol Desc,  Next: Symbol Other,  Up: a.out Symbols

Descriptor
..........

This is an arbitrary 16-bit value.  You may establish a symbol's
descriptor value by using a `.desc' statement (*note `.desc': Desc.).
A descriptor value means nothing to `as'.


File: m68k-rtems-as.info,  Node: Symbol Other,  Prev: Symbol Desc,  Up: a.out Symbols

Other
.....

This is an arbitrary 8-bit value.  It means nothing to `as'.


File: m68k-rtems-as.info,  Node: COFF Symbols,  Next: SOM Symbols,  Prev: a.out Symbols,  Up: Symbol Attributes

Symbol Attributes for COFF
--------------------------

The COFF format supports a multitude of auxiliary symbol attributes;
like the primary symbol attributes, they are set between `.def' and
`.endef' directives.

Primary Attributes
..................

The symbol name is set with `.def'; the value and type, respectively,
with `.val' and `.type'.

Auxiliary Attributes
....................

The `as' directives `.dim', `.line', `.scl', `.size', and `.tag' can
generate auxiliary symbol table information for COFF.


File: m68k-rtems-as.info,  Node: SOM Symbols,  Prev: COFF Symbols,  Up: Symbol Attributes

Symbol Attributes for SOM
-------------------------

The SOM format for the HPPA supports a multitude of symbol attributes
set with the `.EXPORT' and `.IMPORT' directives.

   The attributes are described in `HP9000 Series 800 Assembly Language
Reference Manual' (HP 92432-90001) under the `IMPORT' and `EXPORT'
assembler directive documentation.


File: m68k-rtems-as.info,  Node: Expressions,  Next: Pseudo Ops,  Prev: Symbols,  Up: Top

Expressions
***********

An "expression" specifies an address or numeric value.  Whitespace may
precede and/or follow an expression.

   The result of an expression must be an absolute number, or else an
offset into a particular section.  If an expression is not absolute,
and there is not enough information when `as' sees the expression to
know its section, a second pass over the source program might be
necessary to interpret the expression--but the second pass is currently
not implemented.  `as' aborts with an error message in this situation.

* Menu:

* Empty Exprs::                 Empty Expressions
* Integer Exprs::               Integer Expressions


File: m68k-rtems-as.info,  Node: Empty Exprs,  Next: Integer Exprs,  Up: Expressions

Empty Expressions
=================

An empty expression has no value: it is just whitespace or null.
Wherever an absolute expression is required, you may omit the
expression, and `as' assumes a value of (absolute) 0.  This is
compatible with other assemblers.


File: m68k-rtems-as.info,  Node: Integer Exprs,  Prev: Empty Exprs,  Up: Expressions

Integer Expressions
===================

An "integer expression" is one or more _arguments_ delimited by
_operators_.

* Menu:

* Arguments::                   Arguments
* Operators::                   Operators
* Prefix Ops::                  Prefix Operators
* Infix Ops::                   Infix Operators


File: m68k-rtems-as.info,  Node: Arguments,  Next: Operators,  Up: Integer Exprs

Arguments
---------

"Arguments" are symbols, numbers or subexpressions.  In other contexts
arguments are sometimes called "arithmetic operands".  In this manual,
to avoid confusing them with the "instruction operands" of the machine
language, we use the term "argument" to refer to parts of expressions
only, reserving the word "operand" to refer only to machine instruction
operands.

   Symbols are evaluated to yield {SECTION NNN} where SECTION is one of
text, data, bss, absolute, or undefined.  NNN is a signed, 2's
complement 32 bit integer.

   Numbers are usually integers.

   A number can be a flonum or bignum.  In this case, you are warned
that only the low order 32 bits are used, and `as' pretends these 32
bits are an integer.  You may write integer-manipulating instructions
that act on exotic constants, compatible with other assemblers.

   Subexpressions are a left parenthesis `(' followed by an integer
expression, followed by a right parenthesis `)'; or a prefix operator
followed by an argument.


File: m68k-rtems-as.info,  Node: Operators,  Next: Prefix Ops,  Prev: Arguments,  Up: Integer Exprs

Operators
---------

"Operators" are arithmetic functions, like `+' or `%'.  Prefix
operators are followed by an argument.  Infix operators appear between
their arguments.  Operators may be preceded and/or followed by
whitespace.


File: m68k-rtems-as.info,  Node: Prefix Ops,  Next: Infix Ops,  Prev: Operators,  Up: Integer Exprs

Prefix Operator
---------------

`as' has the following "prefix operators".  They each take one
argument, which must be absolute.

`-'
     "Negation".  Two's complement negation.

`~'
     "Complementation".  Bitwise not.


File: m68k-rtems-as.info,  Node: Infix Ops,  Prev: Prefix Ops,  Up: Integer Exprs

Infix Operators
---------------

"Infix operators" take two arguments, one on either side.  Operators
have precedence, but operations with equal precedence are performed left
to right.  Apart from `+' or `-', both arguments must be absolute, and
the result is absolute.

  1. Highest Precedence

    `*'
          "Multiplication".

    `/'
          "Division".  Truncation is the same as the C operator `/'

    `%'
          "Remainder".

    `<'
    `<<'
          "Shift Left".  Same as the C operator `<<'.

    `>'
    `>>'
          "Shift Right".  Same as the C operator `>>'.

  2. Intermediate precedence

    `|'
          "Bitwise Inclusive Or".

    `&'
          "Bitwise And".

    `^'
          "Bitwise Exclusive Or".

    `!'
          "Bitwise Or Not".

  3. Low Precedence

    `+'
          "Addition".  If either argument is absolute, the result has
          the section of the other argument.  You may not add together
          arguments from different sections.

    `-'
          "Subtraction".  If the right argument is absolute, the result
          has the section of the left argument.  If both arguments are
          in the same section, the result is absolute.  You may not
          subtract arguments from different sections.

    `=='
          "Is Equal To"

    `<>'
          "Is Not Equal To"

    `<'
          "Is Less Than"

    `>'
          "Is Greater Than"

    `>='
          "Is Greater Than Or Equal To"

    `<='
          "Is Less Than Or Equal To"

          The comparison operators can be used as infix operators.  A
          true results has a value of -1 whereas a false result has a
          value of 0.   Note, these operators perform signed
          comparisons.

  4. Lowest Precedence

    `&&'
          "Logical And".

    `||'
          "Logical Or".

          These two logical operations can be used to combine the
          results of sub expressions.  Note, unlike the comparison
          operators a true result returns a value of 1 but a false
          results does still return 0.  Also note that the logical or
          operator has a slightly lower precedence than logical and.


   In short, it's only meaningful to add or subtract the _offsets_ in an
address; you can only have a defined section in one of the two
arguments.


File: m68k-rtems-as.info,  Node: Pseudo Ops,  Next: Machine Dependencies,  Prev: Expressions,  Up: Top

Assembler Directives
********************

All assembler directives have names that begin with a period (`.').
The rest of the name is letters, usually in lower case.

   This chapter discusses directives that are available regardless of
the target machine configuration for the GNU assembler.  Some machine
configurations provide additional directives.  *Note Machine
Dependencies::.

* Menu:

* Abort::                       `.abort'

* ABORT::                       `.ABORT'

* Align::                       `.align ABS-EXPR , ABS-EXPR'
* Ascii::                       `.ascii "STRING"'...
* Asciz::                       `.asciz "STRING"'...
* Balign::                      `.balign ABS-EXPR , ABS-EXPR'
* Byte::                        `.byte EXPRESSIONS'
* Comm::                        `.comm SYMBOL , LENGTH '
* Data::                        `.data SUBSECTION'

* Def::                         `.def NAME'

* Desc::                        `.desc SYMBOL, ABS-EXPRESSION'

* Dim::                         `.dim'

* Double::                      `.double FLONUMS'
* Eject::                       `.eject'
* Else::                        `.else'
* Elseif::                      `.elseif'
* End::				`.end'

* Endef::                       `.endef'

* Endfunc::                     `.endfunc'
* Endif::                       `.endif'
* Equ::                         `.equ SYMBOL, EXPRESSION'
* Equiv::                       `.equiv SYMBOL, EXPRESSION'
* Err::				`.err'
* Exitm::			`.exitm'
* Extern::                      `.extern'
* Fail::			`.fail'

* File::                        `.file STRING'

* Fill::                        `.fill REPEAT , SIZE , VALUE'
* Float::                       `.float FLONUMS'
* Func::                        `.func'
* Global::                      `.global SYMBOL', `.globl SYMBOL'

* Hidden::                      `.hidden NAMES'

* hword::                       `.hword EXPRESSIONS'
* Ident::                       `.ident'
* If::                          `.if ABSOLUTE EXPRESSION'
* Incbin::                      `.incbin "FILE"[,SKIP[,COUNT]]'
* Include::                     `.include "FILE"'
* Int::                         `.int EXPRESSIONS'

* Internal::                    `.internal NAMES'

* Irp::				`.irp SYMBOL,VALUES'...
* Irpc::			`.irpc SYMBOL,VALUES'...
* Lcomm::                       `.lcomm SYMBOL , LENGTH'
* Lflags::                      `.lflags'

* Line::                        `.line LINE-NUMBER'

* Ln::                          `.ln LINE-NUMBER'
* Linkonce::			`.linkonce [TYPE]'
* List::                        `.list'
* Long::                        `.long EXPRESSIONS'

* Macro::			`.macro NAME ARGS'...
* MRI::				`.mri VAL'
* Nolist::                      `.nolist'
* Octa::                        `.octa BIGNUMS'
* Org::                         `.org NEW-LC , FILL'
* P2align::                     `.p2align ABS-EXPR , ABS-EXPR'

* PopSection::                  `.popsection'
* Previous::                    `.previous'

* Print::			`.print STRING'

* Protected::                   `.protected NAMES'

* Psize::                       `.psize LINES, COLUMNS'
* Purgem::			`.purgem NAME'

* PushSection::                 `.pushsection NAME'

* Quad::                        `.quad BIGNUMS'
* Rept::			`.rept COUNT'
* Sbttl::                       `.sbttl "SUBHEADING"'

* Scl::                         `.scl CLASS'
* Section::                     `.section NAME, SUBSECTION'

* Set::                         `.set SYMBOL, EXPRESSION'
* Short::                       `.short EXPRESSIONS'
* Single::                      `.single FLONUMS'
* Size::                        `.size [NAME , EXPRESSION]'
* Skip::                        `.skip SIZE , FILL'
* Sleb128::			`.sleb128 EXPRESSIONS'
* Space::                       `.space SIZE , FILL'

* Stab::                        `.stabd, .stabn, .stabs'

* String::                      `.string "STR"'
* Struct::			`.struct EXPRESSION'

* SubSection::                  `.subsection'
* Symver::                      `.symver NAME,NAME2@NODENAME'


* Tag::                         `.tag STRUCTNAME'

* Text::                        `.text SUBSECTION'
* Title::                       `.title "HEADING"'
* Type::                        `.type <INT | NAME , TYPE DESCRIPTION>'
* Uleb128::                     `.uleb128 EXPRESSIONS'

* Val::                         `.val ADDR'


* Version::                     `.version "STRING"'
* VTableEntry::                 `.vtable_entry TABLE, OFFSET'
* VTableInherit::               `.vtable_inherit CHILD, PARENT'
* Weak::                        `.weak NAMES'

* Word::                        `.word EXPRESSIONS'
* Deprecated::                  Deprecated Directives


File: m68k-rtems-as.info,  Node: Abort,  Next: ABORT,  Up: Pseudo Ops

`.abort'
========

This directive stops the assembly immediately.  It is for compatibility
with other assemblers.  The original idea was that the assembly
language source would be piped into the assembler.  If the sender of
the source quit, it could use this directive tells `as' to quit also.
One day `.abort' will not be supported.


File: m68k-rtems-as.info,  Node: ABORT,  Next: Align,  Prev: Abort,  Up: Pseudo Ops

`.ABORT'
========

When producing COFF output, `as' accepts this directive as a synonym
for `.abort'.

   When producing `b.out' output, `as' accepts this directive, but
ignores it.


File: m68k-rtems-as.info,  Node: Align,  Next: Ascii,  Prev: ABORT,  Up: Pseudo Ops

`.align ABS-EXPR, ABS-EXPR, ABS-EXPR'
=====================================

Pad the location counter (in the current subsection) to a particular
storage boundary.  The first expression (which must be absolute) is the
alignment required, as described below.

   The second expression (also absolute) gives the fill value to be
stored in the padding bytes.  It (and the comma) may be omitted.  If it
is omitted, the padding bytes are normally zero.  However, on some
systems, if the section is marked as containing code and the fill value
is omitted, the space is filled with no-op instructions.

   The third expression is also absolute, and is also optional.  If it
is present, it is the maximum number of bytes that should be skipped by
this alignment directive.  If doing the alignment would require
skipping more bytes than the specified maximum, then the alignment is
not done at all.  You can omit the fill value (the second argument)
entirely by simply using two commas after the required alignment; this
can be useful if you want the alignment to be filled with no-op
instructions when appropriate.

   The way the required alignment is specified varies from system to
system.  For the a29k, hppa, m68k, m88k, w65, sparc, and Hitachi SH,
and i386 using ELF format, the first expression is the alignment
request in bytes.  For example `.align 8' advances the location counter
until it is a multiple of 8.  If the location counter is already a
multiple of 8, no change is needed.

   For other systems, including the i386 using a.out format, and the
arm and strongarm, it is the number of low-order zero bits the location
counter must have after advancement.  For example `.align 3' advances
the location counter until it a multiple of 8.  If the location counter
is already a multiple of 8, no change is needed.

   This inconsistency is due to the different behaviors of the various
native assemblers for these systems which GAS must emulate.  GAS also
provides `.balign' and `.p2align' directives, described later, which
have a consistent behavior across all architectures (but are specific
to GAS).


File: m68k-rtems-as.info,  Node: Ascii,  Next: Asciz,  Prev: Align,  Up: Pseudo Ops

`.ascii "STRING"'...
====================

`.ascii' expects zero or more string literals (*note Strings::)
separated by commas.  It assembles each string (with no automatic
trailing zero byte) into consecutive addresses.


File: m68k-rtems-as.info,  Node: Asciz,  Next: Balign,  Prev: Ascii,  Up: Pseudo Ops

`.asciz "STRING"'...
====================

`.asciz' is just like `.ascii', but each string is followed by a zero
byte.  The "z" in `.asciz' stands for "zero".


File: m68k-rtems-as.info,  Node: Balign,  Next: Byte,  Prev: Asciz,  Up: Pseudo Ops

`.balign[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR'
==========================================

Pad the location counter (in the current subsection) to a particular
storage boundary.  The first expression (which must be absolute) is the
alignment request in bytes.  For example `.balign 8' advances the
location counter until it is a multiple of 8.  If the location counter
is already a multiple of 8, no change is needed.

   The second expression (also absolute) gives the fill value to be
stored in the padding bytes.  It (and the comma) may be omitted.  If it
is omitted, the padding bytes are normally zero.  However, on some
systems, if the section is marked as containing code and the fill value
is omitted, the space is filled with no-op instructions.

   The third expression is also absolute, and is also optional.  If it
is present, it is the maximum number of bytes that should be skipped by
this alignment directive.  If doing the alignment would require
skipping more bytes than the specified maximum, then the alignment is
not done at all.  You can omit the fill value (the second argument)
entirely by simply using two commas after the required alignment; this
can be useful if you want the alignment to be filled with no-op
instructions when appropriate.

   The `.balignw' and `.balignl' directives are variants of the
`.balign' directive.  The `.balignw' directive treats the fill pattern
as a two byte word value.  The `.balignl' directives treats the fill
pattern as a four byte longword value.  For example, `.balignw
4,0x368d' will align to a multiple of 4.  If it skips two bytes, they
will be filled in with the value 0x368d (the exact placement of the
bytes depends upon the endianness of the processor).  If it skips 1 or
3 bytes, the fill value is undefined.


File: m68k-rtems-as.info,  Node: Byte,  Next: Comm,  Prev: Balign,  Up: Pseudo Ops

`.byte EXPRESSIONS'
===================

`.byte' expects zero or more expressions, separated by commas.  Each
expression is assembled into the next byte.


File: m68k-rtems-as.info,  Node: Comm,  Next: Data,  Prev: Byte,  Up: Pseudo Ops

`.comm SYMBOL , LENGTH '
========================

`.comm' declares a common symbol named SYMBOL.  When linking, a common
symbol in one object file may be merged with a defined or common symbol
of the same name in another object file.  If `ld' does not see a
definition for the symbol-just one or more common symbols-then it will
allocate LENGTH bytes of uninitialized memory.  LENGTH must be an
absolute expression.  If `ld' sees multiple common symbols with the
same name, and they do not all have the same size, it will allocate
space using the largest size.

   When using ELF, the `.comm' directive takes an optional third
argument.  This is the desired alignment of the symbol, specified as a
byte boundary (for example, an alignment of 16 means that the least
significant 4 bits of the address should be zero).  The alignment must
be an absolute expression, and it must be a power of two.  If `ld'
allocates uninitialized memory for the common symbol, it will use the
alignment when placing the symbol.  If no alignment is specified, `as'
will set the alignment to the largest power of two less than or equal
to the size of the symbol, up to a maximum of 16.

   The syntax for `.comm' differs slightly on the HPPA.  The syntax is
`SYMBOL .comm, LENGTH'; SYMBOL is optional.


File: m68k-rtems-as.info,  Node: Data,  Next: Def,  Prev: Comm,  Up: Pseudo Ops

`.data SUBSECTION'
==================

`.data' tells `as' to assemble the following statements onto the end of
the data subsection numbered SUBSECTION (which is an absolute
expression).  If SUBSECTION is omitted, it defaults to zero.


File: m68k-rtems-as.info,  Node: Def,  Next: Desc,  Prev: Data,  Up: Pseudo Ops

`.def NAME'
===========

Begin defining debugging information for a symbol NAME; the definition
extends until the `.endef' directive is encountered.

   This directive is only observed when `as' is configured for COFF
format output; when producing `b.out', `.def' is recognized, but
ignored.


File: m68k-rtems-as.info,  Node: Desc,  Next: Dim,  Prev: Def,  Up: Pseudo Ops

`.desc SYMBOL, ABS-EXPRESSION'
==============================

This directive sets the descriptor of the symbol (*note Symbol
Attributes::) to the low 16 bits of an absolute expression.

   The `.desc' directive is not available when `as' is configured for
COFF output; it is only for `a.out' or `b.out' object format.  For the
sake of compatibility, `as' accepts it, but produces no output, when
configured for COFF.


File: m68k-rtems-as.info,  Node: Dim,  Next: Double,  Prev: Desc,  Up: Pseudo Ops

`.dim'
======

This directive is generated by compilers to include auxiliary debugging
information in the symbol table.  It is only permitted inside
`.def'/`.endef' pairs.

   `.dim' is only meaningful when generating COFF format output; when
`as' is generating `b.out', it accepts this directive but ignores it.


File: m68k-rtems-as.info,  Node: Double,  Next: Eject,  Prev: Dim,  Up: Pseudo Ops

`.double FLONUMS'
=================

`.double' expects zero or more flonums, separated by commas.  It
assembles floating point numbers.  The exact kind of floating point
numbers emitted depends on how `as' is configured.  *Note Machine
Dependencies::.


File: m68k-rtems-as.info,  Node: Eject,  Next: Else,  Prev: Double,  Up: Pseudo Ops

`.eject'
========

Force a page break at this point, when generating assembly listings.


File: m68k-rtems-as.info,  Node: Else,  Next: Elseif,  Prev: Eject,  Up: Pseudo Ops

`.else'
=======

`.else' is part of the `as' support for conditional assembly; *note
`.if': If..  It marks the beginning of a section of code to be
assembled if the condition for the preceding `.if' was false.


File: m68k-rtems-as.info,  Node: Elseif,  Next: End,  Prev: Else,  Up: Pseudo Ops

`.elseif'
=========

`.elseif' is part of the `as' support for conditional assembly; *note
`.if': If..  It is shorthand for beginning a new `.if' block that would
otherwise fill the entire `.else' section.


File: m68k-rtems-as.info,  Node: End,  Next: Endef,  Prev: Elseif,  Up: Pseudo Ops

`.end'
======

`.end' marks the end of the assembly file.  `as' does not process
anything in the file past the `.end' directive.


File: m68k-rtems-as.info,  Node: Endef,  Next: Endfunc,  Prev: End,  Up: Pseudo Ops

`.endef'
========

This directive flags the end of a symbol definition begun with `.def'.

   `.endef' is only meaningful when generating COFF format output; if
`as' is configured to generate `b.out', it accepts this directive but
ignores it.


File: m68k-rtems-as.info,  Node: Endfunc,  Next: Endif,  Prev: Endef,  Up: Pseudo Ops

`.endfunc'
==========

`.endfunc' marks the end of a function specified with `.func'.


File: m68k-rtems-as.info,  Node: Endif,  Next: Equ,  Prev: Endfunc,  Up: Pseudo Ops

`.endif'
========

`.endif' is part of the `as' support for conditional assembly; it marks
the end of a block of code that is only assembled conditionally.  *Note
`.if': If.


File: m68k-rtems-as.info,  Node: Equ,  Next: Equiv,  Prev: Endif,  Up: Pseudo Ops

`.equ SYMBOL, EXPRESSION'
=========================

This directive sets the value of SYMBOL to EXPRESSION.  It is
synonymous with `.set'; *note `.set': Set..

   The syntax for `equ' on the HPPA is `SYMBOL .equ EXPRESSION'.


File: m68k-rtems-as.info,  Node: Equiv,  Next: Err,  Prev: Equ,  Up: Pseudo Ops

`.equiv SYMBOL, EXPRESSION'
===========================

The `.equiv' directive is like `.equ' and `.set', except that the
assembler will signal an error if SYMBOL is already defined.

   Except for the contents of the error message, this is roughly
equivalent to
     .ifdef SYM
     .err
     .endif
     .equ SYM,VAL


File: m68k-rtems-as.info,  Node: Err,  Next: Exitm,  Prev: Equiv,  Up: Pseudo Ops

`.err'
======

If `as' assembles a `.err' directive, it will print an error message
and, unless the `-Z' option was used, it will not generate an object
file.  This can be used to signal error an conditionally compiled code.


File: m68k-rtems-as.info,  Node: Exitm,  Next: Extern,  Prev: Err,  Up: Pseudo Ops

`.exitm'
========

Exit early from the current macro definition.  *Note Macro::.


File: m68k-rtems-as.info,  Node: Extern,  Next: Fail,  Prev: Exitm,  Up: Pseudo Ops

`.extern'
=========

`.extern' is accepted in the source program--for compatibility with
other assemblers--but it is ignored.  `as' treats all undefined symbols
as external.


File: m68k-rtems-as.info,  Node: Fail,  Next: File,  Prev: Extern,  Up: Pseudo Ops

`.fail EXPRESSION'
==================

Generates an error or a warning.  If the value of the EXPRESSION is 500
or more, `as' will print a warning message.  If the value is less than
500, `as' will print an error message.  The message will include the
value of EXPRESSION.  This can occasionally be useful inside complex
nested macros or conditional assembly.


File: m68k-rtems-as.info,  Node: File,  Next: Fill,  Prev: Fail,  Up: Pseudo Ops

`.file STRING'
==============

`.file' tells `as' that we are about to start a new logical file.
STRING is the new file name.  In general, the filename is recognized
whether or not it is surrounded by quotes `"'; but if you wish to
specify an empty file name, you must give the quotes-`""'.  This
statement may go away in future: it is only recognized to be compatible
with old `as' programs.  In some configurations of `as', `.file' has
already been removed to avoid conflicts with other assemblers.  *Note
Machine Dependencies::.


File: m68k-rtems-as.info,  Node: Fill,  Next: Float,  Prev: File,  Up: Pseudo Ops

`.fill REPEAT , SIZE , VALUE'
=============================

REPEAT, SIZE and VALUE are absolute expressions.  This emits REPEAT
copies of SIZE bytes.  REPEAT may be zero or more.  SIZE may be zero or
more, but if it is more than 8, then it is deemed to have the value 8,
compatible with other people's assemblers.  The contents of each REPEAT
bytes is taken from an 8-byte number.  The highest order 4 bytes are
zero.  The lowest order 4 bytes are VALUE rendered in the byte-order of
an integer on the computer `as' is assembling for.  Each SIZE bytes in
a repetition is taken from the lowest order SIZE bytes of this number.
Again, this bizarre behavior is compatible with other people's
assemblers.

   SIZE and VALUE are optional.  If the second comma and VALUE are
absent, VALUE is assumed zero.  If the first comma and following tokens
are absent, SIZE is assumed to be 1.


File: m68k-rtems-as.info,  Node: Float,  Next: Func,  Prev: Fill,  Up: Pseudo Ops

`.float FLONUMS'
================

This directive assembles zero or more flonums, separated by commas.  It
has the same effect as `.single'.  The exact kind of floating point
numbers emitted depends on how `as' is configured.  *Note Machine
Dependencies::.


File: m68k-rtems-as.info,  Node: Func,  Next: Global,  Prev: Float,  Up: Pseudo Ops

`.func NAME[,LABEL]'
====================

`.func' emits debugging information to denote function NAME, and is
ignored unless the file is assembled with debugging enabled.  Only
`--gstabs' is currently supported.  LABEL is the entry point of the
function and if omitted NAME prepended with the `leading char' is used.
`leading char' is usually `_' or nothing, depending on the target.  All
functions are currently defined to have `void' return type.  The
function must be terminated with `.endfunc'.


File: m68k-rtems-as.info,  Node: Global,  Next: Hidden,  Prev: Func,  Up: Pseudo Ops

`.global SYMBOL', `.globl SYMBOL'
=================================

`.global' makes the symbol visible to `ld'.  If you define SYMBOL in
your partial program, its value is made available to other partial
programs that are linked with it.  Otherwise, SYMBOL takes its
attributes from a symbol of the same name from another file linked into
the same program.

   Both spellings (`.globl' and `.global') are accepted, for
compatibility with other assemblers.

   On the HPPA, `.global' is not always enough to make it accessible to
other partial programs.  You may need the HPPA-only `.EXPORT' directive
as well.  *Note HPPA Assembler Directives: HPPA Directives.


File: m68k-rtems-as.info,  Node: Hidden,  Next: hword,  Prev: Global,  Up: Pseudo Ops

`.hidden NAMES'
===============

This one of the ELF visibility directives.  The other two are
`.internal' (*note `.internal': Internal.) and `.protected' (*note
`.protected': Protected.).

   This directive overrides the named symbols default visibility (which
is set by their binding: local, global or weak).  The directive sets
the visibility to `hidden' which means that the symbols are not visible
to other components.  Such symbols are always considered to be
`protected' as well.


File: m68k-rtems-as.info,  Node: hword,  Next: Ident,  Prev: Hidden,  Up: Pseudo Ops

`.hword EXPRESSIONS'
====================

This expects zero or more EXPRESSIONS, and emits a 16 bit number for
each.

   This directive is a synonym for `.short'; depending on the target
architecture, it may also be a synonym for `.word'.


File: m68k-rtems-as.info,  Node: Ident,  Next: If,  Prev: hword,  Up: Pseudo Ops

`.ident'
========

This directive is used by some assemblers to place tags in object files.
`as' simply accepts the directive for source-file compatibility with
such assemblers, but does not actually emit anything for it.


File: m68k-rtems-as.info,  Node: If,  Next: Incbin,  Prev: Ident,  Up: Pseudo Ops

`.if ABSOLUTE EXPRESSION'
=========================

`.if' marks the beginning of a section of code which is only considered
part of the source program being assembled if the argument (which must
be an ABSOLUTE EXPRESSION) is non-zero.  The end of the conditional
section of code must be marked by `.endif' (*note `.endif': Endif.);
optionally, you may include code for the alternative condition, flagged
by `.else' (*note `.else': Else.).  If you have several conditions to
check, `.elseif' may be used to avoid nesting blocks if/else within
each subsequent `.else' block.

   The following variants of `.if' are also supported:
`.ifdef SYMBOL'
     Assembles the following section of code if the specified SYMBOL
     has been defined.

`.ifc STRING1,STRING2'
     Assembles the following section of code if the two strings are the
     same.  The strings may be optionally quoted with single quotes.
     If they are not quoted, the first string stops at the first comma,
     and the second string stops at the end of the line.  Strings which
     contain whitespace should be quoted.  The string comparison is
     case sensitive.

`.ifeq ABSOLUTE EXPRESSION'
     Assembles the following section of code if the argument is zero.

`.ifeqs STRING1,STRING2'
     Another form of `.ifc'.  The strings must be quoted using double
     quotes.

`.ifge ABSOLUTE EXPRESSION'
     Assembles the following section of code if the argument is greater
     than or equal to zero.

`.ifgt ABSOLUTE EXPRESSION'
     Assembles the following section of code if the argument is greater
     than zero.

`.ifle ABSOLUTE EXPRESSION'
     Assembles the following section of code if the argument is less
     than or equal to zero.

`.iflt ABSOLUTE EXPRESSION'
     Assembles the following section of code if the argument is less
     than zero.

`.ifnc STRING1,STRING2.'
     Like `.ifc', but the sense of the test is reversed: this assembles
     the following section of code if the two strings are not the same.

`.ifndef SYMBOL'
`.ifnotdef SYMBOL'
     Assembles the following section of code if the specified SYMBOL
     has not been defined.  Both spelling variants are equivalent.

`.ifne ABSOLUTE EXPRESSION'
     Assembles the following section of code if the argument is not
     equal to zero (in other words, this is equivalent to `.if').

`.ifnes STRING1,STRING2'
     Like `.ifeqs', but the sense of the test is reversed: this
     assembles the following section of code if the two strings are not
     the same.


File: m68k-rtems-as.info,  Node: Incbin,  Next: Include,  Prev: If,  Up: Pseudo Ops

`.incbin "FILE"[,SKIP[,COUNT]]'
===============================

The `incbin' directive includes FILE verbatim at the current location.
You can control the search paths used with the `-I' command-line option
(*note Command-Line Options: Invoking.).  Quotation marks are required
around FILE.

   The SKIP argument skips a number of bytes from the start of the
FILE.  The COUNT argument indicates the maximum number of bytes to
read.  Note that the data is not aligned in any way, so it is the user's
responsibility to make sure that proper alignment is provided both
before and after the `incbin' directive.


File: m68k-rtems-as.info,  Node: Include,  Next: Int,  Prev: Incbin,  Up: Pseudo Ops

`.include "FILE"'
=================

This directive provides a way to include supporting files at specified
points in your source program.  The code from FILE is assembled as if
it followed the point of the `.include'; when the end of the included
file is reached, assembly of the original file continues.  You can
control the search paths used with the `-I' command-line option (*note
Command-Line Options: Invoking.).  Quotation marks are required around
FILE.


File: m68k-rtems-as.info,  Node: Int,  Next: Internal,  Prev: Include,  Up: Pseudo Ops

`.int EXPRESSIONS'
==================

Expect zero or more EXPRESSIONS, of any section, separated by commas.
For each expression, emit a number that, at run time, is the value of
that expression.  The byte order and bit size of the number depends on
what kind of target the assembly is for.


File: m68k-rtems-as.info,  Node: Internal,  Next: Irp,  Prev: Int,  Up: Pseudo Ops

`.internal NAMES'
=================

This one of the ELF visibility directives.  The other two are `.hidden'
(*note `.hidden': Hidden.) and `.protected' (*note `.protected':
Protected.).

   This directive overrides the named symbols default visibility (which
is set by their binding: local, global or weak).  The directive sets
the visibility to `internal' which means that the symbols are
considered to be `hidden' (ie not visible to other components), and
that some extra, processor specific processing must also be performed
upon the  symbols as well.


File: m68k-rtems-as.info,  Node: Irp,  Next: Irpc,  Prev: Internal,  Up: Pseudo Ops

`.irp SYMBOL,VALUES'...
=======================

Evaluate a sequence of statements assigning different values to SYMBOL.
The sequence of statements starts at the `.irp' directive, and is
terminated by an `.endr' directive.  For each VALUE, SYMBOL is set to
VALUE, and the sequence of statements is assembled.  If no VALUE is
listed, the sequence of statements is assembled once, with SYMBOL set
to the null string.  To refer to SYMBOL within the sequence of
statements, use \SYMBOL.

   For example, assembling

             .irp    param,1,2,3
             move    d\param,sp@-
             .endr

   is equivalent to assembling

             move    d1,sp@-
             move    d2,sp@-
             move    d3,sp@-


File: m68k-rtems-as.info,  Node: Irpc,  Next: Lcomm,  Prev: Irp,  Up: Pseudo Ops

`.irpc SYMBOL,VALUES'...
========================

Evaluate a sequence of statements assigning different values to SYMBOL.
The sequence of statements starts at the `.irpc' directive, and is
terminated by an `.endr' directive.  For each character in VALUE,
SYMBOL is set to the character, and the sequence of statements is
assembled.  If no VALUE is listed, the sequence of statements is
assembled once, with SYMBOL set to the null string.  To refer to SYMBOL
within the sequence of statements, use \SYMBOL.

   For example, assembling

             .irpc    param,123
             move    d\param,sp@-
             .endr

   is equivalent to assembling

             move    d1,sp@-
             move    d2,sp@-
             move    d3,sp@-


File: m68k-rtems-as.info,  Node: Lcomm,  Next: Lflags,  Prev: Irpc,  Up: Pseudo Ops

`.lcomm SYMBOL , LENGTH'
========================

Reserve LENGTH (an absolute expression) bytes for a local common
denoted by SYMBOL.  The section and value of SYMBOL are those of the
new local common.  The addresses are allocated in the bss section, so
that at run-time the bytes start off zeroed.  SYMBOL is not declared
global (*note `.global': Global.), so is normally not visible to `ld'.

   Some targets permit a third argument to be used with `.lcomm'.  This
argument specifies the desired alignment of the symbol in the bss
section.

   The syntax for `.lcomm' differs slightly on the HPPA.  The syntax is
`SYMBOL .lcomm, LENGTH'; SYMBOL is optional.


File: m68k-rtems-as.info,  Node: Lflags,  Next: Line,  Prev: Lcomm,  Up: Pseudo Ops

`.lflags'
=========

`as' accepts this directive, for compatibility with other assemblers,
but ignores it.


File: m68k-rtems-as.info,  Node: Line,  Next: Ln,  Prev: Lflags,  Up: Pseudo Ops

`.line LINE-NUMBER'
===================

   Change the logical line number.  LINE-NUMBER must be an absolute
expression.  The next line has that logical line number.  Therefore any
other statements on the current line (after a statement separator
character) are reported as on logical line number LINE-NUMBER - 1.  One
day `as' will no longer support this directive: it is recognized only
for compatibility with existing assembler programs.

   _Warning:_ In the AMD29K configuration of as, this command is not
available; use the synonym `.ln' in that context.

   Even though this is a directive associated with the `a.out' or
`b.out' object-code formats, `as' still recognizes it when producing
COFF output, and treats `.line' as though it were the COFF `.ln' _if_
it is found outside a `.def'/`.endef' pair.

   Inside a `.def', `.line' is, instead, one of the directives used by
compilers to generate auxiliary symbol information for debugging.


File: m68k-rtems-as.info,  Node: Linkonce,  Next: List,  Prev: Ln,  Up: Pseudo Ops

`.linkonce [TYPE]'
==================

Mark the current section so that the linker only includes a single copy
of it.  This may be used to include the same section in several
different object files, but ensure that the linker will only include it
once in the final output file.  The `.linkonce' pseudo-op must be used
for each instance of the section.  Duplicate sections are detected
based on the section name, so it should be unique.

   This directive is only supported by a few object file formats; as of
this writing, the only object file format which supports it is the
Portable Executable format used on Windows NT.

   The TYPE argument is optional.  If specified, it must be one of the
following strings.  For example:
     .linkonce same_size
   Not all types may be supported on all object file formats.

`discard'
     Silently discard duplicate sections.  This is the default.

`one_only'
     Warn if there are duplicate sections, but still keep only one copy.

`same_size'
     Warn if any of the duplicates have different sizes.

`same_contents'
     Warn if any of the duplicates do not have exactly the same
     contents.


File: m68k-rtems-as.info,  Node: Ln,  Next: Linkonce,  Prev: Line,  Up: Pseudo Ops

`.ln LINE-NUMBER'
=================

`.ln' is a synonym for `.line'.


File: m68k-rtems-as.info,  Node: MRI,  Next: Nolist,  Prev: Macro,  Up: Pseudo Ops

`.mri VAL'
==========

If VAL is non-zero, this tells `as' to enter MRI mode.  If VAL is zero,
this tells `as' to exit MRI mode.  This change affects code assembled
until the next `.mri' directive, or until the end of the file.  *Note
MRI mode: M.


File: m68k-rtems-as.info,  Node: List,  Next: Long,  Prev: Linkonce,  Up: Pseudo Ops

`.list'
=======

Control (in conjunction with the `.nolist' directive) whether or not
assembly listings are generated.  These two directives maintain an
internal counter (which is zero initially).   `.list' increments the
counter, and `.nolist' decrements it.  Assembly listings are generated
whenever the counter is greater than zero.

   By default, listings are disabled.  When you enable them (with the
`-a' command line option; *note Command-Line Options: Invoking.), the
initial value of the listing counter is one.


File: m68k-rtems-as.info,  Node: Long,  Next: Macro,  Prev: List,  Up: Pseudo Ops

`.long EXPRESSIONS'
===================

`.long' is the same as `.int', *note `.int': Int..


File: m68k-rtems-as.info,  Node: Macro,  Next: MRI,  Prev: Long,  Up: Pseudo Ops

`.macro'
========

The commands `.macro' and `.endm' allow you to define macros that
generate assembly output.  For example, this definition specifies a
macro `sum' that puts a sequence of numbers into memory:

             .macro  sum from=0, to=5
             .long   \from
             .if     \to-\from
             sum     "(\from+1)",\to
             .endif
             .endm

With that definition, `SUM 0,5' is equivalent to this assembly input:

             .long   0
             .long   1
             .long   2
             .long   3
             .long   4
             .long   5

`.macro MACNAME'
`.macro MACNAME MACARGS ...'
     Begin the definition of a macro called MACNAME.  If your macro
     definition requires arguments, specify their names after the macro
     name, separated by commas or spaces.  You can supply a default
     value for any macro argument by following the name with `=DEFLT'.
     For example, these are all valid `.macro' statements:

    `.macro comm'
          Begin the definition of a macro called `comm', which takes no
          arguments.

    `.macro plus1 p, p1'
    `.macro plus1 p p1'
          Either statement begins the definition of a macro called
          `plus1', which takes two arguments; within the macro
          definition, write `\p' or `\p1' to evaluate the arguments.

    `.macro reserve_str p1=0 p2'
          Begin the definition of a macro called `reserve_str', with two
          arguments.  The first argument has a default value, but not
          the second.  After the definition is complete, you can call
          the macro either as `reserve_str A,B' (with `\p1' evaluating
          to A and `\p2' evaluating to B), or as `reserve_str ,B' (with
          `\p1' evaluating as the default, in this case `0', and `\p2'
          evaluating to B).

     When you call a macro, you can specify the argument values either
     by position, or by keyword.  For example, `sum 9,17' is equivalent
     to `sum to=17, from=9'.

`.endm'
     Mark the end of a macro definition.

`.exitm'
     Exit early from the current macro definition.

`\@'
     `as' maintains a counter of how many macros it has executed in
     this pseudo-variable; you can copy that number to your output with
     `\@', but _only within a macro definition_.



File: m68k-rtems-as.info,  Node: Nolist,  Next: Octa,  Prev: MRI,  Up: Pseudo Ops

`.nolist'
=========

Control (in conjunction with the `.list' directive) whether or not
assembly listings are generated.  These two directives maintain an
internal counter (which is zero initially).   `.list' increments the
counter, and `.nolist' decrements it.  Assembly listings are generated
whenever the counter is greater than zero.


File: m68k-rtems-as.info,  Node: Octa,  Next: Org,  Prev: Nolist,  Up: Pseudo Ops

`.octa BIGNUMS'
===============

This directive expects zero or more bignums, separated by commas.  For
each bignum, it emits a 16-byte integer.

   The term "octa" comes from contexts in which a "word" is two bytes;
hence _octa_-word for 16 bytes.


File: m68k-rtems-as.info,  Node: Org,  Next: P2align,  Prev: Octa,  Up: Pseudo Ops

`.org NEW-LC , FILL'
====================

Advance the location counter of the current section to NEW-LC.  NEW-LC
is either an absolute expression or an expression with the same section
as the current subsection.  That is, you can't use `.org' to cross
sections: if NEW-LC has the wrong section, the `.org' directive is
ignored.  To be compatible with former assemblers, if the section of
NEW-LC is absolute, `as' issues a warning, then pretends the section of
NEW-LC is the same as the current subsection.

   `.org' may only increase the location counter, or leave it
unchanged; you cannot use `.org' to move the location counter backwards.

   Because `as' tries to assemble programs in one pass, NEW-LC may not
be undefined.  If you really detest this restriction we eagerly await a
chance to share your improved assembler.

   Beware that the origin is relative to the start of the section, not
to the start of the subsection.  This is compatible with other people's
assemblers.

   When the location counter (of the current subsection) is advanced,
the intervening bytes are filled with FILL which should be an absolute
expression.  If the comma and FILL are omitted, FILL defaults to zero.


File: m68k-rtems-as.info,  Node: P2align,  Next: PopSection,  Prev: Org,  Up: Pseudo Ops

`.p2align[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR'
===========================================

Pad the location counter (in the current subsection) to a particular
storage boundary.  The first expression (which must be absolute) is the
number of low-order zero bits the location counter must have after
advancement.  For example `.p2align 3' advances the location counter
until it a multiple of 8.  If the location counter is already a
multiple of 8, no change is needed.

   The second expression (also absolute) gives the fill value to be
stored in the padding bytes.  It (and the comma) may be omitted.  If it
is omitted, the padding bytes are normally zero.  However, on some
systems, if the section is marked as containing code and the fill value
is omitted, the space is filled with no-op instructions.

   The third expression is also absolute, and is also optional.  If it
is present, it is the maximum number of bytes that should be skipped by
this alignment directive.  If doing the alignment would require
skipping more bytes than the specified maximum, then the alignment is
not done at all.  You can omit the fill value (the second argument)
entirely by simply using two commas after the required alignment; this
can be useful if you want the alignment to be filled with no-op
instructions when appropriate.

   The `.p2alignw' and `.p2alignl' directives are variants of the
`.p2align' directive.  The `.p2alignw' directive treats the fill
pattern as a two byte word value.  The `.p2alignl' directives treats the
fill pattern as a four byte longword value.  For example, `.p2alignw
2,0x368d' will align to a multiple of 4.  If it skips two bytes, they
will be filled in with the value 0x368d (the exact placement of the
bytes depends upon the endianness of the processor).  If it skips 1 or
3 bytes, the fill value is undefined.


File: m68k-rtems-as.info,  Node: Previous,  Next: Print,  Prev: PopSection,  Up: Pseudo Ops

`.previous'
===========

This is one of the ELF section stack manipulation directives.  The
others are `.section' (*note Section::), `.subsection' (*note
SubSection::), `.pushsection' (*note PushSection::), and `.popsection'
(*note PopSection::).

   This directive swaps the current section (and subsection) with most
recently referenced section (and subsection) prior to this one.
Multiple `.previous' directives in a row will flip between two sections
(and their subsections).

   In terms of the section stack, this directive swaps the current
section with the top section on the section stack.


File: m68k-rtems-as.info,  Node: PopSection,  Next: Previous,  Prev: P2align,  Up: Pseudo Ops

`.popsection'
=============

This is one of the ELF section stack manipulation directives.  The
others are `.section' (*note Section::), `.subsection' (*note
SubSection::), `.pushsection' (*note PushSection::), and `.previous'
(*note Previous::).

   This directive replaces the current section (and subsection) with
the top section (and subsection) on the section stack.  This section is
popped off the stack.


File: m68k-rtems-as.info,  Node: Print,  Next: Protected,  Prev: Previous,  Up: Pseudo Ops

`.print STRING'
===============

`as' will print STRING on the standard output during assembly.  You
must put STRING in double quotes.


File: m68k-rtems-as.info,  Node: Protected,  Next: Psize,  Prev: Print,  Up: Pseudo Ops

`.protected NAMES'
==================

This one of the ELF visibility directives.  The other two are `.hidden'
(*note Hidden::) and `.internal' (*note Internal::).

   This directive overrides the named symbols default visibility (which
is set by their binding: local, global or weak).  The directive sets
the visibility to `protected' which means that any references to the
symbols from within the components that defines them must be resolved
to the definition in that component, even if a definition in another
component would normally preempt this.


File: m68k-rtems-as.info,  Node: Psize,  Next: Purgem,  Prev: Protected,  Up: Pseudo Ops

`.psize LINES , COLUMNS'
========================

Use this directive to declare the number of lines--and, optionally, the
number of columns--to use for each page, when generating listings.

   If you do not use `.psize', listings use a default line-count of 60.
You may omit the comma and COLUMNS specification; the default width is
200 columns.

   `as' generates formfeeds whenever the specified number of lines is
exceeded (or whenever you explicitly request one, using `.eject').

   If you specify LINES as `0', no formfeeds are generated save those
explicitly specified with `.eject'.


File: m68k-rtems-as.info,  Node: Purgem,  Next: PushSection,  Prev: Psize,  Up: Pseudo Ops

`.purgem NAME'
==============

Undefine the macro NAME, so that later uses of the string will not be
expanded.  *Note Macro::.


File: m68k-rtems-as.info,  Node: PushSection,  Next: Quad,  Prev: Purgem,  Up: Pseudo Ops

`.pushsection NAME , SUBSECTION'
================================

This is one of the ELF section stack manipulation directives.  The
others are `.section' (*note Section::), `.subsection' (*note
SubSection::), `.popsection' (*note PopSection::), and `.previous'
(*note Previous::).

   This directive is a synonym for `.section'.  It pushes the current
section (and subsection) onto the top of the section stack, and then
replaces the current section and subsection with `name' and
`subsection'.


File: m68k-rtems-as.info,  Node: Quad,  Next: Rept,  Prev: PushSection,  Up: Pseudo Ops

`.quad BIGNUMS'
===============

`.quad' expects zero or more bignums, separated by commas.  For each
bignum, it emits an 8-byte integer.  If the bignum won't fit in 8
bytes, it prints a warning message; and just takes the lowest order 8
bytes of the bignum.

   The term "quad" comes from contexts in which a "word" is two bytes;
hence _quad_-word for 8 bytes.


File: m68k-rtems-as.info,  Node: Rept,  Next: Sbttl,  Prev: Quad,  Up: Pseudo Ops

`.rept COUNT'
=============

Repeat the sequence of lines between the `.rept' directive and the next
`.endr' directive COUNT times.

   For example, assembling

             .rept   3
             .long   0
             .endr

   is equivalent to assembling

             .long   0
             .long   0
             .long   0


File: m68k-rtems-as.info,  Node: Sbttl,  Next: Scl,  Prev: Rept,  Up: Pseudo Ops

`.sbttl "SUBHEADING"'
=====================

Use SUBHEADING as the title (third line, immediately after the title
line) when generating assembly listings.

   This directive affects subsequent pages, as well as the current page
if it appears within ten lines of the top of a page.


File: m68k-rtems-as.info,  Node: Scl,  Next: Section,  Prev: Sbttl,  Up: Pseudo Ops

`.scl CLASS'
============

Set the storage-class value for a symbol.  This directive may only be
used inside a `.def'/`.endef' pair.  Storage class may flag whether a
symbol is static or external, or it may record further symbolic
debugging information.

   The `.scl' directive is primarily associated with COFF output; when
configured to generate `b.out' output format, `as' accepts this
directive but ignores it.


File: m68k-rtems-as.info,  Node: Section,  Next: Set,  Prev: Scl,  Up: Pseudo Ops

`.section NAME' (COFF version)
==============================

Use the `.section' directive to assemble the following code into a
section named NAME.

   This directive is only supported for targets that actually support
arbitrarily named sections; on `a.out' targets, for example, it is not
accepted, even with a standard `a.out' section name.

   For COFF targets, the `.section' directive is used in one of the
following ways:

     .section NAME[, "FLAGS"]
     .section NAME[, SUBSEGMENT]

   If the optional argument is quoted, it is taken as flags to use for
the section.  Each flag is a single character.  The following flags are
recognized:
`b'
     bss section (uninitialized data)

`n'
     section is not loaded

`w'
     writable section

`d'
     data section

`r'
     read-only section

`x'
     executable section

`s'
     shared section (meaningful for PE targets)

`a'
     ignored.  (For compatibility with the ELF version)

   If no flags are specified, the default flags depend upon the section
name.  If the section name is not recognized, the default will be for
the section to be loaded and writable.  Note the `n' and `w' flags
remove attributes from the section, rather than adding them, so if they
are used on their own it will be as if no flags had been specified at
all.

   If the optional argument to the `.section' directive is not quoted,
it is taken as a subsegment number (*note Sub-Sections::).

`.section NAME' (ELF version)
=============================

This is one of the ELF section stack manipulation directives.  The
others are `.subsection' (*note SubSection::), `.pushsection' (*note
PushSection::), `.popsection' (*note PopSection::), and `.previous'
(*note Previous::).

For ELF targets, the `.section' directive is used like this:

     .section NAME [, "FLAGS"[, @TYPE[, @ENTSIZE]]]

   The optional FLAGS argument is a quoted string which may contain any
combination of the following characters:
`a'
     section is allocatable

`w'
     section is writable

`x'
     section is executable

`M'
     section is mergeable

`S'
     section contains zero terminated strings

   The optional TYPE argument may contain one of the following
constants:
`@progbits'
     section contains data

`@nobits'
     section does not contain data (i.e., section only occupies space)

   If FLAGS contains `M' flag, TYPE argument must be specified as well
as ENTSIZE argument. Sections with `M' flag but not `S' flag must
contain fixed size constants, each ENTSIZE octets long. Sections with
both `M' and `S' must contain zero terminated strings where each
character is ENTSIZE bytes long. The linker may remove duplicates
within sections with the same name, same entity size and same flags.

   If no flags are specified, the default flags depend upon the section
name.  If the section name is not recognized, the default will be for
the section to have none of the above flags: it will not be allocated
in memory, nor writable, nor executable.  The section will contain data.

   For ELF targets, the assembler supports another type of `.section'
directive for compatibility with the Solaris assembler:

     .section "NAME"[, FLAGS...]

   Note that the section name is quoted.  There may be a sequence of
comma separated flags:
`#alloc'
     section is allocatable

`#write'
     section is writable

`#execinstr'
     section is executable

   This directive replaces the current section and subsection.  The
replaced section and subsection are pushed onto the section stack.  See
the contents of the gas testsuite directory `gas/testsuite/gas/elf' for
some examples of how this directive and the other section stack
directives work.


File: m68k-rtems-as.info,  Node: Set,  Next: Short,  Prev: Section,  Up: Pseudo Ops

`.set SYMBOL, EXPRESSION'
=========================

Set the value of SYMBOL to EXPRESSION.  This changes SYMBOL's value and
type to conform to EXPRESSION.  If SYMBOL was flagged as external, it
remains flagged (*note Symbol Attributes::).

   You may `.set' a symbol many times in the same assembly.

   If you `.set' a global symbol, the value stored in the object file
is the last value stored into it.

   The syntax for `set' on the HPPA is `SYMBOL .set EXPRESSION'.


File: m68k-rtems-as.info,  Node: Short,  Next: Single,  Prev: Set,  Up: Pseudo Ops

`.short EXPRESSIONS'
====================

`.short' is normally the same as `.word'.  *Note `.word': Word.

   In some configurations, however, `.short' and `.word' generate
numbers of different lengths; *note Machine Dependencies::.


File: m68k-rtems-as.info,  Node: Single,  Next: Size,  Prev: Short,  Up: Pseudo Ops

`.single FLONUMS'
=================

This directive assembles zero or more flonums, separated by commas.  It
has the same effect as `.float'.  The exact kind of floating point
numbers emitted depends on how `as' is configured.  *Note Machine
Dependencies::.


File: m68k-rtems-as.info,  Node: Size,  Next: Skip,  Prev: Single,  Up: Pseudo Ops

`.size' (COFF version)
======================

This directive is generated by compilers to include auxiliary debugging
information in the symbol table.  It is only permitted inside
`.def'/`.endef' pairs.

   `.size' is only meaningful when generating COFF format output; when
`as' is generating `b.out', it accepts this directive but ignores it.

`.size NAME , EXPRESSION' (ELF version)
=======================================

This directive is used to set the size associated with a symbol NAME.
The size in bytes is computed from EXPRESSION which can make use of
label arithmetic.  This directive is typically used to set the size of
function symbols.


File: m68k-rtems-as.info,  Node: Sleb128,  Next: Space,  Prev: Skip,  Up: Pseudo Ops

`.sleb128 EXPRESSIONS'
======================

SLEB128 stands for "signed little endian base 128."  This is a compact,
variable length representation of numbers used by the DWARF symbolic
debugging format.  *Note `.uleb128': Uleb128.


File: m68k-rtems-as.info,  Node: Skip,  Next: Sleb128,  Prev: Size,  Up: Pseudo Ops

`.skip SIZE , FILL'
===================

This directive emits SIZE bytes, each of value FILL.  Both SIZE and
FILL are absolute expressions.  If the comma and FILL are omitted, FILL
is assumed to be zero.  This is the same as `.space'.


File: m68k-rtems-as.info,  Node: Space,  Next: Stab,  Prev: Sleb128,  Up: Pseudo Ops

`.space SIZE , FILL'
====================

This directive emits SIZE bytes, each of value FILL.  Both SIZE and
FILL are absolute expressions.  If the comma and FILL are omitted, FILL
is assumed to be zero.  This is the same as `.skip'.

     _Warning:_ `.space' has a completely different meaning for HPPA
     targets; use `.block' as a substitute.  See `HP9000 Series 800
     Assembly Language Reference Manual' (HP 92432-90001) for the
     meaning of the `.space' directive.  *Note HPPA Assembler
     Directives: HPPA Directives, for a summary.

   On the AMD 29K, this directive is ignored; it is accepted for
compatibility with other AMD 29K assemblers.

     _Warning:_ In most versions of the GNU assembler, the directive
     `.space' has the effect of `.block'  *Note Machine Dependencies::.


File: m68k-rtems-as.info,  Node: Stab,  Next: String,  Prev: Space,  Up: Pseudo Ops

`.stabd, .stabn, .stabs'
========================

There are three directives that begin `.stab'.  All emit symbols (*note
Symbols::), for use by symbolic debuggers.  The symbols are not entered
in the `as' hash table: they cannot be referenced elsewhere in the
source file.  Up to five fields are required:

STRING
     This is the symbol's name.  It may contain any character except
     `\000', so is more general than ordinary symbol names.  Some
     debuggers used to code arbitrarily complex structures into symbol
     names using this field.

TYPE
     An absolute expression.  The symbol's type is set to the low 8
     bits of this expression.  Any bit pattern is permitted, but `ld'
     and debuggers choke on silly bit patterns.

OTHER
     An absolute expression.  The symbol's "other" attribute is set to
     the low 8 bits of this expression.

DESC
     An absolute expression.  The symbol's descriptor is set to the low
     16 bits of this expression.

VALUE
     An absolute expression which becomes the symbol's value.

   If a warning is detected while reading a `.stabd', `.stabn', or
`.stabs' statement, the symbol has probably already been created; you
get a half-formed symbol in your object file.  This is compatible with
earlier assemblers!

`.stabd TYPE , OTHER , DESC'
     The "name" of the symbol generated is not even an empty string.
     It is a null pointer, for compatibility.  Older assemblers used a
     null pointer so they didn't waste space in object files with empty
     strings.

     The symbol's value is set to the location counter, relocatably.
     When your program is linked, the value of this symbol is the
     address of the location counter when the `.stabd' was assembled.

`.stabn TYPE , OTHER , DESC , VALUE'
     The name of the symbol is set to the empty string `""'.

`.stabs STRING ,  TYPE , OTHER , DESC , VALUE'
     All five fields are specified.


File: m68k-rtems-as.info,  Node: String,  Next: Struct,  Prev: Stab,  Up: Pseudo Ops

`.string' "STR"
===============

Copy the characters in STR to the object file.  You may specify more
than one string to copy, separated by commas.  Unless otherwise
specified for a particular machine, the assembler marks the end of each
string with a 0 byte.  You can use any of the escape sequences
described in *Note Strings: Strings.


File: m68k-rtems-as.info,  Node: Struct,  Next: SubSection,  Prev: String,  Up: Pseudo Ops

`.struct EXPRESSION'
====================

Switch to the absolute section, and set the section offset to
EXPRESSION, which must be an absolute expression.  You might use this
as follows:
             .struct 0
     field1:
             .struct field1 + 4
     field2:
             .struct field2 + 4
     field3:
   This would define the symbol `field1' to have the value 0, the symbol
`field2' to have the value 4, and the symbol `field3' to have the value
8.  Assembly would be left in the absolute section, and you would need
to use a `.section' directive of some sort to change to some other
section before further assembly.


File: m68k-rtems-as.info,  Node: SubSection,  Next: Symver,  Prev: Struct,  Up: Pseudo Ops

`.subsection NAME'
==================

This is one of the ELF section stack manipulation directives.  The
others are `.section' (*note Section::), `.pushsection' (*note
PushSection::), `.popsection' (*note PopSection::), and `.previous'
(*note Previous::).

   This directive replaces the current subsection with `name'.  The
current section is not changed.  The replaced subsection is put onto
the section stack in place of the then current top of stack subsection.


File: m68k-rtems-as.info,  Node: Symver,  Next: Tag,  Prev: SubSection,  Up: Pseudo Ops

`.symver'
=========

Use the `.symver' directive to bind symbols to specific version nodes
within a source file.  This is only supported on ELF platforms, and is
typically used when assembling files to be linked into a shared library.
There are cases where it may make sense to use this in objects to be
bound into an application itself so as to override a versioned symbol
from a shared library.

   For ELF targets, the `.symver' directive can be used like this:
     .symver NAME, NAME2@NODENAME
   If the symbol NAME is defined within the file being assembled, the
`.symver' directive effectively creates a symbol alias with the name
NAME2@NODENAME, and in fact the main reason that we just don't try and
create a regular alias is that the @ character isn't permitted in
symbol names.  The NAME2 part of the name is the actual name of the
symbol by which it will be externally referenced.  The name NAME itself
is merely a name of convenience that is used so that it is possible to
have definitions for multiple versions of a function within a single
source file, and so that the compiler can unambiguously know which
version of a function is being mentioned.  The NODENAME portion of the
alias should be the name of a node specified in the version script
supplied to the linker when building a shared library.  If you are
attempting to override a versioned symbol from a shared library, then
NODENAME should correspond to the nodename of the symbol you are trying
to override.

   If the symbol NAME is not defined within the file being assembled,
all references to NAME will be changed to NAME2@NODENAME.  If no
reference to NAME is made, NAME2@NODENAME will be removed from the
symbol table.

   Another usage of the `.symver' directive is:
     .symver NAME, NAME2@@NODENAME
   In this case, the symbol NAME must exist and be defined within the
file being assembled. It is similar to NAME2@NODENAME. The difference
is NAME2@@NODENAME will also be used to resolve references to NAME2 by
the linker.

   The third usage of the `.symver' directive is:
     .symver NAME, NAME2@@@NODENAME
   When NAME is not defined within the file being assembled, it is
treated as NAME2@NODENAME. When NAME is defined within the file being
assembled, the symbol name, NAME, will be changed to NAME2@@NODENAME.


File: m68k-rtems-as.info,  Node: Tag,  Next: Text,  Prev: Symver,  Up: Pseudo Ops

`.tag STRUCTNAME'
=================

This directive is generated by compilers to include auxiliary debugging
information in the symbol table.  It is only permitted inside
`.def'/`.endef' pairs.  Tags are used to link structure definitions in
the symbol table with instances of those structures.

   `.tag' is only used when generating COFF format output; when `as' is
generating `b.out', it accepts this directive but ignores it.


File: m68k-rtems-as.info,  Node: Text,  Next: Title,  Prev: Tag,  Up: Pseudo Ops

`.text SUBSECTION'
==================

Tells `as' to assemble the following statements onto the end of the
text subsection numbered SUBSECTION, which is an absolute expression.
If SUBSECTION is omitted, subsection number zero is used.


File: m68k-rtems-as.info,  Node: Title,  Next: Type,  Prev: Text,  Up: Pseudo Ops

`.title "HEADING"'
==================

Use HEADING as the title (second line, immediately after the source
file name and pagenumber) when generating assembly listings.

   This directive affects subsequent pages, as well as the current page
if it appears within ten lines of the top of a page.


File: m68k-rtems-as.info,  Node: Type,  Next: Uleb128,  Prev: Title,  Up: Pseudo Ops

`.type INT' (COFF version)
==========================

This directive, permitted only within `.def'/`.endef' pairs, records
the integer INT as the type attribute of a symbol table entry.

   `.type' is associated only with COFF format output; when `as' is
configured for `b.out' output, it accepts this directive but ignores it.

`.type NAME , TYPE DESCRIPTION' (ELF version)
=============================================

This directive is used to set the type of symbol NAME to be either a
function symbol or an object symbol.  There are five different syntaxes
supported for the TYPE DESCRIPTION field, in order to provide
compatibility with various other assemblers.  The syntaxes supported
are:

       .type <name>,#function
       .type <name>,#object
     
       .type <name>,@function
       .type <name>,@object
     
       .type <name>,%function
       .type <name>,%object
     
       .type <name>,"function"
       .type <name>,"object"
     
       .type <name> STT_FUNCTION
       .type <name> STT_OBJECT


File: m68k-rtems-as.info,  Node: Uleb128,  Next: Val,  Prev: Type,  Up: Pseudo Ops

`.uleb128 EXPRESSIONS'
======================

ULEB128 stands for "unsigned little endian base 128."  This is a
compact, variable length representation of numbers used by the DWARF
symbolic debugging format.  *Note `.sleb128': Sleb128.


File: m68k-rtems-as.info,  Node: Val,  Next: Version,  Prev: Uleb128,  Up: Pseudo Ops

`.val ADDR'
===========

This directive, permitted only within `.def'/`.endef' pairs, records
the address ADDR as the value attribute of a symbol table entry.

   `.val' is used only for COFF output; when `as' is configured for
`b.out', it accepts this directive but ignores it.


File: m68k-rtems-as.info,  Node: Version,  Next: VTableEntry,  Prev: Val,  Up: Pseudo Ops

`.version "STRING"'
===================

This directive creates a `.note' section and places into it an ELF
formatted note of type NT_VERSION.  The note's name is set to `string'.


File: m68k-rtems-as.info,  Node: VTableEntry,  Next: VTableInherit,  Prev: Version,  Up: Pseudo Ops

`.vtable_entry TABLE, OFFSET'
=============================

This directive finds or creates a symbol `table' and creates a
`VTABLE_ENTRY' relocation for it with an addend of `offset'.


File: m68k-rtems-as.info,  Node: VTableInherit,  Next: Weak,  Prev: VTableEntry,  Up: Pseudo Ops

`.vtable_inherit CHILD, PARENT'
===============================

This directive finds the symbol `child' and finds or creates the symbol
`parent' and then creates a `VTABLE_INHERIT' relocation for the parent
whose addend is the value of the child symbol.  As a special case the
parent name of `0' is treated as refering the `*ABS*' section.


File: m68k-rtems-as.info,  Node: Weak,  Next: Word,  Prev: VTableInherit,  Up: Pseudo Ops

`.weak NAMES'
=============

This directive sets the weak attribute on the comma separated list of
symbol `names'.  If the symbols do not already exist, they will be
created.


File: m68k-rtems-as.info,  Node: Word,  Next: Deprecated,  Prev: Weak,  Up: Pseudo Ops

`.word EXPRESSIONS'
===================

This directive expects zero or more EXPRESSIONS, of any section,
separated by commas.

   The size of the number emitted, and its byte order, depend on what
target computer the assembly is for.

     _Warning: Special Treatment to support Compilers_

   Machines with a 32-bit address space, but that do less than 32-bit
addressing, require the following special treatment.  If the machine of
interest to you does 32-bit addressing (or doesn't require it; *note
Machine Dependencies::), you can ignore this issue.

   In order to assemble compiler output into something that works, `as'
occasionally does strange things to `.word' directives.  Directives of
the form `.word sym1-sym2' are often emitted by compilers as part of
jump tables.  Therefore, when `as' assembles a directive of the form
`.word sym1-sym2', and the difference between `sym1' and `sym2' does
not fit in 16 bits, `as' creates a "secondary jump table", immediately
before the next label.  This secondary jump table is preceded by a
short-jump to the first byte after the secondary table.  This
short-jump prevents the flow of control from accidentally falling into
the new table.  Inside the table is a long-jump to `sym2'.  The
original `.word' contains `sym1' minus the address of the long-jump to
`sym2'.

   If there were several occurrences of `.word sym1-sym2' before the
secondary jump table, all of them are adjusted.  If there was a `.word
sym3-sym4', that also did not fit in sixteen bits, a long-jump to
`sym4' is included in the secondary jump table, and the `.word'
directives are adjusted to contain `sym3' minus the address of the
long-jump to `sym4'; and so on, for as many entries in the original
jump table as necessary.


File: m68k-rtems-as.info,  Node: Deprecated,  Prev: Word,  Up: Pseudo Ops

Deprecated Directives
=====================

One day these directives won't work.  They are included for
compatibility with older assemblers.
.abort

.line


File: m68k-rtems-as.info,  Node: Machine Dependencies,  Next: Reporting Bugs,  Prev: Pseudo Ops,  Up: Top

Machine Dependent Features
**************************

The machine instruction sets are (almost by definition) different on
each machine where `as' runs.  Floating point representations vary as
well, and `as' often supports a few additional directives or
command-line options for compatibility with other assemblers on a
particular platform.  Finally, some versions of `as' support special
pseudo-instructions for branch optimization.

   This chapter discusses most of these differences, though it does not
include details on any machine's instruction set.  For details on that
subject, see the hardware manufacturer's manual.

* Menu:


* AMD29K-Dependent::            AMD 29K Dependent Features

* Alpha-Dependent::		Alpha Dependent Features

* ARC-Dependent::               ARC Dependent Features

* ARM-Dependent::               ARM Dependent Features

* CRIS-Dependent::              CRIS Dependent Features

* D10V-Dependent::              D10V Dependent Features

* D30V-Dependent::              D30V Dependent Features

* H8/300-Dependent::            Hitachi H8/300 Dependent Features

* H8/500-Dependent::            Hitachi H8/500 Dependent Features

* HPPA-Dependent::              HPPA Dependent Features

* ESA/390-Dependent::           IBM ESA/390 Dependent Features

* i386-Dependent::              Intel 80386 and AMD x86-64 Dependent Features

* i860-Dependent::              Intel 80860 Dependent Features

* i960-Dependent::              Intel 80960 Dependent Features

* M32R-Dependent::              M32R Dependent Features

* M68K-Dependent::              M680x0 Dependent Features

* M68HC11-Dependent::           M68HC11 and 68HC12 Dependent Features

* M88K-Dependent::		M880x0 Dependent Features

* MIPS-Dependent::              MIPS Dependent Features

* MMIX-Dependent::              MMIX Dependent Features

* SH-Dependent::                Hitachi SH Dependent Features
* SH64-Dependent::              Hitachi SH64 Dependent Features

* PDP-11-Dependent::            PDP-11 Dependent Features

* PJ-Dependent::                picoJava Dependent Features

* PPC-Dependent::               PowerPC Dependent Features

* Sparc-Dependent::             SPARC Dependent Features

* V850-Dependent::              V850 Dependent Features

* Z8000-Dependent::             Z8000 Dependent Features

* Vax-Dependent::               VAX Dependent Features


File: m68k-rtems-as.info,  Node: AMD29K-Dependent,  Next: Alpha-Dependent,  Up: Machine Dependencies

AMD 29K Dependent Features
==========================

* Menu:

* AMD29K Options::              Options
* AMD29K Syntax::               Syntax
* AMD29K Floating Point::       Floating Point
* AMD29K Directives::           AMD 29K Machine Directives
* AMD29K Opcodes::              Opcodes


File: m68k-rtems-as.info,  Node: AMD29K Options,  Next: AMD29K Syntax,  Up: AMD29K-Dependent

Options
-------

`as' has no additional command-line options for the AMD 29K family.


File: m68k-rtems-as.info,  Node: AMD29K Syntax,  Next: AMD29K Floating Point,  Prev: AMD29K Options,  Up: AMD29K-Dependent

Syntax
------

* Menu:

* AMD29K-Macros::		Macros
* AMD29K-Chars::                Special Characters
* AMD29K-Regs::                 Register Names


File: m68k-rtems-as.info,  Node: AMD29K-Macros,  Next: AMD29K-Chars,  Up: AMD29K Syntax

Macros
......

The macro syntax used on the AMD 29K is like that described in the AMD
29K Family Macro Assembler Specification.  Normal `as' macros should
still work.


File: m68k-rtems-as.info,  Node: AMD29K-Chars,  Next: AMD29K-Regs,  Prev: AMD29K-Macros,  Up: AMD29K Syntax

Special Characters
..................

`;' is the line comment character.

   The character `?' is permitted in identifiers (but may not begin an
identifier).


File: m68k-rtems-as.info,  Node: AMD29K-Regs,  Prev: AMD29K-Chars,  Up: AMD29K Syntax

Register Names
..............

General-purpose registers are represented by predefined symbols of the
form `GRNNN' (for global registers) or `LRNNN' (for local registers),
where NNN represents a number between `0' and `127', written with no
leading zeros.  The leading letters may be in either upper or lower
case; for example, `gr13' and `LR7' are both valid register names.

   You may also refer to general-purpose registers by specifying the
register number as the result of an expression (prefixed with `%%' to
flag the expression as a register number):
     %%EXPRESSION

--where EXPRESSION must be an absolute expression evaluating to a
number between `0' and `255'.  The range [0, 127] refers to global
registers, and the range [128, 255] to local registers.

   In addition, `as' understands the following protected
special-purpose register names for the AMD 29K family:

       vab    chd    pc0
       ops    chc    pc1
       cps    rbp    pc2
       cfg    tmc    mmu
       cha    tmr    lru

   These unprotected special-purpose register names are also recognized:
       ipc    alu    fpe
       ipa    bp     inte
       ipb    fc     fps
       q      cr     exop


File: m68k-rtems-as.info,  Node: AMD29K Floating Point,  Next: AMD29K Directives,  Prev: AMD29K Syntax,  Up: AMD29K-Dependent

Floating Point
--------------

The AMD 29K family uses IEEE floating-point numbers.


File: m68k-rtems-as.info,  Node: AMD29K Directives,  Next: AMD29K Opcodes,  Prev: AMD29K Floating Point,  Up: AMD29K-Dependent

AMD 29K Machine Directives
--------------------------

`.block SIZE , FILL'
     This directive emits SIZE bytes, each of value FILL.  Both SIZE
     and FILL are absolute expressions.  If the comma and FILL are
     omitted, FILL is assumed to be zero.

     In other versions of the GNU assembler, this directive is called
     `.space'.

`.cputype'
     This directive is ignored; it is accepted for compatibility with
     other AMD 29K assemblers.

`.file'
     This directive is ignored; it is accepted for compatibility with
     other AMD 29K assemblers.

          _Warning:_ in other versions of the GNU assembler, `.file' is
          used for the directive called `.app-file' in the AMD 29K
          support.

`.line'
     This directive is ignored; it is accepted for compatibility with
     other AMD 29K assemblers.

`.sect'
     This directive is ignored; it is accepted for compatibility with
     other AMD 29K assemblers.

`.use SECTION NAME'
     Establishes the section and subsection for the following code;
     SECTION NAME may be one of `.text', `.data', `.data1', or `.lit'.
     With one of the first three SECTION NAME options, `.use' is
     equivalent to the machine directive SECTION NAME; the remaining
     case, `.use .lit', is the same as `.data 200'.


File: m68k-rtems-as.info,  Node: AMD29K Opcodes,  Prev: AMD29K Directives,  Up: AMD29K-Dependent

Opcodes
-------

`as' implements all the standard AMD 29K opcodes.  No additional
pseudo-instructions are needed on this family.

   For information on the 29K machine instruction set, see `Am29000
User's Manual', Advanced Micro Devices, Inc.


File: m68k-rtems-as.info,  Node: Alpha-Dependent,  Next: ARC-Dependent,  Prev: AMD29K-Dependent,  Up: Machine Dependencies

Alpha Dependent Features
========================

* Menu:

* Alpha Notes::                Notes
* Alpha Options::              Options
* Alpha Syntax::               Syntax
* Alpha Floating Point::       Floating Point
* Alpha Directives::           Alpha Machine Directives
* Alpha Opcodes::              Opcodes


File: m68k-rtems-as.info,  Node: Alpha Notes,  Next: Alpha Options,  Up: Alpha-Dependent

Notes
-----

The documentation here is primarily for the ELF object format.  `as'
also supports the ECOFF and EVAX formats, but features specific to
these formats are not yet documented.


File: m68k-rtems-as.info,  Node: Alpha Options,  Next: Alpha Syntax,  Prev: Alpha Notes,  Up: Alpha-Dependent

Options
-------

`-mCPU'
     This option specifies the target processor.  If an attempt is made
     to assemble an instruction which will not execute on the target
     processor, the assembler may either expand the instruction as a
     macro or issue an error message.  This option is equivalent to the
     `.arch' directive.

     The following processor names are recognized: `21064', `21064a',
     `21066', `21068', `21164', `21164a', `21164pc', `21264', `21264a',
     `21264b', `ev4', `ev5', `lca45', `ev5', `ev56', `pca56', `ev6',
     `ev67', `ev68'.  The special name `all' may be used to allow the
     assembler to accept instructions valid for any Alpha processor.

     In order to support existing practice in OSF/1 with respect to
     `.arch', and existing practice within `MILO' (the Linux ARC
     bootloader), the numbered processor names (e.g. 21064) enable the
     processor-specific PALcode instructions, while the
     "electro-vlasic" names (e.g. `ev4') do not.

`-mdebug'
`-no-mdebug'
     Enables or disables the generation of `.mdebug' encapsulation for
     stabs directives and procedure descriptors.  The default is to
     automatically enable `.mdebug' when the first stabs directive is
     seen.

`-relax'
     This option forces all relocations to be put into the object file,
     instead of saving space and resolving some relocations at assembly
     time.  Note that this option does not propagate all symbol
     arithmetic into the object file, because not all symbol arithmetic
     can be represented.  However, the option can still be useful in
     specific applications.

`-g'
     This option is used when the compiler generates debug information.
     When `gcc' is using `mips-tfile' to generate debug information
     for ECOFF, local labels must be passed through to the object file.
     Otherwise this option has no effect.

`-GSIZE'
     A local common symbol larger than SIZE is placed in `.bss', while
     smaller symbols are placed in `.sbss'.

`-F'
`-32addr'
     These options are ignored for backward compatibility.


File: m68k-rtems-as.info,  Node: Alpha Syntax,  Next: Alpha Floating Point,  Prev: Alpha Options,  Up: Alpha-Dependent

Syntax
------

The assembler syntax closely follow the Alpha Reference Manual;
assembler directives and general syntax closely follow the OSF/1 and
OpenVMS syntax, with a few differences for ELF.

* Menu:

* Alpha-Chars::                Special Characters
* Alpha-Regs::                 Register Names
* Alpha-Relocs::               Relocations


File: m68k-rtems-as.info,  Node: Alpha-Chars,  Next: Alpha-Regs,  Up: Alpha Syntax

Special Characters
..................

`#' is the line comment character.

   `;' can be used instead of a newline to separate statements.


File: m68k-rtems-as.info,  Node: Alpha-Regs,  Next: Alpha-Relocs,  Prev: Alpha-Chars,  Up: Alpha Syntax

Register Names
..............

The 32 integer registers are refered to as `$N' or `$rN'.  In addition,
registers 15, 28, 29, and 30 may be refered to by the symbols `$fp',
`$at', `$gp', and `$sp' respectively.

   The 32 floating-point registers are refered to as `$fN'.


File: m68k-rtems-as.info,  Node: Alpha-Relocs,  Prev: Alpha-Regs,  Up: Alpha Syntax

Relocations
...........

Some of these relocations are available for ECOFF, but mostly only for
ELF.  They are modeled after the relocation format introduced in Digial
Unix 4.0, but there are additions.

   The format is `!TAG' or `!TAG!NUMBER' where TAG is the name of the
relocation.  In some cases NUMBER is used to relate specific
instructions.

   The relocation is placed at the end of the instruction like so:

     ldah  $0,a($29)    !gprelhigh
     lda   $0,a($0)     !gprellow
     ldq   $1,b($29)    !literal!100
     ldl   $2,0($1)     !lituse_base!100

`!literal'
`!literal!N'
     Used with an `ldq' instruction to load the address of a symbol
     from the GOT.

     A sequence number N is optional, and if present is used to pair
     `lituse' relocations with this `literal' relocation.  The `lituse'
     relocations are used by the linker to optimize the code based on
     the final location of the symbol.

     Note that these optimizations are dependent on the data flow of the
     program.  Therefore, if _any_ `lituse' is paired with a `literal'
     relocation, then _all_ uses of the register set by the `literal'
     instruction must also be marked with `lituse' relocations.  This
     is because the original `literal' instruction may be deleted or
     transformed into another instruction.

     Also note that there may be a one-to-many relationship between
     `literal' and `lituse', but not a many-to-one.  That is, if there
     are two code paths that load up the same address and feed the
     value to a single use, then the use may not use a `lituse'
     relocation.

`!lituse_base!N'
     Used with any memory format instruction (e.g. `ldl') to indicate
     that the literal is used for an address load.  The offset field of
     the instruction must be zero.  During relaxation, the code may be
     altered to use a gp-relative load.

`!lituse_jsr!N'
     Used with a register branch format instruction (e.g. `jsr') to
     indicate that the literal is used for a call.  During relaxation,
     the code may be altered to use a direct branch (e.g. `bsr').

`!lituse_bytoff!N'
     Used with a byte mask instruction (e.g. `extbl') to indicate that
     only the low 3 bits of the address are relevant.  During
     relaxation, the code may be altered to use an immediate instead of
     a register shift.

`!lituse_addr!N'
     Used with any other instruction to indicate that the original
     address is in fact used, and the original `ldq' instruction may
     not be altered or deleted.  This is useful in conjunction with
     `lituse_jsr' to test whether a weak symbol is defined.

          ldq  $27,foo($29)   !literal!1
          beq  $27,is_undef   !lituse_addr!1
          jsr  $26,($27),foo  !lituse_jsr!1

`!lituse_tlsgd!N'
     Used with a register branch format instruction to indicate that the
     literal is the call to `__tls_get_addr' used to compute the
     address of the thread-local storage variable whose descriptor was
     loaded with `!tlsgd!N'.

`!lituse_tlsldm!N'
     Used with a register branch format instruction to indicate that the
     literal is the call to `__tls_get_addr' used to compute the
     address of the base of the thread-local storage block for the
     current module.  The descriptor for the module must have been
     loaded with `!tlsldm!N'.

`!gpdisp!N'
     Used with `ldah' and `lda' to load the GP from the current
     address, a-la the `ldgp' macro.  The source register for the
     `ldah' instruction must contain the address of the `ldah'
     instruction.  There must be exactly one `lda' instruction paired
     with the `ldah' instruction, though it may appear anywhere in the
     instruction stream.  The immediate operands must be zero.

          bsr  $26,foo
          ldah $29,0($26)     !gpdisp!1
          lda  $29,0($29)     !gpdisp!1

`!gprelhigh'
     Used with an `ldah' instruction to add the high 16 bits of a
     32-bit displacement from the GP.

`!gprellow'
     Used with any memory format instruction to add the low 16 bits of a
     32-bit displacement from the GP.

`!gprel'
     Used with any memory format instruction to add a 16-bit
     displacement from the GP.

`!samegp'
     Used with any branch format instruction to skip the GP load at the
     target address.  The referenced symbol must have the same GP as the
     source object file, and it must be declared to either not use `$27'
     or perform a standard GP load in the first two instructions via the
     `.prologue' directive.

`!tlsgd'
`!tlsgd!N'
     Used with an `lda' instruction to load the address of a TLS
     descriptor for a symbol in the GOT.

     The sequence number N is optional, and if present it used to pair
     the descriptor load with both the `literal' loading the address of
     the `__tls_get_addr' function and the `lituse_tlsgd' marking the
     call to that function.

     For proper relaxation, both the `tlsgd', `literal' and `lituse'
     relocations must be in the same extended basic block.  That is,
     the relocation with the lowest address must be executed first at
     runtime.

`!tlsldm'
`!tlsldm!N'
     Used with an `lda' instruction to load the address of a TLS
     descriptor for the current module in the GOT.

     Similar in other respects to `tlsgd'.

`!gotdtprel'
     Used with an `ldq' instruction to load the offset of the TLS
     symbol within its module's thread-local storage block.  Also known
     as the dynamic thread pointer offset or dtp-relative offset.

`!dtprelhi'
`!dtprello'
`!dtprel'
     Like `gprel' relocations except they compute dtp-relative offsets.

`!gottprel'
     Used with an `ldq' instruction to load the offset of the TLS
     symbol from the thread pointer.  Also known as the tp-relative
     offset.

`!tprelhi'
`!tprello'
`!tprel'
     Like `gprel' relocations except they compute tp-relative offsets.


File: m68k-rtems-as.info,  Node: Alpha Floating Point,  Next: Alpha Directives,  Prev: Alpha Syntax,  Up: Alpha-Dependent

Floating Point
--------------

The Alpha family uses both IEEE and VAX floating-point numbers.


File: m68k-rtems-as.info,  Node: Alpha Directives,  Next: Alpha Opcodes,  Prev: Alpha Floating Point,  Up: Alpha-Dependent

Alpha Assembler Directives
--------------------------

`as' for the Alpha supports many additional directives for
compatibility with the native assembler.  This section describes them
only briefly.

   These are the additional directives in `as' for the Alpha:

`.arch CPU'
     Specifies the target processor.  This is equivalent to the `-mCPU'
     command-line option.  *Note Options: Alpha Options, for a list of
     values for CPU.

`.ent FUNCTION[, N]'
     Mark the beginning of FUNCTION.  An optional number may follow for
     compatibility with the OSF/1 assembler, but is ignored.  When
     generating `.mdebug' information, this will create a procedure
     descriptor for the function.  In ELF, it will mark the symbol as a
     function a-la the generic `.type' directive.

`.end FUNCTION'
     Mark the end of FUNCTION.  In ELF, it will set the size of the
     symbol a-la the generic `.size' directive.

`.mask MASK, OFFSET'
     Indicate which of the integer registers are saved in the current
     function's stack frame.  MASK is interpreted a bit mask in which
     bit N set indicates that register N is saved.  The registers are
     saved in a block located OFFSET bytes from the "canonical frame
     address" (CFA) which is the value of the stack pointer on entry to
     the function.  The registers are saved sequentially, except that
     the return address register (normally `$26') is saved first.

     This and the other directives that describe the stack frame are
     currently only used when generating `.mdebug' information.  They
     may in the future be used to generate DWARF2 `.debug_frame' unwind
     information for hand written assembly.

`.fmask MASK, OFFSET'
     Indicate which of the floating-point registers are saved in the
     current stack frame.  The MASK and OFFSET parameters are
     interpreted as with `.mask'.

`.frame FRAMEREG, FRAMEOFFSET, RETREG[, ARGOFFSET]'
     Describes the shape of the stack frame.  The frame pointer in use
     is FRAMEREG; normally this is either `$fp' or `$sp'.  The frame
     pointer is FRAMEOFFSET bytes below the CFA.  The return address is
     initially located in RETREG until it is saved as indicated in
     `.mask'.  For compatibility with OSF/1 an optional ARGOFFSET
     parameter is accepted and ignored.  It is believed to indicate the
     offset from the CFA to the saved argument registers.

`.prologue N'
     Indicate that the stack frame is set up and all registers have been
     spilled.  The argument N indicates whether and how the function
     uses the incoming "procedure vector" (the address of the called
     function) in `$27'.  0 indicates that `$27' is not used; 1
     indicates that the first two instructions of the function use `$27'
     to perform a load of the GP register; 2 indicates that `$27' is
     used in some non-standard way and so the linker cannot elide the
     load of the procedure vector during relaxation.

`.gprel32 EXPRESSION'
     Computes the difference between the address in EXPRESSION and the
     GP for the current object file, and stores it in 4 bytes.  In
     addition to being smaller than a full 8 byte address, this also
     does not require a dynamic relocation when used in a shared
     library.

`.t_floating EXPRESSION'
     Stores EXPRESSION as an IEEE double precision value.

`.s_floating EXPRESSION'
     Stores EXPRESSION as an IEEE single precision value.

`.f_floating EXPRESSION'
     Stores EXPRESSION as a VAX F format value.

`.g_floating EXPRESSION'
     Stores EXPRESSION as a VAX G format value.

`.d_floating EXPRESSION'
     Stores EXPRESSION as a VAX D format value.

`.set FEATURE'
     Enables or disables various assembler features.  Using the positive
     name of the feature enables while using `noFEATURE' disables.

    `at'
          Indicates that macro expansions may clobber the "assembler
          temporary" (`$at' or `$28') register.  Some macros may not be
          expanded without this and will generate an error message if
          `noat' is in effect.  When `at' is in effect, a warning will
          be generated if `$at' is used by the programmer.

    `macro'
          Enables the expasion of macro instructions.  Note that
          variants of real instructions, such as `br label' vs `br
          $31,label' are considered alternate forms and not macros.

    `move'
    `reorder'
    `volatile'
          These control whether and how the assembler may re-order
          instructions.  Accepted for compatibility with the OSF/1
          assembler, but `as' does not do instruction scheduling, so
          these features are ignored.

   The following directives are recognized for compatibility with the
OSF/1 assembler but are ignored.

     .proc           .aproc
     .reguse         .livereg
     .option         .aent
     .ugen           .eflag
     .alias          .noalias


File: m68k-rtems-as.info,  Node: Alpha Opcodes,  Prev: Alpha Directives,  Up: Alpha-Dependent

Opcodes
-------

For detailed information on the Alpha machine instruction set, see the
Alpha Architecture Handbook
(ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf).


File: m68k-rtems-as.info,  Node: ARC-Dependent,  Next: ARM-Dependent,  Prev: Alpha-Dependent,  Up: Machine Dependencies

ARC Dependent Features
======================

* Menu:

* ARC Options::              Options
* ARC Syntax::               Syntax
* ARC Floating Point::       Floating Point
* ARC Directives::           ARC Machine Directives
* ARC Opcodes::              Opcodes


File: m68k-rtems-as.info,  Node: ARC Options,  Next: ARC Syntax,  Up: ARC-Dependent

Options
-------

`-marc[5|6|7|8]'
     This option selects the core processor variant. Using `-marc' is
     the same as `-marc6', which is also the default.

    `arc5'
          Base instruction set.

    `arc6'
          Jump-and-link (jl) instruction. No requirement of an
          instruction between setting flags and conditional jump. For
          example:

                 mov.f r0,r1
                 beq   foo

    `arc7'
          Break (brk) and sleep (sleep) instructions.

    `arc8'
          Software interrupt (swi) instruction.


     Note: the `.option' directive can to be used to select a core
     variant from within assembly code.

`-EB'
     This option specifies that the output generated by the assembler
     should be marked as being encoded for a big-endian processor.

`-EL'
     This option specifies that the output generated by the assembler
     should be marked as being encoded for a little-endian processor -
     this is the default.



File: m68k-rtems-as.info,  Node: ARC Syntax,  Next: ARC Floating Point,  Prev: ARC Options,  Up: ARC-Dependent

Syntax
------

* Menu:

* ARC-Chars::                Special Characters
* ARC-Regs::                 Register Names


File: m68k-rtems-as.info,  Node: ARC-Chars,  Next: ARC-Regs,  Up: ARC Syntax

Special Characters
..................

*TODO*


File: m68k-rtems-as.info,  Node: ARC-Regs,  Prev: ARC-Chars,  Up: ARC Syntax

Register Names
..............

*TODO*


File: m68k-rtems-as.info,  Node: ARC Floating Point,  Next: ARC Directives,  Prev: ARC Syntax,  Up: ARC-Dependent

Floating Point
--------------

The ARC core does not currently have hardware floating point support.
Software floating point support is provided by `GCC' and uses IEEE
floating-point numbers.


File: m68k-rtems-as.info,  Node: ARC Directives,  Next: ARC Opcodes,  Prev: ARC Floating Point,  Up: ARC-Dependent

ARC Machine Directives
----------------------

The ARC version of `as' supports the following additional machine
directives:

`.2byte EXPRESSIONS'
     *TODO*

`.3byte EXPRESSIONS'
     *TODO*

`.4byte EXPRESSIONS'
     *TODO*

`.extAuxRegister NAME,ADDRESS,MODE'
     *TODO*

            .extAuxRegister mulhi,0x12,w

`.extCondCode SUFFIX,VALUE'
     *TODO*

            .extCondCode is_busy,0x14

`.extCoreRegister NAME,REGNUM,MODE,SHORTCUT'
     *TODO*

            .extCoreRegister mlo,57,r,can_shortcut

`.extInstruction NAME,OPCODE,SUBOPCODE,SUFFIXCLASS,SYNTAXCLASS'
     *TODO*

            .extInstruction mul64,0x14,0x0,SUFFIX_COND,SYNTAX_3OP|OP1_MUST_BE_IMM

`.half EXPRESSIONS'
     *TODO*

`.long EXPRESSIONS'
     *TODO*

`.option ARC|ARC5|ARC6|ARC7|ARC8'
     The `.option' directive must be followed by the desired core
     version. Again `arc' is an alias for `arc6'.

     Note: the `.option' directive overrides the command line option
     `-marc'; a warning is emitted when the version is not consistent
     between the two - even for the implicit default core version
     (arc6).

`.short EXPRESSIONS'
     *TODO*

`.word EXPRESSIONS'
     *TODO*



File: m68k-rtems-as.info,  Node: ARC Opcodes,  Prev: ARC Directives,  Up: ARC-Dependent

Opcodes
-------

For information on the ARC instruction set, see `ARC Programmers
Reference Manual', ARC Cores Ltd.


File: m68k-rtems-as.info,  Node: ARM-Dependent,  Next: CRIS-Dependent,  Prev: ARC-Dependent,  Up: Machine Dependencies

ARM Dependent Features
======================

* Menu:

* ARM Options::              Options
* ARM Syntax::               Syntax
* ARM Floating Point::       Floating Point
* ARM Directives::           ARM Machine Directives
* ARM Opcodes::              Opcodes


File: m68k-rtems-as.info,  Node: ARM Options,  Next: ARM Syntax,  Up: ARM-Dependent

Options
-------

`-mcpu=PROCESSOR[+EXTENSION...]'
     This option specifies the target processor.  The assembler will
     issue an error message if an attempt is made to assemble an
     instruction which will not execute on the target processor.  The
     following processor names are recognized: `arm1', `arm2', `arm250',
     `arm3', `arm6', `arm60', `arm600', `arm610', `arm620', `arm7',
     `arm7m', `arm7d', `arm7dm', `arm7di', `arm7dmi', `arm70', `arm700',
     `arm700i', `arm710', `arm710t', `arm720', `arm720t', `arm740t',
     `arm710c', `arm7100', `arm7500', `arm7500fe', `arm7t', `arm7tdmi',
     `arm8', `arm810', `strongarm', `strongarm1', `strongarm110',
     `strongarm1100', `strongarm1110', `arm9', `arm920', `arm920t',
     `arm922t', `arm940t', `arm9tdmi', `arm9e', `arm946e-r0', `arm946e',
     `arm966e-r0', `arm966e', `arm10t', `arm10e', `arm1020', `arm1020t',
     `arm1020e', `ep9312' (ARM920 with Cirrus Maverick coprocessor),
     `i80200' (Intel XScale processor) and `xscale'.  The special name
     `all' may be used to allow the assembler to accept instructions
     valid for any ARM processor.

     In addition to the basic instruction set, the assembler can be
     told to accept various extension mnemonics that extend the
     processor using the co-processor instruction space.  For example,
     `-mcpu=arm920+maverick' is equivalent to specifying
     `-mcpu=ep9312'.  The following extensions are currently supported:
     `+maverick' and `+xscale'.

`-march=ARCHITECTURE[+EXTENSION...]'
     This option specifies the target architecture.  The assembler will
     issue an error message if an attempt is made to assemble an
     instruction which will not execute on the target architecture.
     The following architecture names are recognized: `armv1', `armv2',
     `armv2a', `armv2s', `armv3', `armv3m', `armv4', `armv4xm',
     `armv4t', `armv4txm', `armv5', `armv5t', `armv5txm', `armv5te',
     `armv5texp' and `xscale'.  If both `-mcpu' and `-march' are
     specified, the assembler will use the setting for `-mcpu'.

     The architecture option can be extended with the same instruction
     set extension options as the `-mcpu' option.

`-mfpu=FLOATING-POINT-FORMAT'
     This option specifies the floating point format to assemble for.
     The assembler will issue an error message if an attempt is made to
     assemble an instruction which will not execute on the target
     floating point unit.  The following format options are recognized:
     `softfpa', `fpe', `fpe2', `fpe3', `fpa', `fpa10', `fpa11',
     `arm7500fe', `softvfp', `softvfp+vfp', `vfp', `vfp10', `vfp10-r0',
     `vfp9', `vfpxd', `arm1020t' and `arm1020e'.

     In addition to determining which instructions are assembled, this
     option also affects the way in which the `.double' assembler
     directive behaves when assembling little-endian code.

     The default is dependent on the processor selected.  For
     Architecture 5 or later, the default is to assembler for VFP
     instructions; for earlier architectures the default is to assemble
     for FPA instructions.

`-mthumb'
     This option specifies that the assembler should start assembling
     Thumb instructions; that is, it should behave as though the file
     starts with a `.code 16' directive.

`-mthumb-interwork'
     This option specifies that the output generated by the assembler
     should be marked as supporting interworking.

`-mapcs `[26|32]''
     This option specifies that the output generated by the assembler
     should be marked as supporting the indicated version of the Arm
     Procedure.  Calling Standard.

`-matpcs'
     This option specifies that the output generated by the assembler
     should be marked as supporting the Arm/Thumb Procedure Calling
     Standard.  If enabled this option will cause the assembler to
     create an empty debugging section in the object file called
     .arm.atpcs.  Debuggers can use this to determine the ABI being
     used by.

`-mapcs-float'
     This indicates the the floating point variant of the APCS should be
     used.  In this variant floating point arguments are passed in FP
     registers rather than integer registers.

`-mapcs-reentrant'
     This indicates that the reentrant variant of the APCS should be
     used.  This variant supports position independent code.

`-EB'
     This option specifies that the output generated by the assembler
     should be marked as being encoded for a big-endian processor.

`-EL'
     This option specifies that the output generated by the assembler
     should be marked as being encoded for a little-endian processor.

`-k'
     This option specifies that the output of the assembler should be
     marked as position-independent code (PIC).

`-moabi'
     This indicates that the code should be assembled using the old ARM
     ELF conventions, based on a beta release release of the ARM-ELF
     specifications, rather than the default conventions which are
     based on the final release of the ARM-ELF specifications.



File: m68k-rtems-as.info,  Node: ARM Syntax,  Next: ARM Floating Point,  Prev: ARM Options,  Up: ARM-Dependent

Syntax
------

* Menu:

* ARM-Chars::                Special Characters
* ARM-Regs::                 Register Names


File: m68k-rtems-as.info,  Node: ARM-Chars,  Next: ARM-Regs,  Up: ARM Syntax

Special Characters
..................

The presence of a `@' on a line indicates the start of a comment that
extends to the end of the current line.  If a `#' appears as the first
character of a line, the whole line is treated as a comment.

   The `;' character can be used instead of a newline to separate
statements.

   Either `#' or `$' can be used to indicate immediate operands.

   *TODO* Explain about /data modifier on symbols.


File: m68k-rtems-as.info,  Node: ARM-Regs,  Prev: ARM-Chars,  Up: ARM Syntax

Register Names
..............

*TODO* Explain about ARM register naming, and the predefined names.


File: m68k-rtems-as.info,  Node: ARM Floating Point,  Next: ARM Directives,  Prev: ARM Syntax,  Up: ARM-Dependent

Floating Point
--------------

The ARM family uses IEEE floating-point numbers.


File: m68k-rtems-as.info,  Node: ARM Directives,  Next: ARM Opcodes,  Prev: ARM Floating Point,  Up: ARM-Dependent

ARM Machine Directives
----------------------

`.align EXPRESSION [, EXPRESSION]'
     This is the generic .ALIGN directive.  For the ARM however if the
     first argument is zero (ie no alignment is needed) the assembler
     will behave as if the argument had been 2 (ie pad to the next four
     byte boundary).  This is for compatability with ARM's own
     assembler.

`NAME .req REGISTER NAME'
     This creates an alias for REGISTER NAME called NAME.  For example:

                  foo .req r0

`.code `[16|32]''
     This directive selects the instruction set being generated. The
     value 16 selects Thumb, with the value 32 selecting ARM.

`.thumb'
     This performs the same action as .CODE 16.

`.arm'
     This performs the same action as .CODE 32.

`.force_thumb'
     This directive forces the selection of Thumb instructions, even if
     the target processor does not support those instructions

`.thumb_func'
     This directive specifies that the following symbol is the name of a
     Thumb encoded function.  This information is necessary in order to
     allow the assembler and linker to generate correct code for
     interworking between Arm and Thumb instructions and should be used
     even if interworking is not going to be performed.  The presence
     of this directive also implies `.thumb'

`.thumb_set'
     This performs the equivalent of a `.set' directive in that it
     creates a symbol which is an alias for another symbol (possibly
     not yet defined).  This directive also has the added property in
     that it marks the aliased symbol as being a thumb function entry
     point, in the same way that the `.thumb_func' directive does.

`.ltorg'
     This directive causes the current contents of the literal pool to
     be dumped into the current section (which is assumed to be the
     .text section) at the current location (aligned to a word
     boundary).

`.pool'
     This is a synonym for .ltorg.



File: m68k-rtems-as.info,  Node: ARM Opcodes,  Prev: ARM Directives,  Up: ARM-Dependent

Opcodes
-------

`as' implements all the standard ARM opcodes.  It also implements
several pseudo opcodes, including several synthetic load instructions.

`NOP'
            nop

     This pseudo op will always evaluate to a legal ARM instruction
     that does nothing.  Currently it will evaluate to MOV r0, r0.

`LDR'
            ldr <register> , = <expression>

     If expression evaluates to a numeric constant then a MOV or MVN
     instruction will be used in place of the LDR instruction, if the
     constant can be generated by either of these instructions.
     Otherwise the constant will be placed into the nearest literal
     pool (if it not already there) and a PC relative LDR instruction
     will be generated.

`ADR'
            adr <register> <label>

     This instruction will load the address of LABEL into the indicated
     register.  The instruction will evaluate to a PC relative ADD or
     SUB instruction depending upon where the label is located.  If the
     label is out of range, or if it is not defined in the same file
     (and section) as the ADR instruction, then an error will be
     generated.  This instruction will not make use of the literal pool.

`ADRL'
            adrl <register> <label>

     This instruction will load the address of LABEL into the indicated
     register.  The instruction will evaluate to one or two PC relative
     ADD or SUB instructions depending upon where the label is located.
     If a second instruction is not needed a NOP instruction will be
     generated in its place, so that this instruction is always 8 bytes
     long.

     If the label is out of range, or if it is not defined in the same
     file (and section) as the ADRL instruction, then an error will be
     generated.  This instruction will not make use of the literal pool.


   For information on the ARM or Thumb instruction sets, see `ARM
Software Development Toolkit Reference Manual', Advanced RISC Machines
Ltd.


File: m68k-rtems-as.info,  Node: CRIS-Dependent,  Next: D10V-Dependent,  Prev: ARM-Dependent,  Up: Machine Dependencies

CRIS Dependent Features
=======================

* Menu:

* CRIS-Opts::              Command-line Options
* CRIS-Expand::            Instruction expansion
* CRIS-Syntax::            Syntax


File: m68k-rtems-as.info,  Node: CRIS-Opts,  Next: CRIS-Expand,  Up: CRIS-Dependent

Command-line Options
--------------------

The CRIS version of `as' has these machine-dependent command-line
options.

   The format of the generated object files can be either ELF or a.out,
specified by the command-line options `--emulation=crisaout' and
`--emulation=criself'.  The default is ELF (criself), unless `as' has
been configured specifically for a.out by using the configuration name
`cris-axis-aout'.

   There are two different link-incompatible ELF object file variants
for CRIS, for use in environments where symbols are expected to be
prefixed by a leading `_' character and for environments without such a
symbol prefix.  The variant used for GNU/Linux port has no symbol
prefix.  Which variant to produce is specified by either of the options
`--underscore' and `--no-underscore'.  The default is `--underscore'.
Since symbols in CRIS a.out objects are expected to have a `_' prefix,
specifying `--no-underscore' when generating a.out objects is an error.
Besides the object format difference, the effect of this option is to
parse register names differently (*note crisnous::).  The
`--no-underscore' option makes a `$' register prefix mandatory.

   The option `--pic' must be passed to `as' in order to recognize the
symbol syntax used for ELF (SVR4 PIC) position-independent-code (*note
crispic::).  This will also affect expansion of instructions.  The
expansion with `--pic' will use PC-relative rather than (slightly
faster) absolute addresses in those expansions.

   When `-N' is specified, `as' will emit a warning when a 16-bit
branch instruction is expanded into a 32-bit multiple-instruction
construct (*note CRIS-Expand::).


File: m68k-rtems-as.info,  Node: CRIS-Expand,  Next: CRIS-Syntax,  Prev: CRIS-Opts,  Up: CRIS-Dependent

Instruction expansion
---------------------

`as' will silently choose an instruction that fits the operand size for
`[register+constant]' operands.  For example, the offset `127' in
`move.d [r3+127],r4' fits in an instruction using a signed-byte offset.
Similarly, `move.d [r2+32767],r1' will generate an instruction using a
16-bit offset.  For symbolic expressions and constants that do not fit
in 16 bits including the sign bit, a 32-bit offset is generated.

   For branches, `as' will expand from a 16-bit branch instruction into
a sequence of instructions that can reach a full 32-bit address.  Since
this does not correspond to a single instruction, such expansions can
optionally be warned about.  *Note CRIS-Opts::.


File: m68k-rtems-as.info,  Node: CRIS-Syntax,  Prev: CRIS-Expand,  Up: CRIS-Dependent

Syntax
------

There are different aspects of the CRIS assembly syntax.

* Menu:

* CRIS-Chars::		        Special Characters
* CRIS-Pic::			Position-Independent Code Symbols
* CRIS-Regs::			Register Names
* CRIS-Pseudos::		Assembler Directives


File: m68k-rtems-as.info,  Node: CRIS-Chars,  Next: CRIS-Pic,  Up: CRIS-Syntax

Special Characters
..................

The character `#' is a line comment character.  It starts a comment if
and only if it is placed at the beginning of a line.

   A `;' character starts a comment anywhere on the line, causing all
characters up to the end of the line to be ignored.

   A `@' character is handled as a line separator equivalent to a
logical new-line character (except in a comment), so separate
instructions can be specified on a single line.


File: m68k-rtems-as.info,  Node: CRIS-Pic,  Next: CRIS-Regs,  Prev: CRIS-Chars,  Up: CRIS-Syntax

Symbols in position-independent code
....................................

When generating position-independent code (SVR4 PIC) for use in
cris-axis-linux-gnu shared libraries, symbol suffixes are used to
specify what kind of run-time symbol lookup will be used, expressed in
the object as different _relocation types_.  Usually, all absolute
symbol values must be located in a table, the _global offset table_,
leaving the code position-independent; independent of values of global
symbols and independent of the address of the code.  The suffix
modifies the value of the symbol, into for example an index into the
global offset table where the real symbol value is entered, or a
PC-relative value, or a value relative to the start of the global
offset table.  All symbol suffixes start with the character `:'
(omitted in the list below).  Every symbol use in code or a read-only
section must therefore have a PIC suffix to enable a useful shared
library to be created.  Usually, these constructs must not be used with
an additive constant offset as is usually allowed, i.e. no 4 as in
`symbol + 4' is allowed.  This restriction is checked at link-time, not
at assembly-time.

`GOT'
     Attaching this suffix to a symbol in an instruction causes the
     symbol to be entered into the global offset table.  The value is a
     32-bit index for that symbol into the global offset table.  The
     name of the corresponding relocation is `R_CRIS_32_GOT'.  Example:
     `move.d [$r0+extsym:GOT],$r9'

`GOT16'
     Same as for `GOT', but the value is a 16-bit index into the global
     offset table.  The corresponding relocation is `R_CRIS_16_GOT'.
     Example: `move.d [$r0+asymbol:GOT16],$r10'

`PLT'
     This suffix is used for function symbols.  It causes a _procedure
     linkage table_, an array of code stubs, to be created at the time
     the shared object is created or linked against, together with a
     global offset table entry.  The value is a pc-relative offset to
     the corresponding stub code in the procedure linkage table.  This
     arrangement causes the run-time symbol resolver to be called to
     look up and set the value of the symbol the first time the
     function is called (at latest; depending environment variables).
     It is only safe to leave the symbol unresolved this way if all
     references are function calls.  The name of the relocation is
     `R_CRIS_32_PLT_PCREL'.  Example: `add.d fnname:PLT,$pc'

`PLTG'
     Like PLT, but the value is relative to the beginning of the global
     offset table.  The relocation is `R_CRIS_32_PLT_GOTREL'.  Example:
     `move.d fnname:PLTG,$r3'

`GOTPLT'
     Similar to `PLT', but the value of the symbol is a 32-bit index
     into the global offset table.  This is somewhat of a mix between
     the effect of the `GOT' and the `PLT' suffix; the difference to
     `GOT' is that there will be a procedure linkage table entry
     created, and that the symbol is assumed to be a function entry and
     will be resolved by the run-time resolver as with `PLT'.  The
     relocation is `R_CRIS_32_GOTPLT'.  Example: `jsr
     [$r0+fnname:GOTPLT]'

`GOTPLT16'
     A variant of `GOTPLT' giving a 16-bit value.  Its relocation name
     is `R_CRIS_16_GOTPLT'.  Example: `jsr [$r0+fnname:GOTPLT16]'

`GOTOFF'
     This suffix must only be attached to a local symbol, but may be
     used in an expression adding an offset.  The value is the address
     of the symbol relative to the start of the global offset table.
     The relocation name is `R_CRIS_32_GOTREL'.  Example: `move.d
     [$r0+localsym:GOTOFF],r3'


File: m68k-rtems-as.info,  Node: CRIS-Regs,  Next: CRIS-Pseudos,  Prev: CRIS-Pic,  Up: CRIS-Syntax

Register names
..............

A `$' character may always prefix a general or special register name in
an instruction operand but is mandatory when the option
`--no-underscore' is specified or when the `.syntax register_prefix'
directive is in effect (*note crisnous::).  Register names are
case-insensitive.


File: m68k-rtems-as.info,  Node: CRIS-Pseudos,  Prev: CRIS-Regs,  Up: CRIS-Syntax

Assembler Directives
....................

There are a few CRIS-specific pseudo-directives in addition to the
generic ones.  *Note Pseudo Ops::.  Constants emitted by
pseudo-directives are in little-endian order for CRIS.  There is no
support for floating-point-specific directives for CRIS.

`.dword EXPRESSIONS'
     The `.dword' directive is a synonym for `.int', expecting zero or
     more EXPRESSIONS, separated by commas.  For each expression, a
     32-bit little-endian constant is emitted.

`.syntax ARGUMENT'
     The `.syntax' directive takes as ARGUMENT one of the following
     case-sensitive choices.

    `no_register_prefix'
          The `.syntax no_register_prefix' directive makes a `$'
          character prefix on all registers optional.  It overrides a
          previous setting, including the corresponding effect of the
          option `--no-underscore'.  If this directive is used when
          ordinary symbols do not have a `_' character prefix, care
          must be taken to avoid ambiguities whether an operand is a
          register or a symbol; using symbols with names the same as
          general or special registers then invoke undefined behavior.

    `register_prefix'
          This directive makes a `$' character prefix on all registers
          mandatory.  It overrides a previous setting, including the
          corresponding effect of the option `--underscore'.

    `leading_underscore'
          This is an assertion directive, emitting an error if the
          `--no-underscore' option is in effect.

    `no_leading_underscore'
          This is the opposite of the `.syntax leading_underscore'
          directive and emits an error if the option `--underscore' is
          in effect.



File: m68k-rtems-as.info,  Node: D10V-Dependent,  Next: D30V-Dependent,  Prev: CRIS-Dependent,  Up: Machine Dependencies

D10V Dependent Features
=======================

* Menu:

* D10V-Opts::                   D10V Options
* D10V-Syntax::                 Syntax
* D10V-Float::                  Floating Point
* D10V-Opcodes::                Opcodes


File: m68k-rtems-as.info,  Node: D10V-Opts,  Next: D10V-Syntax,  Up: D10V-Dependent

D10V Options
------------

The Mitsubishi D10V version of `as' has a few machine dependent options.

`-O'
     The D10V can often execute two sub-instructions in parallel. When
     this option is used, `as' will attempt to optimize its output by
     detecting when instructions can be executed in parallel.

`--nowarnswap'
     To optimize execution performance, `as' will sometimes swap the
     order of instructions. Normally this generates a warning. When
     this option is used, no warning will be generated when
     instructions are swapped.

`--gstabs-packing'

`--no-gstabs-packing'
     `as' packs adjacent short instructions into a single packed
     instruction. `--no-gstabs-packing' turns instruction packing off if
     `--gstabs' is specified as well; `--gstabs-packing' (the default)
     turns instruction packing on even when `--gstabs' is specified.


File: m68k-rtems-as.info,  Node: D10V-Syntax,  Next: D10V-Float,  Prev: D10V-Opts,  Up: D10V-Dependent

Syntax
------

The D10V syntax is based on the syntax in Mitsubishi's D10V
architecture manual.  The differences are detailed below.

* Menu:

* D10V-Size::                 Size Modifiers
* D10V-Subs::                 Sub-Instructions
* D10V-Chars::                Special Characters
* D10V-Regs::                 Register Names
* D10V-Addressing::           Addressing Modes
* D10V-Word::                 @WORD Modifier


File: m68k-rtems-as.info,  Node: D10V-Size,  Next: D10V-Subs,  Up: D10V-Syntax

Size Modifiers
..............

The D10V version of `as' uses the instruction names in the D10V
Architecture Manual.  However, the names in the manual are sometimes
ambiguous.  There are instruction names that can assemble to a short or
long form opcode.  How does the assembler pick the correct form?  `as'
will always pick the smallest form if it can.  When dealing with a
symbol that is not defined yet when a line is being assembled, it will
always use the long form.  If you need to force the assembler to use
either the short or long form of the instruction, you can append either
`.s' (short) or `.l' (long) to it.  For example, if you are writing an
assembly program and you want to do a branch to a symbol that is
defined later in your program, you can write `bra.s   foo'.  Objdump
and GDB will always append `.s' or `.l' to instructions which have both
short and long forms.


File: m68k-rtems-as.info,  Node: D10V-Subs,  Next: D10V-Chars,  Prev: D10V-Size,  Up: D10V-Syntax

Sub-Instructions
................

The D10V assembler takes as input a series of instructions, either
one-per-line, or in the special two-per-line format described in the
next section.  Some of these instructions will be short-form or
sub-instructions.  These sub-instructions can be packed into a single
instruction.  The assembler will do this automatically.  It will also
detect when it should not pack instructions.  For example, when a label
is defined, the next instruction will never be packaged with the
previous one.  Whenever a branch and link instruction is called, it
will not be packaged with the next instruction so the return address
will be valid.  Nops are automatically inserted when necessary.

   If you do not want the assembler automatically making these
decisions, you can control the packaging and execution type (parallel
or sequential) with the special execution symbols described in the next
section.


File: m68k-rtems-as.info,  Node: D10V-Chars,  Next: D10V-Regs,  Prev: D10V-Subs,  Up: D10V-Syntax

Special Characters
..................

`;' and `#' are the line comment characters.  Sub-instructions may be
executed in order, in reverse-order, or in parallel.  Instructions
listed in the standard one-per-line format will be executed
sequentially.  To specify the executing order, use the following
symbols:
`->'
     Sequential with instruction on the left first.

`<-'
     Sequential with instruction on the right first.

`||'
     Parallel
   The D10V syntax allows either one instruction per line, one
instruction per line with the execution symbol, or two instructions per
line.  For example
`abs       a1      ->      abs     r0'
     Execute these sequentially.  The instruction on the right is in
     the right container and is executed second.

`abs       r0      <-      abs     a1'
     Execute these reverse-sequentially.  The instruction on the right
     is in the right container, and is executed first.

`ld2w    r2,@r8+         ||      mac     a0,r0,r7'
     Execute these in parallel.

`ld2w    r2,@r8+         ||'
`mac     a0,r0,r7'
     Two-line format. Execute these in parallel.

`ld2w    r2,@r8+'
`mac     a0,r0,r7'
     Two-line format. Execute these sequentially.  Assembler will put
     them in the proper containers.

`ld2w    r2,@r8+         ->'
`mac     a0,r0,r7'
     Two-line format. Execute these sequentially.  Same as above but
     second instruction will always go into right container.
   Since `$' has no special meaning, you may use it in symbol names.


File: m68k-rtems-as.info,  Node: D10V-Regs,  Next: D10V-Addressing,  Prev: D10V-Chars,  Up: D10V-Syntax

Register Names
..............

You can use the predefined symbols `r0' through `r15' to refer to the
D10V registers.  You can also use `sp' as an alias for `r15'.  The
accumulators are `a0' and `a1'.  There are special register-pair names
that may optionally be used in opcodes that require even-numbered
registers. Register names are not case sensitive.

   Register Pairs
`r0-r1'

`r2-r3'

`r4-r5'

`r6-r7'

`r8-r9'

`r10-r11'

`r12-r13'

`r14-r15'

   The D10V also has predefined symbols for these control registers and
status bits:
`psw'
     Processor Status Word

`bpsw'
     Backup Processor Status Word

`pc'
     Program Counter

`bpc'
     Backup Program Counter

`rpt_c'
     Repeat Count

`rpt_s'
     Repeat Start address

`rpt_e'
     Repeat End address

`mod_s'
     Modulo Start address

`mod_e'
     Modulo End address

`iba'
     Instruction Break Address

`f0'
     Flag 0

`f1'
     Flag 1

`c'
     Carry flag


File: m68k-rtems-as.info,  Node: D10V-Addressing,  Next: D10V-Word,  Prev: D10V-Regs,  Up: D10V-Syntax

Addressing Modes
................

`as' understands the following addressing modes for the D10V.  `RN' in
the following refers to any of the numbered registers, but _not_ the
control registers.
`RN'
     Register direct

`@RN'
     Register indirect

`@RN+'
     Register indirect with post-increment

`@RN-'
     Register indirect with post-decrement

`@-SP'
     Register indirect with pre-decrement

`@(DISP, RN)'
     Register indirect with displacement

`ADDR'
     PC relative address (for branch or rep).

`#IMM'
     Immediate data (the `#' is optional and ignored)


File: m68k-rtems-as.info,  Node: D10V-Word,  Prev: D10V-Addressing,  Up: D10V-Syntax

@WORD Modifier
..............

Any symbol followed by `@word' will be replaced by the symbol's value
shifted right by 2.  This is used in situations such as loading a
register with the address of a function (or any other code fragment).
For example, if you want to load a register with the location of the
function `main' then jump to that function, you could do it as follws:
     ldi     r2, main@word
     jmp     r2


File: m68k-rtems-as.info,  Node: D10V-Float,  Next: D10V-Opcodes,  Prev: D10V-Syntax,  Up: D10V-Dependent

Floating Point
--------------

The D10V has no hardware floating point, but the `.float' and `.double'
directives generates IEEE floating-point numbers for compatibility with
other development tools.


File: m68k-rtems-as.info,  Node: D10V-Opcodes,  Prev: D10V-Float,  Up: D10V-Dependent

Opcodes
-------

For detailed information on the D10V machine instruction set, see `D10V
Architecture: A VLIW Microprocessor for Multimedia Applications'
(Mitsubishi Electric Corp.).  `as' implements all the standard D10V
opcodes.  The only changes are those described in the section on size
modifiers


File: m68k-rtems-as.info,  Node: D30V-Dependent,  Next: H8/300-Dependent,  Prev: D10V-Dependent,  Up: Machine Dependencies

D30V Dependent Features
=======================

* Menu:

* D30V-Opts::                   D30V Options
* D30V-Syntax::                 Syntax
* D30V-Float::                  Floating Point
* D30V-Opcodes::                Opcodes


File: m68k-rtems-as.info,  Node: D30V-Opts,  Next: D30V-Syntax,  Up: D30V-Dependent

D30V Options
------------

The Mitsubishi D30V version of `as' has a few machine dependent options.

`-O'
     The D30V can often execute two sub-instructions in parallel. When
     this option is used, `as' will attempt to optimize its output by
     detecting when instructions can be executed in parallel.

`-n'
     When this option is used, `as' will issue a warning every time it
     adds a nop instruction.

`-N'
     When this option is used, `as' will issue a warning if it needs to
     insert a nop after a 32-bit multiply before a load or 16-bit
     multiply instruction.


File: m68k-rtems-as.info,  Node: D30V-Syntax,  Next: D30V-Float,  Prev: D30V-Opts,  Up: D30V-Dependent

Syntax
------

The D30V syntax is based on the syntax in Mitsubishi's D30V
architecture manual.  The differences are detailed below.

* Menu:

* D30V-Size::                 Size Modifiers
* D30V-Subs::                 Sub-Instructions
* D30V-Chars::                Special Characters
* D30V-Guarded::              Guarded Execution
* D30V-Regs::                 Register Names
* D30V-Addressing::           Addressing Modes


File: m68k-rtems-as.info,  Node: D30V-Size,  Next: D30V-Subs,  Up: D30V-Syntax

Size Modifiers
..............

The D30V version of `as' uses the instruction names in the D30V
Architecture Manual.  However, the names in the manual are sometimes
ambiguous.  There are instruction names that can assemble to a short or
long form opcode.  How does the assembler pick the correct form?  `as'
will always pick the smallest form if it can.  When dealing with a
symbol that is not defined yet when a line is being assembled, it will
always use the long form.  If you need to force the assembler to use
either the short or long form of the instruction, you can append either
`.s' (short) or `.l' (long) to it.  For example, if you are writing an
assembly program and you want to do a branch to a symbol that is
defined later in your program, you can write `bra.s foo'.  Objdump and
GDB will always append `.s' or `.l' to instructions which have both
short and long forms.


File: m68k-rtems-as.info,  Node: D30V-Subs,  Next: D30V-Chars,  Prev: D30V-Size,  Up: D30V-Syntax

Sub-Instructions
................

The D30V assembler takes as input a series of instructions, either
one-per-line, or in the special two-per-line format described in the
next section.  Some of these instructions will be short-form or
sub-instructions.  These sub-instructions can be packed into a single
instruction.  The assembler will do this automatically.  It will also
detect when it should not pack instructions.  For example, when a label
is defined, the next instruction will never be packaged with the
previous one.  Whenever a branch and link instruction is called, it
will not be packaged with the next instruction so the return address
will be valid.  Nops are automatically inserted when necessary.

   If you do not want the assembler automatically making these
decisions, you can control the packaging and execution type (parallel
or sequential) with the special execution symbols described in the next
section.


File: m68k-rtems-as.info,  Node: D30V-Chars,  Next: D30V-Guarded,  Prev: D30V-Subs,  Up: D30V-Syntax

Special Characters
..................

`;' and `#' are the line comment characters.  Sub-instructions may be
executed in order, in reverse-order, or in parallel.  Instructions
listed in the standard one-per-line format will be executed
sequentially unless you use the `-O' option.

   To specify the executing order, use the following symbols:
`->'
     Sequential with instruction on the left first.

`<-'
     Sequential with instruction on the right first.

`||'
     Parallel

   The D30V syntax allows either one instruction per line, one
instruction per line with the execution symbol, or two instructions per
line.  For example
`abs r2,r3 -> abs r4,r5'
     Execute these sequentially.  The instruction on the right is in
     the right container and is executed second.

`abs r2,r3 <- abs r4,r5'
     Execute these reverse-sequentially.  The instruction on the right
     is in the right container, and is executed first.

`abs r2,r3 || abs r4,r5'
     Execute these in parallel.

`ldw r2,@(r3,r4) ||'
`mulx r6,r8,r9'
     Two-line format. Execute these in parallel.

`mulx a0,r8,r9'
`stw r2,@(r3,r4)'
     Two-line format. Execute these sequentially unless `-O' option is
     used.  If the `-O' option is used, the assembler will determine if
     the instructions could be done in parallel (the above two
     instructions can be done in parallel), and if so, emit them as
     parallel instructions.  The assembler will put them in the proper
     containers.  In the above example, the assembler will put the
     `stw' instruction in left container and the `mulx' instruction in
     the right container.

`stw r2,@(r3,r4) ->'
`mulx a0,r8,r9'
     Two-line format.  Execute the `stw' instruction followed by the
     `mulx' instruction sequentially.  The first instruction goes in the
     left container and the second instruction goes into right
     container.  The assembler will give an error if the machine
     ordering constraints are violated.

`stw r2,@(r3,r4) <-'
`mulx a0,r8,r9'
     Same as previous example, except that the `mulx' instruction is
     executed before the `stw' instruction.

   Since `$' has no special meaning, you may use it in symbol names.


File: m68k-rtems-as.info,  Node: D30V-Guarded,  Next: D30V-Regs,  Prev: D30V-Chars,  Up: D30V-Syntax

Guarded Execution
.................

`as' supports the full range of guarded execution directives for each
instruction.  Just append the directive after the instruction proper.
The directives are:

`/tx'
     Execute the instruction if flag f0 is true.

`/fx'
     Execute the instruction if flag f0 is false.

`/xt'
     Execute the instruction if flag f1 is true.

`/xf'
     Execute the instruction if flag f1 is false.

`/tt'
     Execute the instruction if both flags f0 and f1 are true.

`/tf'
     Execute the instruction if flag f0 is true and flag f1 is false.


File: m68k-rtems-as.info,  Node: D30V-Regs,  Next: D30V-Addressing,  Prev: D30V-Guarded,  Up: D30V-Syntax

Register Names
..............

You can use the predefined symbols `r0' through `r63' to refer to the
D30V registers.  You can also use `sp' as an alias for `r63' and `link'
as an alias for `r62'.  The accumulators are `a0' and `a1'.

   The D30V also has predefined symbols for these control registers and
status bits:
`psw'
     Processor Status Word

`bpsw'
     Backup Processor Status Word

`pc'
     Program Counter

`bpc'
     Backup Program Counter

`rpt_c'
     Repeat Count

`rpt_s'
     Repeat Start address

`rpt_e'
     Repeat End address

`mod_s'
     Modulo Start address

`mod_e'
     Modulo End address

`iba'
     Instruction Break Address

`f0'
     Flag 0

`f1'
     Flag 1

`f2'
     Flag 2

`f3'
     Flag 3

`f4'
     Flag 4

`f5'
     Flag 5

`f6'
     Flag 6

`f7'
     Flag 7

`s'
     Same as flag 4 (saturation flag)

`v'
     Same as flag 5 (overflow flag)

`va'
     Same as flag 6 (sticky overflow flag)

`c'
     Same as flag 7 (carry/borrow flag)

`b'
     Same as flag 7 (carry/borrow flag)


File: m68k-rtems-as.info,  Node: D30V-Addressing,  Prev: D30V-Regs,  Up: D30V-Syntax

Addressing Modes
................

`as' understands the following addressing modes for the D30V.  `RN' in
the following refers to any of the numbered registers, but _not_ the
control registers.
`RN'
     Register direct

`@RN'
     Register indirect

`@RN+'
     Register indirect with post-increment

`@RN-'
     Register indirect with post-decrement

`@-SP'
     Register indirect with pre-decrement

`@(DISP, RN)'
     Register indirect with displacement

`ADDR'
     PC relative address (for branch or rep).

`#IMM'
     Immediate data (the `#' is optional and ignored)


File: m68k-rtems-as.info,  Node: D30V-Float,  Next: D30V-Opcodes,  Prev: D30V-Syntax,  Up: D30V-Dependent

Floating Point
--------------

The D30V has no hardware floating point, but the `.float' and `.double'
directives generates IEEE floating-point numbers for compatibility with
other development tools.


File: m68k-rtems-as.info,  Node: D30V-Opcodes,  Prev: D30V-Float,  Up: D30V-Dependent

Opcodes
-------

For detailed information on the D30V machine instruction set, see `D30V
Architecture: A VLIW Microprocessor for Multimedia Applications'
(Mitsubishi Electric Corp.).  `as' implements all the standard D30V
opcodes.  The only changes are those described in the section on size
modifiers


File: m68k-rtems-as.info,  Node: H8/300-Dependent,  Next: H8/500-Dependent,  Prev: D30V-Dependent,  Up: Machine Dependencies

H8/300 Dependent Features
=========================

* Menu:

* H8/300 Options::              Options
* H8/300 Syntax::               Syntax
* H8/300 Floating Point::       Floating Point
* H8/300 Directives::           H8/300 Machine Directives
* H8/300 Opcodes::              Opcodes


File: m68k-rtems-as.info,  Node: H8/300 Options,  Next: H8/300 Syntax,  Up: H8/300-Dependent

Options
-------

`as' has no additional command-line options for the Hitachi H8/300
family.


File: m68k-rtems-as.info,  Node: H8/300 Syntax,  Next: H8/300 Floating Point,  Prev: H8/300 Options,  Up: H8/300-Dependent

Syntax
------

* Menu:

* H8/300-Chars::                Special Characters
* H8/300-Regs::                 Register Names
* H8/300-Addressing::           Addressing Modes


File: m68k-rtems-as.info,  Node: H8/300-Chars,  Next: H8/300-Regs,  Up: H8/300 Syntax

Special Characters
..................

`;' is the line comment character.

   `$' can be used instead of a newline to separate statements.
Therefore _you may not use `$' in symbol names_ on the H8/300.


File: m68k-rtems-as.info,  Node: H8/300-Regs,  Next: H8/300-Addressing,  Prev: H8/300-Chars,  Up: H8/300 Syntax

Register Names
..............

You can use predefined symbols of the form `rNh' and `rNl' to refer to
the H8/300 registers as sixteen 8-bit general-purpose registers.  N is
a digit from `0' to `7'); for instance, both `r0h' and `r7l' are valid
register names.

   You can also use the eight predefined symbols `rN' to refer to the
H8/300 registers as 16-bit registers (you must use this form for
addressing).

   On the H8/300H, you can also use the eight predefined symbols `erN'
(`er0' ... `er7') to refer to the 32-bit general purpose registers.

   The two control registers are called `pc' (program counter; a 16-bit
register, except on the H8/300H where it is 24 bits) and `ccr'
(condition code register; an 8-bit register).  `r7' is used as the
stack pointer, and can also be called `sp'.


File: m68k-rtems-as.info,  Node: H8/300-Addressing,  Prev: H8/300-Regs,  Up: H8/300 Syntax

Addressing Modes
................

as understands the following addressing modes for the H8/300:
`rN'
     Register direct

`@rN'
     Register indirect

`@(D, rN)'
`@(D:16, rN)'
`@(D:24, rN)'
     Register indirect: 16-bit or 24-bit displacement D from register
     N.  (24-bit displacements are only meaningful on the H8/300H.)

`@rN+'
     Register indirect with post-increment

`@-rN'
     Register indirect with pre-decrement

``@'AA'
``@'AA:8'
``@'AA:16'
``@'AA:24'
     Absolute address `aa'.  (The address size `:24' only makes sense
     on the H8/300H.)

`#XX'
`#XX:8'
`#XX:16'
`#XX:32'
     Immediate data XX.  You may specify the `:8', `:16', or `:32' for
     clarity, if you wish; but `as' neither requires this nor uses
     it--the data size required is taken from context.

``@'`@'AA'
``@'`@'AA:8'
     Memory indirect.  You may specify the `:8' for clarity, if you
     wish; but `as' neither requires this nor uses it.


File: m68k-rtems-as.info,  Node: H8/300 Floating Point,  Next: H8/300 Directives,  Prev: H8/300 Syntax,  Up: H8/300-Dependent

Floating Point
--------------

The H8/300 family has no hardware floating point, but the `.float'
directive generates IEEE floating-point numbers for compatibility with
other development tools.


File: m68k-rtems-as.info,  Node: H8/300 Directives,  Next: H8/300 Opcodes,  Prev: H8/300 Floating Point,  Up: H8/300-Dependent

H8/300 Machine Directives
-------------------------

`as' has only one machine-dependent directive for the H8/300:

`.h8300h'
     Recognize and emit additional instructions for the H8/300H
     variant, and also make `.int' emit 32-bit numbers rather than the
     usual (16-bit) for the H8/300 family.

   On the H8/300 family (including the H8/300H) `.word' directives
generate 16-bit numbers.


File: m68k-rtems-as.info,  Node: H8/300 Opcodes,  Prev: H8/300 Directives,  Up: H8/300-Dependent

Opcodes
-------

For detailed information on the H8/300 machine instruction set, see
`H8/300 Series Programming Manual' (Hitachi ADE-602-025).  For
information specific to the H8/300H, see `H8/300H Series Programming
Manual' (Hitachi).

   `as' implements all the standard H8/300 opcodes.  No additional
pseudo-instructions are needed on this family.

   The following table summarizes the H8/300 opcodes, and their
arguments.  Entries marked `*' are opcodes used only on the H8/300H.

              Legend:
                 Rs   source register
                 Rd   destination register
                 abs  absolute address
                 imm  immediate data
              disp:N  N-bit displacement from a register
             pcrel:N  N-bit displacement relative to program counter
     
        add.b #imm,rd              *  andc #imm,ccr
        add.b rs,rd                   band #imm,rd
        add.w rs,rd                   band #imm,@rd
     *  add.w #imm,rd                 band #imm,@abs:8
     *  add.l rs,rd                   bra  pcrel:8
     *  add.l #imm,rd              *  bra  pcrel:16
        adds #imm,rd                  bt   pcrel:8
        addx #imm,rd               *  bt   pcrel:16
        addx rs,rd                    brn  pcrel:8
        and.b #imm,rd              *  brn  pcrel:16
        and.b rs,rd                   bf   pcrel:8
     *  and.w rs,rd                *  bf   pcrel:16
     *  and.w #imm,rd                 bhi  pcrel:8
     *  and.l #imm,rd              *  bhi  pcrel:16
     *  and.l rs,rd                   bls  pcrel:8
     
     *  bls  pcrel:16                 bld  #imm,rd
        bcc  pcrel:8                  bld  #imm,@rd
     *  bcc  pcrel:16                 bld  #imm,@abs:8
        bhs  pcrel:8                  bnot #imm,rd
     *  bhs  pcrel:16                 bnot #imm,@rd
        bcs  pcrel:8                  bnot #imm,@abs:8
     *  bcs  pcrel:16                 bnot rs,rd
        blo  pcrel:8                  bnot rs,@rd
     *  blo  pcrel:16                 bnot rs,@abs:8
        bne  pcrel:8                  bor  #imm,rd
     *  bne  pcrel:16                 bor  #imm,@rd
        beq  pcrel:8                  bor  #imm,@abs:8
     *  beq  pcrel:16                 bset #imm,rd
        bvc  pcrel:8                  bset #imm,@rd
     *  bvc  pcrel:16                 bset #imm,@abs:8
        bvs  pcrel:8                  bset rs,rd
     *  bvs  pcrel:16                 bset rs,@rd
        bpl  pcrel:8                  bset rs,@abs:8
     *  bpl  pcrel:16                 bsr  pcrel:8
        bmi  pcrel:8                  bsr  pcrel:16
     *  bmi  pcrel:16                 bst  #imm,rd
        bge  pcrel:8                  bst  #imm,@rd
     *  bge  pcrel:16                 bst  #imm,@abs:8
        blt  pcrel:8                  btst #imm,rd
     *  blt  pcrel:16                 btst #imm,@rd
        bgt  pcrel:8                  btst #imm,@abs:8
     *  bgt  pcrel:16                 btst rs,rd
        ble  pcrel:8                  btst rs,@rd
     *  ble  pcrel:16                 btst rs,@abs:8
        bclr #imm,rd                  bxor #imm,rd
        bclr #imm,@rd                 bxor #imm,@rd
        bclr #imm,@abs:8              bxor #imm,@abs:8
        bclr rs,rd                    cmp.b #imm,rd
        bclr rs,@rd                   cmp.b rs,rd
        bclr rs,@abs:8                cmp.w rs,rd
        biand #imm,rd                 cmp.w rs,rd
        biand #imm,@rd             *  cmp.w #imm,rd
        biand #imm,@abs:8          *  cmp.l #imm,rd
        bild #imm,rd               *  cmp.l rs,rd
        bild #imm,@rd                 daa  rs
        bild #imm,@abs:8              das  rs
        bior #imm,rd                  dec.b rs
        bior #imm,@rd              *  dec.w #imm,rd
        bior #imm,@abs:8           *  dec.l #imm,rd
        bist #imm,rd                  divxu.b rs,rd
        bist #imm,@rd              *  divxu.w rs,rd
        bist #imm,@abs:8           *  divxs.b rs,rd
        bixor #imm,rd              *  divxs.w rs,rd
        bixor #imm,@rd                eepmov
        bixor #imm,@abs:8          *  eepmovw
     
     *  exts.w rd                     mov.w rs,@abs:16
     *  exts.l rd                  *  mov.l #imm,rd
     *  extu.w rd                  *  mov.l rs,rd
     *  extu.l rd                  *  mov.l @rs,rd
        inc  rs                    *  mov.l @(disp:16,rs),rd
     *  inc.w #imm,rd              *  mov.l @(disp:24,rs),rd
     *  inc.l #imm,rd              *  mov.l @rs+,rd
        jmp  @rs                   *  mov.l @abs:16,rd
        jmp  abs                   *  mov.l @abs:24,rd
        jmp  @@abs:8               *  mov.l rs,@rd
        jsr  @rs                   *  mov.l rs,@(disp:16,rd)
        jsr  abs                   *  mov.l rs,@(disp:24,rd)
        jsr  @@abs:8               *  mov.l rs,@-rd
        ldc  #imm,ccr              *  mov.l rs,@abs:16
        ldc  rs,ccr                *  mov.l rs,@abs:24
     *  ldc  @abs:16,ccr              movfpe @abs:16,rd
     *  ldc  @abs:24,ccr              movtpe rs,@abs:16
     *  ldc  @(disp:16,rs),ccr        mulxu.b rs,rd
     *  ldc  @(disp:24,rs),ccr     *  mulxu.w rs,rd
     *  ldc  @rs+,ccr              *  mulxs.b rs,rd
     *  ldc  @rs,ccr               *  mulxs.w rs,rd
     *  mov.b @(disp:24,rs),rd        neg.b rs
     *  mov.b rs,@(disp:24,rd)     *  neg.w rs
        mov.b @abs:16,rd           *  neg.l rs
        mov.b rs,rd                   nop
        mov.b @abs:8,rd               not.b rs
        mov.b rs,@abs:8            *  not.w rs
        mov.b rs,rd                *  not.l rs
        mov.b #imm,rd                 or.b #imm,rd
        mov.b @rs,rd                  or.b rs,rd
        mov.b @(disp:16,rs),rd     *  or.w #imm,rd
        mov.b @rs+,rd              *  or.w rs,rd
        mov.b @abs:8,rd            *  or.l #imm,rd
        mov.b rs,@rd               *  or.l rs,rd
        mov.b rs,@(disp:16,rd)        orc  #imm,ccr
        mov.b rs,@-rd                 pop.w rs
        mov.b rs,@abs:8            *  pop.l rs
        mov.w rs,@rd                  push.w rs
     *  mov.w @(disp:24,rs),rd     *  push.l rs
     *  mov.w rs,@(disp:24,rd)        rotl.b rs
     *  mov.w @abs:24,rd           *  rotl.w rs
     *  mov.w rs,@abs:24           *  rotl.l rs
        mov.w rs,rd                   rotr.b rs
        mov.w #imm,rd              *  rotr.w rs
        mov.w @rs,rd               *  rotr.l rs
        mov.w @(disp:16,rs),rd        rotxl.b rs
        mov.w @rs+,rd              *  rotxl.w rs
        mov.w @abs:16,rd           *  rotxl.l rs
        mov.w rs,@(disp:16,rd)        rotxr.b rs
        mov.w rs,@-rd              *  rotxr.w rs
     
     *  rotxr.l rs                 *  stc  ccr,@(disp:24,rd)
        bpt                        *  stc  ccr,@-rd
        rte                        *  stc  ccr,@abs:16
        rts                        *  stc  ccr,@abs:24
        shal.b rs                     sub.b rs,rd
     *  shal.w rs                     sub.w rs,rd
     *  shal.l rs                  *  sub.w #imm,rd
        shar.b rs                  *  sub.l rs,rd
     *  shar.w rs                  *  sub.l #imm,rd
     *  shar.l rs                     subs #imm,rd
        shll.b rs                     subx #imm,rd
     *  shll.w rs                     subx rs,rd
     *  shll.l rs                  *  trapa #imm
        shlr.b rs                     xor  #imm,rd
     *  shlr.w rs                     xor  rs,rd
     *  shlr.l rs                  *  xor.w #imm,rd
        sleep                      *  xor.w rs,rd
        stc  ccr,rd                *  xor.l #imm,rd
     *  stc  ccr,@rs               *  xor.l rs,rd
     *  stc  ccr,@(disp:16,rd)        xorc #imm,ccr

   Four H8/300 instructions (`add', `cmp', `mov', `sub') are defined
with variants using the suffixes `.b', `.w', and `.l' to specify the
size of a memory operand.  `as' supports these suffixes, but does not
require them; since one of the operands is always a register, `as' can
deduce the correct size.

   For example, since `r0' refers to a 16-bit register,
     mov    r0,@foo
is equivalent to
     mov.w  r0,@foo

   If you use the size suffixes, `as' issues a warning when the suffix
and the register size do not match.


File: m68k-rtems-as.info,  Node: H8/500-Dependent,  Next: HPPA-Dependent,  Prev: H8/300-Dependent,  Up: Machine Dependencies

H8/500 Dependent Features
=========================

* Menu:

* H8/500 Options::              Options
* H8/500 Syntax::               Syntax
* H8/500 Floating Point::       Floating Point
* H8/500 Directives::           H8/500 Machine Directives
* H8/500 Opcodes::              Opcodes


File: m68k-rtems-as.info,  Node: H8/500 Options,  Next: H8/500 Syntax,  Up: H8/500-Dependent

Options
-------

`as' has no additional command-line options for the Hitachi H8/500
family.


File: m68k-rtems-as.info,  Node: H8/500 Syntax,  Next: H8/500 Floating Point,  Prev: H8/500 Options,  Up: H8/500-Dependent

Syntax
------

* Menu:

* H8/500-Chars::                Special Characters
* H8/500-Regs::                 Register Names
* H8/500-Addressing::           Addressing Modes


File: m68k-rtems-as.info,  Node: H8/500-Chars,  Next: H8/500-Regs,  Up: H8/500 Syntax

Special Characters
..................

`!' is the line comment character.

   `;' can be used instead of a newline to separate statements.

   Since `$' has no special meaning, you may use it in symbol names.


File: m68k-rtems-as.info,  Node: H8/500-Regs,  Next: H8/500-Addressing,  Prev: H8/500-Chars,  Up: H8/500 Syntax

Register Names
..............

You can use the predefined symbols `r0', `r1', `r2', `r3', `r4', `r5',
`r6', and `r7' to refer to the H8/500 registers.

   The H8/500 also has these control registers:

`cp'
     code pointer

`dp'
     data pointer

`bp'
     base pointer

`tp'
     stack top pointer

`ep'
     extra pointer

`sr'
     status register

`ccr'
     condition code register

   All registers are 16 bits long.  To represent 32 bit numbers, use two
adjacent registers; for distant memory addresses, use one of the segment
pointers (`cp' for the program counter; `dp' for `r0'-`r3'; `ep' for
`r4' and `r5'; and `tp' for `r6' and `r7'.


File: m68k-rtems-as.info,  Node: H8/500-Addressing,  Prev: H8/500-Regs,  Up: H8/500 Syntax

Addressing Modes
................

as understands the following addressing modes for the H8/500:
`RN'
     Register direct

`@RN'
     Register indirect

`@(d:8, RN)'
     Register indirect with 8 bit signed displacement

`@(d:16, RN)'
     Register indirect with 16 bit signed displacement

`@-RN'
     Register indirect with pre-decrement

`@RN+'
     Register indirect with post-increment

`@AA:8'
     8 bit absolute address

`@AA:16'
     16 bit absolute address

`#XX:8'
     8 bit immediate

`#XX:16'
     16 bit immediate


File: m68k-rtems-as.info,  Node: H8/500 Floating Point,  Next: H8/500 Directives,  Prev: H8/500 Syntax,  Up: H8/500-Dependent

Floating Point
--------------

The H8/500 family has no hardware floating point, but the `.float'
directive generates IEEE floating-point numbers for compatibility with
other development tools.


File: m68k-rtems-as.info,  Node: H8/500 Directives,  Next: H8/500 Opcodes,  Prev: H8/500 Floating Point,  Up: H8/500-Dependent

H8/500 Machine Directives
-------------------------

`as' has no machine-dependent directives for the H8/500.  However, on
this platform the `.int' and `.word' directives generate 16-bit numbers.


File: m68k-rtems-as.info,  Node: H8/500 Opcodes,  Prev: H8/500 Directives,  Up: H8/500-Dependent

Opcodes
-------

For detailed information on the H8/500 machine instruction set, see
`H8/500 Series Programming Manual' (Hitachi M21T001).

   `as' implements all the standard H8/500 opcodes.  No additional
pseudo-instructions are needed on this family.

   The following table summarizes H8/500 opcodes and their operands:

     Legend:
     abs8      8-bit absolute address
     abs16     16-bit absolute address
     abs24     24-bit absolute address
     crb       `ccr', `br', `ep', `dp', `tp', `dp'
     disp8     8-bit displacement
     ea        `rn', `@rn', `@(d:8, rn)', `@(d:16, rn)',
               `@-rn', `@rn+', `@aa:8', `@aa:16',
               `#xx:8', `#xx:16'
     ea_mem    `@rn', `@(d:8, rn)', `@(d:16, rn)',
               `@-rn', `@rn+', `@aa:8', `@aa:16'
     ea_noimm  `rn', `@rn', `@(d:8, rn)', `@(d:16, rn)',
               `@-rn', `@rn+', `@aa:8', `@aa:16'
     fp        r6
     imm4      4-bit immediate data
     imm8      8-bit immediate data
     imm16     16-bit immediate data
     pcrel8    8-bit offset from program counter
     pcrel16   16-bit offset from program counter
     qim       `-2', `-1', `1', `2'
     rd        any register
     rs        a register distinct from rd
     rlist     comma-separated list of registers in parentheses;
               register ranges `rd-rs' are allowed
     sp        stack pointer (`r7')
     sr        status register
     sz        size; `.b' or `.w'.  If omitted, default `.w'
     
     ldc[.b] ea,crb                 bcc[.w] pcrel16
     ldc[.w] ea,sr                  bcc[.b] pcrel8
     add[:q] sz qim,ea_noimm        bhs[.w] pcrel16
     add[:g] sz ea,rd               bhs[.b] pcrel8
     adds sz ea,rd                  bcs[.w] pcrel16
     addx sz ea,rd                  bcs[.b] pcrel8
     and sz ea,rd                   blo[.w] pcrel16
     andc[.b] imm8,crb              blo[.b] pcrel8
     andc[.w] imm16,sr              bne[.w] pcrel16
     bpt                            bne[.b] pcrel8
     bra[.w] pcrel16                beq[.w] pcrel16
     bra[.b] pcrel8                 beq[.b] pcrel8
     bt[.w] pcrel16                 bvc[.w] pcrel16
     bt[.b] pcrel8                  bvc[.b] pcrel8
     brn[.w] pcrel16                bvs[.w] pcrel16
     brn[.b] pcrel8                 bvs[.b] pcrel8
     bf[.w] pcrel16                 bpl[.w] pcrel16
     bf[.b] pcrel8                  bpl[.b] pcrel8
     bhi[.w] pcrel16                bmi[.w] pcrel16
     bhi[.b] pcrel8                 bmi[.b] pcrel8
     bls[.w] pcrel16                bge[.w] pcrel16
     bls[.b] pcrel8                 bge[.b] pcrel8
     
     blt[.w] pcrel16                mov[:g][.b] imm8,ea_mem
     blt[.b] pcrel8                 mov[:g][.w] imm16,ea_mem
     bgt[.w] pcrel16                movfpe[.b] ea,rd
     bgt[.b] pcrel8                 movtpe[.b] rs,ea_noimm
     ble[.w] pcrel16                mulxu sz ea,rd
     ble[.b] pcrel8                 neg sz ea
     bclr sz imm4,ea_noimm          nop
     bclr sz rs,ea_noimm            not sz ea
     bnot sz imm4,ea_noimm          or sz ea,rd
     bnot sz rs,ea_noimm            orc[.b] imm8,crb
     bset sz imm4,ea_noimm          orc[.w] imm16,sr
     bset sz rs,ea_noimm            pjmp abs24
     bsr[.b] pcrel8                 pjmp @rd
     bsr[.w] pcrel16                pjsr abs24
     btst sz imm4,ea_noimm          pjsr @rd
     btst sz rs,ea_noimm            prtd imm8
     clr sz ea                      prtd imm16
     cmp[:e][.b] imm8,rd            prts
     cmp[:i][.w] imm16,rd           rotl sz ea
     cmp[:g].b imm8,ea_noimm        rotr sz ea
     cmp[:g][.w] imm16,ea_noimm     rotxl sz ea
     Cmp[:g] sz ea,rd               rotxr sz ea
     dadd rs,rd                     rtd imm8
     divxu sz ea,rd                 rtd imm16
     dsub rs,rd                     rts
     exts[.b] rd                    scb/f rs,pcrel8
     extu[.b] rd                    scb/ne rs,pcrel8
     jmp @rd                        scb/eq rs,pcrel8
     jmp @(imm8,rd)                 shal sz ea
     jmp @(imm16,rd)                shar sz ea
     jmp abs16                      shll sz ea
     jsr @rd                        shlr sz ea
     jsr @(imm8,rd)                 sleep
     jsr @(imm16,rd)                stc[.b] crb,ea_noimm
     jsr abs16                      stc[.w] sr,ea_noimm
     ldm @sp+,(rlist)               stm (rlist),@-sp
     link fp,imm8                   sub sz ea,rd
     link fp,imm16                  subs sz ea,rd
     mov[:e][.b] imm8,rd            subx sz ea,rd
     mov[:i][.w] imm16,rd           swap[.b] rd
     mov[:l][.w] abs8,rd            tas[.b] ea
     mov[:l].b abs8,rd              trapa imm4
     mov[:s][.w] rs,abs8            trap/vs
     mov[:s].b rs,abs8              tst sz ea
     mov[:f][.w] @(disp8,fp),rd     unlk fp
     mov[:f][.w] rs,@(disp8,fp)     xch[.w] rs,rd
     mov[:f].b @(disp8,fp),rd       xor sz ea,rd
     mov[:f].b rs,@(disp8,fp)       xorc.b imm8,crb
     mov[:g] sz rs,ea_mem           xorc.w imm16,sr
     mov[:g] sz ea,rd


File: m68k-rtems-as.info,  Node: HPPA-Dependent,  Next: ESA/390-Dependent,  Prev: H8/500-Dependent,  Up: Machine Dependencies

HPPA Dependent Features
=======================

* Menu:

* HPPA Notes::                Notes
* HPPA Options::              Options
* HPPA Syntax::               Syntax
* HPPA Floating Point::       Floating Point
* HPPA Directives::           HPPA Machine Directives
* HPPA Opcodes::              Opcodes


File: m68k-rtems-as.info,  Node: HPPA Notes,  Next: HPPA Options,  Up: HPPA-Dependent

Notes
-----

As a back end for GNU CC `as' has been throughly tested and should work
extremely well.  We have tested it only minimally on hand written
assembly code and no one has tested it much on the assembly output from
the HP compilers.

   The format of the debugging sections has changed since the original
`as' port (version 1.3X) was released; therefore, you must rebuild all
HPPA objects and libraries with the new assembler so that you can debug
the final executable.

   The HPPA `as' port generates a small subset of the relocations
available in the SOM and ELF object file formats.  Additional relocation
support will be added as it becomes necessary.


File: m68k-rtems-as.info,  Node: HPPA Options,  Next: HPPA Syntax,  Prev: HPPA Notes,  Up: HPPA-Dependent

Options
-------

`as' has no machine-dependent command-line options for the HPPA.


File: m68k-rtems-as.info,  Node: HPPA Syntax,  Next: HPPA Floating Point,  Prev: HPPA Options,  Up: HPPA-Dependent

Syntax
------

The assembler syntax closely follows the HPPA instruction set reference
manual; assembler directives and general syntax closely follow the HPPA
assembly language reference manual, with a few noteworthy differences.

   First, a colon may immediately follow a label definition.  This is
simply for compatibility with how most assembly language programmers
write code.

   Some obscure expression parsing problems may affect hand written
code which uses the `spop' instructions, or code which makes significant
use of the `!' line separator.

   `as' is much less forgiving about missing arguments and other
similar oversights than the HP assembler.  `as' notifies you of missing
arguments as syntax errors; this is regarded as a feature, not a bug.

   Finally, `as' allows you to use an external symbol without
explicitly importing the symbol.  _Warning:_ in the future this will be
an error for HPPA targets.

   Special characters for HPPA targets include:

   `;' is the line comment character.

   `!' can be used instead of a newline to separate statements.

   Since `$' has no special meaning, you may use it in symbol names.


File: m68k-rtems-as.info,  Node: HPPA Floating Point,  Next: HPPA Directives,  Prev: HPPA Syntax,  Up: HPPA-Dependent

Floating Point
--------------

The HPPA family uses IEEE floating-point numbers.


File: m68k-rtems-as.info,  Node: HPPA Directives,  Next: HPPA Opcodes,  Prev: HPPA Floating Point,  Up: HPPA-Dependent

HPPA Assembler Directives
-------------------------

`as' for the HPPA supports many additional directives for compatibility
with the native assembler.  This section describes them only briefly.
For detailed information on HPPA-specific assembler directives, see
`HP9000 Series 800 Assembly Language Reference Manual' (HP 92432-90001).

   `as' does _not_ support the following assembler directives described
in the HP manual:

     .endm           .liston
     .enter          .locct
     .leave          .macro
     .listoff

   Beyond those implemented for compatibility, `as' supports one
additional assembler directive for the HPPA: `.param'.  It conveys
register argument locations for static functions.  Its syntax closely
follows the `.export' directive.

   These are the additional directives in `as' for the HPPA:

`.block N'
`.blockz N'
     Reserve N bytes of storage, and initialize them to zero.

`.call'
     Mark the beginning of a procedure call.  Only the special case
     with _no arguments_ is allowed.

`.callinfo [ PARAM=VALUE, ... ]  [ FLAG, ... ]'
     Specify a number of parameters and flags that define the
     environment for a procedure.

     PARAM may be any of `frame' (frame size), `entry_gr' (end of
     general register range), `entry_fr' (end of float register range),
     `entry_sr' (end of space register range).

     The values for FLAG are `calls' or `caller' (proc has
     subroutines), `no_calls' (proc does not call subroutines),
     `save_rp' (preserve return pointer), `save_sp' (proc preserves
     stack pointer), `no_unwind' (do not unwind this proc), `hpux_int'
     (proc is interrupt routine).

`.code'
     Assemble into the standard section called `$TEXT$', subsection
     `$CODE$'.

`.copyright "STRING"'
     In the SOM object format, insert STRING into the object code,
     marked as a copyright string.

`.copyright "STRING"'
     In the ELF object format, insert STRING into the object code,
     marked as a version string.

`.enter'
     Not yet supported; the assembler rejects programs containing this
     directive.

`.entry'
     Mark the beginning of a procedure.

`.exit'
     Mark the end of a procedure.

`.export NAME [ ,TYP ]  [ ,PARAM=R ]'
     Make a procedure NAME available to callers.  TYP, if present, must
     be one of `absolute', `code' (ELF only, not SOM), `data', `entry',
     `data', `entry', `millicode', `plabel', `pri_prog', or `sec_prog'.

     PARAM, if present, provides either relocation information for the
     procedure arguments and result, or a privilege level.  PARAM may be
     `argwN' (where N ranges from `0' to `3', and indicates one of four
     one-word arguments); `rtnval' (the procedure's result); or
     `priv_lev' (privilege level).  For arguments or the result, R
     specifies how to relocate, and must be one of `no' (not
     relocatable), `gr' (argument is in general register), `fr' (in
     floating point register), or `fu' (upper half of float register).
     For `priv_lev', R is an integer.

`.half N'
     Define a two-byte integer constant N; synonym for the portable
     `as' directive `.short'.

`.import NAME [ ,TYP ]'
     Converse of `.export'; make a procedure available to call.  The
     arguments use the same conventions as the first two arguments for
     `.export'.

`.label NAME'
     Define NAME as a label for the current assembly location.

`.leave'
     Not yet supported; the assembler rejects programs containing this
     directive.

`.origin LC'
     Advance location counter to LC. Synonym for the `{No value for
     `as'}' portable directive `.org'.

`.param NAME [ ,TYP ]  [ ,PARAM=R ]'
     Similar to `.export', but used for static procedures.

`.proc'
     Use preceding the first statement of a procedure.

`.procend'
     Use following the last statement of a procedure.

`LABEL .reg EXPR'
     Synonym for `.equ'; define LABEL with the absolute expression EXPR
     as its value.

`.space SECNAME [ ,PARAMS ]'
     Switch to section SECNAME, creating a new section by that name if
     necessary.  You may only use PARAMS when creating a new section,
     not when switching to an existing one.  SECNAME may identify a
     section by number rather than by name.

     If specified, the list PARAMS declares attributes of the section,
     identified by keywords.  The keywords recognized are `spnum=EXP'
     (identify this section by the number EXP, an absolute expression),
     `sort=EXP' (order sections according to this sort key when linking;
     EXP is an absolute expression), `unloadable' (section contains no
     loadable data), `notdefined' (this section defined elsewhere), and
     `private' (data in this section not available to other programs).

`.spnum SECNAM'
     Allocate four bytes of storage, and initialize them with the
     section number of the section named SECNAM.  (You can define the
     section number with the HPPA `.space' directive.)

`.string "STR"'
     Copy the characters in the string STR to the object file.  *Note
     Strings: Strings, for information on escape sequences you can use
     in `as' strings.

     _Warning!_ The HPPA version of `.string' differs from the usual
     `as' definition: it does _not_ write a zero byte after copying STR.

`.stringz "STR"'
     Like `.string', but appends a zero byte after copying STR to object
     file.

`.subspa NAME [ ,PARAMS ]'
`.nsubspa NAME [ ,PARAMS ]'
     Similar to `.space', but selects a subsection NAME within the
     current section.  You may only specify PARAMS when you create a
     subsection (in the first instance of `.subspa' for this NAME).

     If specified, the list PARAMS declares attributes of the
     subsection, identified by keywords.  The keywords recognized are
     `quad=EXPR' ("quadrant" for this subsection), `align=EXPR'
     (alignment for beginning of this subsection; a power of two),
     `access=EXPR' (value for "access rights" field), `sort=EXPR'
     (sorting order for this subspace in link), `code_only' (subsection
     contains only code), `unloadable' (subsection cannot be loaded
     into memory), `common' (subsection is common block), `dup_comm'
     (initialized data may have duplicate names), or `zero' (subsection
     is all zeros, do not write in object file).

     `.nsubspa' always creates a new subspace with the given name, even
     if one with the same name already exists.

`.version "STR"'
     Write STR as version identifier in object code.


File: m68k-rtems-as.info,  Node: HPPA Opcodes,  Prev: HPPA Directives,  Up: HPPA-Dependent

Opcodes
-------

For detailed information on the HPPA machine instruction set, see
`PA-RISC Architecture and Instruction Set Reference Manual' (HP
09740-90039).


File: m68k-rtems-as.info,  Node: ESA/390-Dependent,  Next: i386-Dependent,  Prev: HPPA-Dependent,  Up: Machine Dependencies

ESA/390 Dependent Features
==========================

* Menu:

* ESA/390 Notes::                Notes
* ESA/390 Options::              Options
* ESA/390 Syntax::               Syntax
* ESA/390 Floating Point::       Floating Point
* ESA/390 Directives::           ESA/390 Machine Directives
* ESA/390 Opcodes::              Opcodes


File: m68k-rtems-as.info,  Node: ESA/390 Notes,  Next: ESA/390 Options,  Up: ESA/390-Dependent

Notes
-----

The ESA/390 `as' port is currently intended to be a back-end for the
GNU CC compiler.  It is not HLASM compatible, although it does support
a subset of some of the HLASM directives.  The only supported binary
file format is ELF; none of the usual MVS/VM/OE/USS object file
formats, such as ESD or XSD, are supported.

   When used with the GNU CC compiler, the ESA/390 `as' will produce
correct, fully relocated, functional binaries, and has been used to
compile and execute large projects.  However, many aspects should still
be considered experimental; these include shared library support,
dynamically loadable objects, and any relocation other than the 31-bit
relocation.


File: m68k-rtems-as.info,  Node: ESA/390 Options,  Next: ESA/390 Syntax,  Prev: ESA/390 Notes,  Up: ESA/390-Dependent

Options
-------

`as' has no machine-dependent command-line options for the ESA/390.


File: m68k-rtems-as.info,  Node: ESA/390 Syntax,  Next: ESA/390 Floating Point,  Prev: ESA/390 Options,  Up: ESA/390-Dependent

Syntax
------

The opcode/operand syntax follows the ESA/390 Principles of Operation
manual; assembler directives and general syntax are loosely based on the
prevailing AT&T/SVR4/ELF/Solaris style notation.  HLASM-style directives
are _not_ supported for the most part, with the exception of those
described herein.

   A leading dot in front of directives is optional, and the case of
directives is ignored; thus for example, .using and USING have the same
effect.

   A colon may immediately follow a label definition.  This is simply
for compatibility with how most assembly language programmers write
code.

   `#' is the line comment character.

   `;' can be used instead of a newline to separate statements.

   Since `$' has no special meaning, you may use it in symbol names.

   Registers can be given the symbolic names r0..r15, fp0, fp2, fp4,
fp6.  By using thesse symbolic names, `as' can detect simple syntax
errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca for
r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base
for r3 and rpgt or r.pgt for r4.

   `*' is the current location counter.  Unlike `.' it is always
relative to the last USING directive.  Note that this means that
expressions cannot use multiplication, as any occurence of `*' will be
interpreted as a location counter.

   All labels are relative to the last USING.  Thus, branches to a label
always imply the use of base+displacement.

   Many of the usual forms of address constants / address literals are
supported.  Thus,
     	.using	*,r3
     	L	r15,=A(some_routine)
     	LM	r6,r7,=V(some_longlong_extern)
     	A	r1,=F'12'
     	AH	r0,=H'42'
     	ME	r6,=E'3.1416'
     	MD	r6,=D'3.14159265358979'
     	O	r6,=XL4'cacad0d0'
     	.ltorg
   should all behave as expected: that is, an entry in the literal pool
will be created (or reused if it already exists), and the instruction
operands will be the displacement into the literal pool using the
current base register (as last declared with the `.using' directive).


File: m68k-rtems-as.info,  Node: ESA/390 Floating Point,  Next: ESA/390 Directives,  Prev: ESA/390 Syntax,  Up: ESA/390-Dependent

Floating Point
--------------

The assembler generates only IEEE floating-point numbers.  The older
floiating point formats are not supported.


File: m68k-rtems-as.info,  Node: ESA/390 Directives,  Next: ESA/390 Opcodes,  Prev: ESA/390 Floating Point,  Up: ESA/390-Dependent

ESA/390 Assembler Directives
----------------------------

`as' for the ESA/390 supports all of the standard ELF/SVR4 assembler
directives that are documented in the main part of this documentation.
Several additional directives are supported in order to implement the
ESA/390 addressing model.  The most important of these are `.using' and
`.ltorg'

   These are the additional directives in `as' for the ESA/390:

`.dc'
     A small subset of the usual DC directive is supported.

`.drop REGNO'
     Stop using REGNO as the base register.  The REGNO must have been
     previously declared with a `.using' directive in the same section
     as the current section.

`.ebcdic STRING'
     Emit the EBCDIC equivalent of the indicated string.  The emitted
     string will be null terminated.  Note that the directives
     `.string' etc. emit ascii strings by default.

`EQU'
     The standard HLASM-style EQU directive is not supported; however,
     the standard `as' directive .equ can be used to the same effect.

`.ltorg'
     Dump the literal pool accumulated so far; begin a new literal pool.
     The literal pool will be written in the current section; in order
     to generate correct assembly, a `.using' must have been previously
     specified in the same section.

`.using EXPR,REGNO'
     Use REGNO as the base register for all subsequent RX, RS, and SS
     form instructions. The EXPR will be evaluated to obtain the base
     address; usually, EXPR will merely be `*'.

     This assembler allows two `.using' directives to be simultaneously
     outstanding, one in the `.text' section, and one in another section
     (typically, the `.data' section).  This feature allows dynamically
     loaded objects to be implemented in a relatively straightforward
     way.  A `.using' directive must always be specified in the `.text'
     section; this will specify the base register that will be used for
     branches in the `.text' section.  A second `.using' may be
     specified in another section; this will specify the base register
     that is used for non-label address literals.  When a second
     `.using' is specified, then the subsequent `.ltorg' must be put in
     the same section; otherwise an error will result.

     Thus, for example, the following code uses `r3' to address branch
     targets and `r4' to address the literal pool, which has been
     written to the `.data' section.  The is, the constants
     `=A(some_routine)', `=H'42'' and `=E'3.1416'' will all appear in
     the `.data' section.

          .data
          	.using  LITPOOL,r4
          .text
          	BASR	r3,0
          	.using	*,r3
                  B       START
          	.long	LITPOOL
          START:
          	L	r4,4(,r3)
          	L	r15,=A(some_routine)
          	LTR	r15,r15
          	BNE	LABEL
          	AH	r0,=H'42'
          LABEL:
          	ME	r6,=E'3.1416'
          .data
          LITPOOL:
          	.ltorg

     Note that this dual-`.using' directive semantics extends and is
     not compatible with HLASM semantics.  Note that this assembler
     directive does not support the full range of HLASM semantics.



File: m68k-rtems-as.info,  Node: ESA/390 Opcodes,  Prev: ESA/390 Directives,  Up: ESA/390-Dependent

Opcodes
-------

For detailed information on the ESA/390 machine instruction set, see
`ESA/390 Principles of Operation' (IBM Publication Number DZ9AR004).


File: m68k-rtems-as.info,  Node: i386-Dependent,  Next: i860-Dependent,  Prev: ESA/390-Dependent,  Up: Machine Dependencies

80386 Dependent Features
========================

   The i386 version `as' supports both the original Intel 386
architecture in both 16 and 32-bit mode as well as AMD x86-64
architecture extending the Intel architecture to 64-bits.

* Menu:

* i386-Options::                Options
* i386-Syntax::                 AT&T Syntax versus Intel Syntax
* i386-Mnemonics::              Instruction Naming
* i386-Regs::                   Register Naming
* i386-Prefixes::               Instruction Prefixes
* i386-Memory::                 Memory References
* i386-Jumps::                  Handling of Jump Instructions
* i386-Float::                  Floating Point
* i386-SIMD::                   Intel's MMX and AMD's 3DNow! SIMD Operations
* i386-16bit::                  Writing 16-bit Code
* i386-Arch::                   Specifying an x86 CPU architecture
* i386-Bugs::                   AT&T Syntax bugs
* i386-Notes::                  Notes


File: m68k-rtems-as.info,  Node: i386-Options,  Next: i386-Syntax,  Up: i386-Dependent

Options
-------

The i386 version of `as' has a few machine dependent options:

`--32 | --64'
     Select the word size, either 32 bits or 64 bits. Selecting 32-bit
     implies Intel i386 architecture, while 64-bit implies AMD x86-64
     architecture.

     These options are only available with the ELF object file format,
     and require that the necessary BFD support has been included (on a
     32-bit platform you have to add -enable-64-bit-bfd to configure
     enable 64-bit usage and use x86-64 as target platform).


File: m68k-rtems-as.info,  Node: i386-Syntax,  Next: i386-Mnemonics,  Prev: i386-Options,  Up: i386-Dependent

AT&T Syntax versus Intel Syntax
-------------------------------

`as' now supports assembly using Intel assembler syntax.
`.intel_syntax' selects Intel mode, and `.att_syntax' switches back to
the usual AT&T mode for compatibility with the output of `gcc'.  Either
of these directives may have an optional argument, `prefix', or
`noprefix' specifying whether registers require a `%' prefix.  AT&T
System V/386 assembler syntax is quite different from Intel syntax.  We
mention these differences because almost all 80386 documents use Intel
syntax.  Notable differences between the two syntaxes are:

   * AT&T immediate operands are preceded by `$'; Intel immediate
     operands are undelimited (Intel `push 4' is AT&T `pushl $4').
     AT&T register operands are preceded by `%'; Intel register operands
     are undelimited.  AT&T absolute (as opposed to PC relative)
     jump/call operands are prefixed by `*'; they are undelimited in
     Intel syntax.

   * AT&T and Intel syntax use the opposite order for source and
     destination operands.  Intel `add eax, 4' is `addl $4, %eax'.  The
     `source, dest' convention is maintained for compatibility with
     previous Unix assemblers.  Note that instructions with more than
     one source operand, such as the `enter' instruction, do _not_ have
     reversed order.  *Note i386-Bugs::.

   * In AT&T syntax the size of memory operands is determined from the
     last character of the instruction mnemonic.  Mnemonic suffixes of
     `b', `w', `l' and `q' specify byte (8-bit), word (16-bit), long
     (32-bit) and quadruple word (64-bit) memory references.  Intel
     syntax accomplishes this by prefixing memory operands (_not_ the
     instruction mnemonics) with `byte ptr', `word ptr', `dword ptr'
     and `qword ptr'.  Thus, Intel `mov al, byte ptr FOO' is `movb FOO,
     %al' in AT&T syntax.

   * Immediate form long jumps and calls are `lcall/ljmp $SECTION,
     $OFFSET' in AT&T syntax; the Intel syntax is `call/jmp far
     SECTION:OFFSET'.  Also, the far return instruction is `lret
     $STACK-ADJUST' in AT&T syntax; Intel syntax is `ret far
     STACK-ADJUST'.

   * The AT&T assembler does not provide support for multiple section
     programs.  Unix style systems expect all programs to be single
     sections.


File: m68k-rtems-as.info,  Node: i386-Mnemonics,  Next: i386-Regs,  Prev: i386-Syntax,  Up: i386-Dependent

Instruction Naming
------------------

Instruction mnemonics are suffixed with one character modifiers which
specify the size of operands.  The letters `b', `w', `l' and `q'
specify byte, word, long and quadruple word operands.  If no suffix is
specified by an instruction then `as' tries to fill in the missing
suffix based on the destination register operand (the last one by
convention).  Thus, `mov %ax, %bx' is equivalent to `movw %ax, %bx';
also, `mov $1, %bx' is equivalent to `movw $1, bx'.  Note that this is
incompatible with the AT&T Unix assembler which assumes that a missing
mnemonic suffix implies long operand size.  (This incompatibility does
not affect compiler output since compilers always explicitly specify
the mnemonic suffix.)

   Almost all instructions have the same names in AT&T and Intel format.
There are a few exceptions.  The sign extend and zero extend
instructions need two sizes to specify them.  They need a size to
sign/zero extend _from_ and a size to zero extend _to_.  This is
accomplished by using two instruction mnemonic suffixes in AT&T syntax.
Base names for sign extend and zero extend are `movs...' and `movz...'
in AT&T syntax (`movsx' and `movzx' in Intel syntax).  The instruction
mnemonic suffixes are tacked on to this base name, the _from_ suffix
before the _to_ suffix.  Thus, `movsbl %al, %edx' is AT&T syntax for
"move sign extend _from_ %al _to_ %edx."  Possible suffixes, thus, are
`bl' (from byte to long), `bw' (from byte to word), `wl' (from word to
long), `bq' (from byte to quadruple word), `wq' (from word to quadruple
word), and `lq' (from long to quadruple word).

   The Intel-syntax conversion instructions

   * `cbw' -- sign-extend byte in `%al' to word in `%ax',

   * `cwde' -- sign-extend word in `%ax' to long in `%eax',

   * `cwd' -- sign-extend word in `%ax' to long in `%dx:%ax',

   * `cdq' -- sign-extend dword in `%eax' to quad in `%edx:%eax',

   * `cdqe' -- sign-extend dword in `%eax' to quad in `%rax' (x86-64
     only),

   * `cdo' -- sign-extend quad in `%rax' to octuple in `%rdx:%rax'
     (x86-64 only),

are called `cbtw', `cwtl', `cwtd', `cltd', `cltq', and `cqto' in AT&T
naming.  `as' accepts either naming for these instructions.

   Far call/jump instructions are `lcall' and `ljmp' in AT&T syntax,
but are `call far' and `jump far' in Intel convention.


File: m68k-rtems-as.info,  Node: i386-Regs,  Next: i386-Prefixes,  Prev: i386-Mnemonics,  Up: i386-Dependent

Register Naming
---------------

Register operands are always prefixed with `%'.  The 80386 registers
consist of

   * the 8 32-bit registers `%eax' (the accumulator), `%ebx', `%ecx',
     `%edx', `%edi', `%esi', `%ebp' (the frame pointer), and `%esp'
     (the stack pointer).

   * the 8 16-bit low-ends of these: `%ax', `%bx', `%cx', `%dx', `%di',
     `%si', `%bp', and `%sp'.

   * the 8 8-bit registers: `%ah', `%al', `%bh', `%bl', `%ch', `%cl',
     `%dh', and `%dl' (These are the high-bytes and low-bytes of `%ax',
     `%bx', `%cx', and `%dx')

   * the 6 section registers `%cs' (code section), `%ds' (data
     section), `%ss' (stack section), `%es', `%fs', and `%gs'.

   * the 3 processor control registers `%cr0', `%cr2', and `%cr3'.

   * the 6 debug registers `%db0', `%db1', `%db2', `%db3', `%db6', and
     `%db7'.

   * the 2 test registers `%tr6' and `%tr7'.

   * the 8 floating point register stack `%st' or equivalently
     `%st(0)', `%st(1)', `%st(2)', `%st(3)', `%st(4)', `%st(5)',
     `%st(6)', and `%st(7)'.  These registers are overloaded by 8 MMX
     registers `%mm0', `%mm1', `%mm2', `%mm3', `%mm4', `%mm5', `%mm6'
     and `%mm7'.

   * the 8 SSE registers registers `%xmm0', `%xmm1', `%xmm2', `%xmm3',
     `%xmm4', `%xmm5', `%xmm6' and `%xmm7'.

   The AMD x86-64 architecture extends the register set by:

   * enhancing the 8 32-bit registers to 64-bit: `%rax' (the
     accumulator), `%rbx', `%rcx', `%rdx', `%rdi', `%rsi', `%rbp' (the
     frame pointer), `%rsp' (the stack pointer)

   * the 8 extended registers `%r8'-`%r15'.

   * the 8 32-bit low ends of the extended registers: `%r8d'-`%r15d'

   * the 8 16-bit low ends of the extended registers: `%r8w'-`%r15w'

   * the 8 8-bit low ends of the extended registers: `%r8b'-`%r15b'

   * the 4 8-bit registers: `%sil', `%dil', `%bpl', `%spl'.

   * the 8 debug registers: `%db8'-`%db15'.

   * the 8 SSE registers: `%xmm8'-`%xmm15'.


File: m68k-rtems-as.info,  Node: i386-Prefixes,  Next: i386-Memory,  Prev: i386-Regs,  Up: i386-Dependent

Instruction Prefixes
--------------------

Instruction prefixes are used to modify the following instruction.  They
are used to repeat string instructions, to provide section overrides, to
perform bus lock operations, and to change operand and address sizes.
(Most instructions that normally operate on 32-bit operands will use
16-bit operands if the instruction has an "operand size" prefix.)
Instruction prefixes are best written on the same line as the
instruction they act upon. For example, the `scas' (scan string)
instruction is repeated with:

             repne scas %es:(%edi),%al

   You may also place prefixes on the lines immediately preceding the
instruction, but this circumvents checks that `as' does with prefixes,
and will not work with all prefixes.

   Here is a list of instruction prefixes:

   * Section override prefixes `cs', `ds', `ss', `es', `fs', `gs'.
     These are automatically added by specifying using the
     SECTION:MEMORY-OPERAND form for memory references.

   * Operand/Address size prefixes `data16' and `addr16' change 32-bit
     operands/addresses into 16-bit operands/addresses, while `data32'
     and `addr32' change 16-bit ones (in a `.code16' section) into
     32-bit operands/addresses.  These prefixes _must_ appear on the
     same line of code as the instruction they modify. For example, in
     a 16-bit `.code16' section, you might write:

                  addr32 jmpl *(%ebx)

   * The bus lock prefix `lock' inhibits interrupts during execution of
     the instruction it precedes.  (This is only valid with certain
     instructions; see a 80386 manual for details).

   * The wait for coprocessor prefix `wait' waits for the coprocessor to
     complete the current instruction.  This should never be needed for
     the 80386/80387 combination.

   * The `rep', `repe', and `repne' prefixes are added to string
     instructions to make them repeat `%ecx' times (`%cx' times if the
     current address size is 16-bits).

   * The `rex' family of prefixes is used by x86-64 to encode
     extensions to i386 instruction set.  The `rex' prefix has four
     bits -- an operand size overwrite (`64') used to change operand
     size from 32-bit to 64-bit and X, Y and Z extensions bits used to
     extend the register set.

     You may write the `rex' prefixes directly. The `rex64xyz'
     instruction emits `rex' prefix with all the bits set.  By omitting
     the `64', `x', `y' or `z' you may write other prefixes as well.
     Normally, there is no need to write the prefixes explicitly, since
     gas will automatically generate them based on the instruction
     operands.


File: m68k-rtems-as.info,  Node: i386-Memory,  Next: i386-Jumps,  Prev: i386-Prefixes,  Up: i386-Dependent

Memory References
-----------------

An Intel syntax indirect memory reference of the form

     SECTION:[BASE + INDEX*SCALE + DISP]

is translated into the AT&T syntax

     SECTION:DISP(BASE, INDEX, SCALE)

where BASE and INDEX are the optional 32-bit base and index registers,
DISP is the optional displacement, and SCALE, taking the values 1, 2,
4, and 8, multiplies INDEX to calculate the address of the operand.  If
no SCALE is specified, SCALE is taken to be 1.  SECTION specifies the
optional section register for the memory operand, and may override the
default section register (see a 80386 manual for section register
defaults). Note that section overrides in AT&T syntax _must_ be
preceded by a `%'.  If you specify a section override which coincides
with the default section register, `as' does _not_ output any section
register override prefixes to assemble the given instruction.  Thus,
section overrides can be specified to emphasize which section register
is used for a given memory operand.

   Here are some examples of Intel and AT&T style memory references:

AT&T: `-4(%ebp)', Intel:  `[ebp - 4]'
     BASE is `%ebp'; DISP is `-4'. SECTION is missing, and the default
     section is used (`%ss' for addressing with `%ebp' as the base
     register).  INDEX, SCALE are both missing.

AT&T: `foo(,%eax,4)', Intel: `[foo + eax*4]'
     INDEX is `%eax' (scaled by a SCALE 4); DISP is `foo'.  All other
     fields are missing.  The section register here defaults to `%ds'.

AT&T: `foo(,1)'; Intel `[foo]'
     This uses the value pointed to by `foo' as a memory operand.  Note
     that BASE and INDEX are both missing, but there is only _one_ `,'.
     This is a syntactic exception.

AT&T: `%gs:foo'; Intel `gs:foo'
     This selects the contents of the variable `foo' with section
     register SECTION being `%gs'.

   Absolute (as opposed to PC relative) call and jump operands must be
prefixed with `*'.  If no `*' is specified, `as' always chooses PC
relative addressing for jump/call labels.

   Any instruction that has a memory operand, but no register operand,
_must_ specify its size (byte, word, long, or quadruple) with an
instruction mnemonic suffix (`b', `w', `l' or `q', respectively).

   The x86-64 architecture adds an RIP (instruction pointer relative)
addressing.  This addressing mode is specified by using `rip' as a base
register.  Only constant offsets are valid. For example:

AT&T: `1234(%rip)', Intel: `[rip + 1234]'
     Points to the address 1234 bytes past the end of the current
     instruction.

AT&T: `symbol(%rip)', Intel: `[rip + symbol]'
     Points to the `symbol' in RIP relative way, this is shorter than
     the default absolute addressing.

   Other addressing modes remain unchanged in x86-64 architecture,
except registers used are 64-bit instead of 32-bit.


File: m68k-rtems-as.info,  Node: i386-Jumps,  Next: i386-Float,  Prev: i386-Memory,  Up: i386-Dependent

Handling of Jump Instructions
-----------------------------

Jump instructions are always optimized to use the smallest possible
displacements.  This is accomplished by using byte (8-bit) displacement
jumps whenever the target is sufficiently close.  If a byte displacement
is insufficient a long displacement is used.  We do not support word
(16-bit) displacement jumps in 32-bit mode (i.e. prefixing the jump
instruction with the `data16' instruction prefix), since the 80386
insists upon masking `%eip' to 16 bits after the word displacement is
added. (See also *note i386-Arch::)

   Note that the `jcxz', `jecxz', `loop', `loopz', `loope', `loopnz'
and `loopne' instructions only come in byte displacements, so that if
you use these instructions (`gcc' does not use them) you may get an
error message (and incorrect code).  The AT&T 80386 assembler tries to
get around this problem by expanding `jcxz foo' to

              jcxz cx_zero
              jmp cx_nonzero
     cx_zero: jmp foo
     cx_nonzero:


File: m68k-rtems-as.info,  Node: i386-Float,  Next: i386-SIMD,  Prev: i386-Jumps,  Up: i386-Dependent

Floating Point
--------------

All 80387 floating point types except packed BCD are supported.  (BCD
support may be added without much difficulty).  These data types are
16-, 32-, and 64- bit integers, and single (32-bit), double (64-bit),
and extended (80-bit) precision floating point.  Each supported type
has an instruction mnemonic suffix and a constructor associated with
it.  Instruction mnemonic suffixes specify the operand's data type.
Constructors build these data types into memory.

   * Floating point constructors are `.float' or `.single', `.double',
     and `.tfloat' for 32-, 64-, and 80-bit formats.  These correspond
     to instruction mnemonic suffixes `s', `l', and `t'. `t' stands for
     80-bit (ten byte) real.  The 80387 only supports this format via
     the `fldt' (load 80-bit real to stack top) and `fstpt' (store
     80-bit real and pop stack) instructions.

   * Integer constructors are `.word', `.long' or `.int', and `.quad'
     for the 16-, 32-, and 64-bit integer formats.  The corresponding
     instruction mnemonic suffixes are `s' (single), `l' (long), and
     `q' (quad).  As with the 80-bit real format, the 64-bit `q' format
     is only present in the `fildq' (load quad integer to stack top)
     and `fistpq' (store quad integer and pop stack) instructions.

   Register to register operations should not use instruction mnemonic
suffixes.  `fstl %st, %st(1)' will give a warning, and be assembled as
if you wrote `fst %st, %st(1)', since all register to register
operations use 80-bit floating point operands. (Contrast this with
`fstl %st, mem', which converts `%st' from 80-bit to 64-bit floating
point format, then stores the result in the 4 byte location `mem')


File: m68k-rtems-as.info,  Node: i386-SIMD,  Next: i386-16bit,  Prev: i386-Float,  Up: i386-Dependent

Intel's MMX and AMD's 3DNow! SIMD Operations
--------------------------------------------

`as' supports Intel's MMX instruction set (SIMD instructions for
integer data), available on Intel's Pentium MMX processors and Pentium
II processors, AMD's K6 and K6-2 processors, Cyrix' M2 processor, and
probably others.  It also supports AMD's 3DNow!  instruction set (SIMD
instructions for 32-bit floating point data) available on AMD's K6-2
processor and possibly others in the future.

   Currently, `as' does not support Intel's floating point SIMD, Katmai
(KNI).

   The eight 64-bit MMX operands, also used by 3DNow!, are called
`%mm0', `%mm1', ... `%mm7'.  They contain eight 8-bit integers, four
16-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit
floating point values.  The MMX registers cannot be used at the same
time as the floating point stack.

   See Intel and AMD documentation, keeping in mind that the operand
order in instructions is reversed from the Intel syntax.


File: m68k-rtems-as.info,  Node: i386-16bit,  Next: i386-Arch,  Prev: i386-SIMD,  Up: i386-Dependent

Writing 16-bit Code
-------------------

While `as' normally writes only "pure" 32-bit i386 code or 64-bit
x86-64 code depending on the default configuration, it also supports
writing code to run in real mode or in 16-bit protected mode code
segments.  To do this, put a `.code16' or `.code16gcc' directive before
the assembly language instructions to be run in 16-bit mode.  You can
switch `as' back to writing normal 32-bit code with the `.code32'
directive.

   `.code16gcc' provides experimental support for generating 16-bit
code from gcc, and differs from `.code16' in that `call', `ret',
`enter', `leave', `push', `pop', `pusha', `popa', `pushf', and `popf'
instructions default to 32-bit size.  This is so that the stack pointer
is manipulated in the same way over function calls, allowing access to
function parameters at the same stack offsets as in 32-bit mode.
`.code16gcc' also automatically adds address size prefixes where
necessary to use the 32-bit addressing modes that gcc generates.

   The code which `as' generates in 16-bit mode will not necessarily
run on a 16-bit pre-80386 processor.  To write code that runs on such a
processor, you must refrain from using _any_ 32-bit constructs which
require `as' to output address or operand size prefixes.

   Note that writing 16-bit code instructions by explicitly specifying a
prefix or an instruction mnemonic suffix within a 32-bit code section
generates different machine instructions than those generated for a
16-bit code segment.  In a 32-bit code section, the following code
generates the machine opcode bytes `66 6a 04', which pushes the value
`4' onto the stack, decrementing `%esp' by 2.

             pushw $4

   The same code in a 16-bit code section would generate the machine
opcode bytes `6a 04' (ie. without the operand size prefix), which is
correct since the processor default operand size is assumed to be 16
bits in a 16-bit code section.


File: m68k-rtems-as.info,  Node: i386-Bugs,  Next: i386-Notes,  Prev: i386-Arch,  Up: i386-Dependent

AT&T Syntax bugs
----------------

The UnixWare assembler, and probably other AT&T derived ix86 Unix
assemblers, generate floating point instructions with reversed source
and destination registers in certain cases.  Unfortunately, gcc and
possibly many other programs use this reversed syntax, so we're stuck
with it.

   For example

             fsub %st,%st(3)

results in `%st(3)' being updated to `%st - %st(3)' rather than the
expected `%st(3) - %st'.  This happens with all the non-commutative
arithmetic floating point operations with two register operands where
the source register is `%st' and the destination register is `%st(i)'.


File: m68k-rtems-as.info,  Node: i386-Arch,  Next: i386-Bugs,  Prev: i386-16bit,  Up: i386-Dependent

Specifying CPU Architecture
---------------------------

`as' may be told to assemble for a particular CPU architecture with the
`.arch CPU_TYPE' directive.  This directive enables a warning when gas
detects an instruction that is not supported on the CPU specified.  The
choices for CPU_TYPE are:

`i8086'        `i186'         `i286'         `i386'
`i486'         `i586'         `i686'         `pentium'
`pentiumpro'   `pentium4'     `k6'           `athlon'
`sledgehammer'                               

   Apart from the warning, there are only two other effects on `as'
operation;  Firstly, if you specify a CPU other than `i486', then shift
by one instructions such as `sarl $1, %eax' will automatically use a
two byte opcode sequence.  The larger three byte opcode sequence is
used on the 486 (and when no architecture is specified) because it
executes faster on the 486.  Note that you can explicitly request the
two byte opcode by writing `sarl %eax'.  Secondly, if you specify
`i8086', `i186', or `i286', _and_ `.code16' or `.code16gcc' then byte
offset conditional jumps will be promoted when necessary to a two
instruction sequence consisting of a conditional jump of the opposite
sense around an unconditional jump to the target.

   Following the CPU architecture, you may specify `jumps' or `nojumps'
to control automatic promotion of conditional jumps.  `jumps' is the
default, and enables jump promotion;  All external jumps will be of the
long variety, and file-local jumps will be promoted as necessary.
(*note i386-Jumps::)  `nojumps' leaves external conditional jumps as
byte offset jumps, and warns about file-local conditional jumps that
`as' promotes.  Unconditional jumps are treated as for `jumps'.

   For example

      .arch i8086,nojumps


File: m68k-rtems-as.info,  Node: i386-Notes,  Prev: i386-Bugs,  Up: i386-Dependent

Notes
-----

There is some trickery concerning the `mul' and `imul' instructions
that deserves mention.  The 16-, 32-, 64- and 128-bit expanding
multiplies (base opcode `0xf6'; extension 4 for `mul' and 5 for `imul')
can be output only in the one operand form.  Thus, `imul %ebx, %eax'
does _not_ select the expanding multiply; the expanding multiply would
clobber the `%edx' register, and this would confuse `gcc' output.  Use
`imul %ebx' to get the 64-bit product in `%edx:%eax'.

   We have added a two operand form of `imul' when the first operand is
an immediate mode expression and the second operand is a register.
This is just a shorthand, so that, multiplying `%eax' by 69, for
example, can be done with `imul $69, %eax' rather than `imul $69, %eax,
%eax'.


File: m68k-rtems-as.info,  Node: i860-Dependent,  Next: i960-Dependent,  Prev: i386-Dependent,  Up: Machine Dependencies

Intel i860 Dependent Features
=============================

* Menu:

* Notes-i860::                  i860 Notes
* Options-i860::                i860 Command-line Options
* Directives-i860::             i860 Machine Directives
* Opcodes for i860::            i860 Opcodes


File: m68k-rtems-as.info,  Node: Notes-i860,  Next: Options-i860,  Up: i860-Dependent

i860 Notes
----------

This is a fairly complete i860 assembler which is compatible with the
UNIX System V/860 Release 4 assembler. However, it does not currently
support SVR4 PIC (i.e., `@GOT, @GOTOFF, @PLT').

   Like the SVR4/860 assembler, the output object format is ELF32.
Currently, this is the only supported object format. If there is
sufficient interest, other formats such as COFF may be implemented.


File: m68k-rtems-as.info,  Node: Options-i860,  Next: Directives-i860,  Prev: Notes-i860,  Up: i860-Dependent

i860 Command-line Options
-------------------------

SVR4 compatibility options
..........................

`-V'
     Print assembler version.

`-Qy'
     Ignored.

`-Qn'
     Ignored.

Other options
.............

`-EL'
     Select little endian output (this is the default).

`-EB'
     Select big endian output. Note that the i860 always reads
     instructions as little endian data, so this option only effects
     data and not instructions.

`-mwarn-expand'
     Emit a warning message if any pseudo-instruction expansions
     occurred.  For example, a `or' instruction with an immediate
     larger than 16-bits will be expanded into two instructions. This
     is a very undesirable feature to rely on, so this flag can help
     detect any code where it happens. One use of it, for instance, has
     been to find and eliminate any place where `gcc' may emit these
     pseudo-instructions.


File: m68k-rtems-as.info,  Node: Directives-i860,  Next: Opcodes for i860,  Prev: Options-i860,  Up: i860-Dependent

i860 Machine Directives
-----------------------

`.dual'
     Enter dual instruction mode. While this directive is supported, the
     preferred way to use dual instruction mode is to explicitly code
     the dual bit with the `d.' prefix.

`.enddual'
     Exit dual instruction mode. While this directive is supported, the
     preferred way to use dual instruction mode is to explicitly code
     the dual bit with the `d.' prefix.

`.atmp'
     Change the temporary register used when expanding pseudo
     operations. The default register is `r31'.


File: m68k-rtems-as.info,  Node: Opcodes for i860,  Prev: Directives-i860,  Up: i860-Dependent

i860 Opcodes
------------

All of the Intel i860 machine instructions are supported. Please see
either _i860 Microprocessor Programmer's Reference Manual_ or _i860
Microprocessor Architecture_ for more information.

Other instruction support (pseudo-instructions)
...............................................

For compatibility with some other i860 assemblers, a number of
pseudo-instructions are supported. While these are supported, they are
a very undesirable feature that should be avoided - in particular, when
they result in an expansion to multiple actual i860 instructions. Below
are the pseudo-instructions that result in expansions.
   * Load large immediate into general register:

     The pseudo-instruction `mov imm,%rn' (where the immediate does not
     fit within a signed 16-bit field) will be expanded into:
          orh large_imm@h,%r0,%rn
          or large_imm@l,%rn,%rn

   * Load/store with relocatable address expression:

     For example, the pseudo-instruction `ld.b addr,%rn' will be
     expanded into:
          orh addr_exp@ha,%r0,%r31
          ld.l addr_exp@l(%r31),%rn

     The analogous expansions apply to `ld.x, st.x, fld.x, pfld.x,
     fst.x', and `pst.x' as well.

   * Signed large immediate with add/subtract:

     If any of the arithmetic operations `adds, addu, subs, subu' are
     used with an immediate larger than 16-bits (signed), then they
     will be expanded.  For instance, the pseudo-instruction `adds
     large_imm,%rx,%rn' expands to:
          orh large_imm@h,%r0,%r31
          or large_imm@l,%r31,%r31
          adds %r31,%rx,%rn

   * Unsigned large immediate with logical operations:

     Logical operations (`or, andnot, or, xor') also result in
     expansions.  The pseudo-instruction `or large_imm,%rx,%rn' results
     in:
          orh large_imm@h,%rx,%r31
          or large_imm@l,%r31,%rn

     Similarly for the others, except for `and' which expands to:
          andnot (-1 - large_imm)@h,%rx,%r31
          andnot (-1 - large_imm)@l,%r31,%rn


File: m68k-rtems-as.info,  Node: i960-Dependent,  Next: M32R-Dependent,  Prev: i860-Dependent,  Up: Machine Dependencies

Intel 80960 Dependent Features
==============================

* Menu:

* Options-i960::                i960 Command-line Options
* Floating Point-i960::         Floating Point
* Directives-i960::             i960 Machine Directives
* Opcodes for i960::            i960 Opcodes


File: m68k-rtems-as.info,  Node: Options-i960,  Next: Floating Point-i960,  Up: i960-Dependent

i960 Command-line Options
-------------------------

`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC'
     Select the 80960 architecture.  Instructions or features not
     supported by the selected architecture cause fatal errors.

     `-ACA' is equivalent to `-ACA_A'; `-AKC' is equivalent to `-AMC'.
     Synonyms are provided for compatibility with other tools.

     If you do not specify any of these options, `as' generates code
     for any instruction or feature that is supported by _some_ version
     of the 960 (even if this means mixing architectures!).  In
     principle, `as' attempts to deduce the minimal sufficient
     processor type if none is specified; depending on the object code
     format, the processor type may be recorded in the object file.  If
     it is critical that the `as' output match a specific architecture,
     specify that architecture explicitly.

`-b'
     Add code to collect information about conditional branches taken,
     for later optimization using branch prediction bits.  (The
     conditional branch instructions have branch prediction bits in the
     CA, CB, and CC architectures.)  If BR represents a conditional
     branch instruction, the following represents the code generated by
     the assembler when `-b' is specified:

                  call    INCREMENT ROUTINE
                  .word   0       # pre-counter
          Label:  BR
                  call    INCREMENT ROUTINE
                  .word   0       # post-counter

     The counter following a branch records the number of times that
     branch was _not_ taken; the differenc between the two counters is
     the number of times the branch _was_ taken.

     A table of every such `Label' is also generated, so that the
     external postprocessor `gbr960' (supplied by Intel) can locate all
     the counters.  This table is always labelled `__BRANCH_TABLE__';
     this is a local symbol to permit collecting statistics for many
     separate object files.  The table is word aligned, and begins with
     a two-word header.  The first word, initialized to 0, is used in
     maintaining linked lists of branch tables.  The second word is a
     count of the number of entries in the table, which follow
     immediately: each is a word, pointing to one of the labels
     illustrated above.

           +------------+------------+------------+ ... +------------+
           |            |            |            |     |            |
           |  *NEXT     |  COUNT: N  | *BRLAB 1   |     | *BRLAB N   |
           |            |            |            |     |            |
           +------------+------------+------------+ ... +------------+
          
                         __BRANCH_TABLE__ layout

     The first word of the header is used to locate multiple branch
     tables, since each object file may contain one. Normally the links
     are maintained with a call to an initialization routine, placed at
     the beginning of each function in the file.  The GNU C compiler
     generates these calls automatically when you give it a `-b' option.
     For further details, see the documentation of `gbr960'.

`-no-relax'
     Normally, Compare-and-Branch instructions with targets that require
     displacements greater than 13 bits (or that have external targets)
     are replaced with the corresponding compare (or `chkbit') and
     branch instructions.  You can use the `-no-relax' option to
     specify that `as' should generate errors instead, if the target
     displacement is larger than 13 bits.

     This option does not affect the Compare-and-Jump instructions; the
     code emitted for them is _always_ adjusted when necessary
     (depending on displacement size), regardless of whether you use
     `-no-relax'.


File: m68k-rtems-as.info,  Node: Floating Point-i960,  Next: Directives-i960,  Prev: Options-i960,  Up: i960-Dependent

Floating Point
--------------

`as' generates IEEE floating-point numbers for the directives `.float',
`.double', `.extended', and `.single'.


File: m68k-rtems-as.info,  Node: Directives-i960,  Next: Opcodes for i960,  Prev: Floating Point-i960,  Up: i960-Dependent

i960 Machine Directives
-----------------------

`.bss SYMBOL, LENGTH, ALIGN'
     Reserve LENGTH bytes in the bss section for a local SYMBOL,
     aligned to the power of two specified by ALIGN.  LENGTH and ALIGN
     must be positive absolute expressions.  This directive differs
     from `.lcomm' only in that it permits you to specify an alignment.
     *Note `.lcomm': Lcomm.

`.extended FLONUMS'
     `.extended' expects zero or more flonums, separated by commas; for
     each flonum, `.extended' emits an IEEE extended-format (80-bit)
     floating-point number.

`.leafproc CALL-LAB, BAL-LAB'
     You can use the `.leafproc' directive in conjunction with the
     optimized `callj' instruction to enable faster calls of leaf
     procedures.  If a procedure is known to call no other procedures,
     you may define an entry point that skips procedure prolog code
     (and that does not depend on system-supplied saved context), and
     declare it as the BAL-LAB using `.leafproc'.  If the procedure
     also has an entry point that goes through the normal prolog, you
     can specify that entry point as CALL-LAB.

     A `.leafproc' declaration is meant for use in conjunction with the
     optimized call instruction `callj'; the directive records the data
     needed later to choose between converting the `callj' into a `bal'
     or a `call'.

     CALL-LAB is optional; if only one argument is present, or if the
     two arguments are identical, the single argument is assumed to be
     the `bal' entry point.

`.sysproc NAME, INDEX'
     The `.sysproc' directive defines a name for a system procedure.
     After you define it using `.sysproc', you can use NAME to refer to
     the system procedure identified by INDEX when calling procedures
     with the optimized call instruction `callj'.

     Both arguments are required; INDEX must be between 0 and 31
     (inclusive).


File: m68k-rtems-as.info,  Node: Opcodes for i960,  Prev: Directives-i960,  Up: i960-Dependent

i960 Opcodes
------------

All Intel 960 machine instructions are supported; *note i960
Command-line Options: Options-i960. for a discussion of selecting the
instruction subset for a particular 960 architecture.

   Some opcodes are processed beyond simply emitting a single
corresponding instruction: `callj', and Compare-and-Branch or
Compare-and-Jump instructions with target displacements larger than 13
bits.

* Menu:

* callj-i960::                  `callj'
* Compare-and-branch-i960::     Compare-and-Branch


File: m68k-rtems-as.info,  Node: callj-i960,  Next: Compare-and-branch-i960,  Up: Opcodes for i960

`callj'
.......

You can write `callj' to have the assembler or the linker determine the
most appropriate form of subroutine call: `call', `bal', or `calls'.
If the assembly source contains enough information--a `.leafproc' or
`.sysproc' directive defining the operand--then `as' translates the
`callj'; if not, it simply emits the `callj', leaving it for the linker
to resolve.


File: m68k-rtems-as.info,  Node: Compare-and-branch-i960,  Prev: callj-i960,  Up: Opcodes for i960

Compare-and-Branch
..................

The 960 architectures provide combined Compare-and-Branch instructions
that permit you to store the branch target in the lower 13 bits of the
instruction word itself.  However, if you specify a branch target far
enough away that its address won't fit in 13 bits, the assembler can
either issue an error, or convert your Compare-and-Branch instruction
into separate instructions to do the compare and the branch.

   Whether `as' gives an error or expands the instruction depends on
two choices you can make: whether you use the `-no-relax' option, and
whether you use a "Compare and Branch" instruction or a "Compare and
Jump" instruction.  The "Jump" instructions are _always_ expanded if
necessary; the "Branch" instructions are expanded when necessary
_unless_ you specify `-no-relax'--in which case `as' gives an error
instead.

   These are the Compare-and-Branch instructions, their "Jump" variants,
and the instruction pairs they may expand into:

             Compare and
          Branch      Jump       Expanded to
          ------    ------       ------------
             bbc                 chkbit; bno
             bbs                 chkbit; bo
          cmpibe    cmpije       cmpi; be
          cmpibg    cmpijg       cmpi; bg
         cmpibge   cmpijge       cmpi; bge
          cmpibl    cmpijl       cmpi; bl
         cmpible   cmpijle       cmpi; ble
         cmpibno   cmpijno       cmpi; bno
         cmpibne   cmpijne       cmpi; bne
          cmpibo    cmpijo       cmpi; bo
          cmpobe    cmpoje       cmpo; be
          cmpobg    cmpojg       cmpo; bg
         cmpobge   cmpojge       cmpo; bge
          cmpobl    cmpojl       cmpo; bl
         cmpoble   cmpojle       cmpo; ble
         cmpobne   cmpojne       cmpo; bne


File: m68k-rtems-as.info,  Node: M32R-Dependent,  Next: M68K-Dependent,  Prev: i960-Dependent,  Up: Machine Dependencies

M32R Dependent Features
=======================

* Menu:

* M32R-Opts::                   M32R Options
* M32R-Warnings::               M32R Warnings


File: m68k-rtems-as.info,  Node: M32R-Opts,  Next: M32R-Warnings,  Up: M32R-Dependent

M32R Options
------------

The Mitsubishi M32R version of `as' has a few machine dependent options:

`-m32rx'
     `as' can assemble code for several different members of the
     Mitsubishi M32R family.  Normally the default is to assemble code
     for the M32R microprocessor.  This option may be used to change
     the default to the M32RX microprocessor, which adds some more
     instructions to the basic M32R instruction set, and some
     additional parameters to some of the original instructions.

`-m32r'
     This option can be used to restore the assembler's default
     behaviour of assembling for the M32R microprocessor.  This can be
     useful if the default has been changed by a previous command line
     option.

`-warn-explicit-parallel-conflicts'
     Instructs `as' to produce warning messages when questionable
     parallel instructions are encountered.  This option is enabled by
     default, but `gcc' disables it when it invokes `as' directly.
     Questionable instructions are those whoes behaviour would be
     different if they were executed sequentially.  For example the
     code fragment `mv r1, r2 || mv r3, r1' produces a different result
     from `mv r1, r2 \n mv r3, r1' since the former moves r1 into r3
     and then r2 into r1, whereas the later moves r2 into r1 and r3.

`-Wp'
     This is a shorter synonym for the
     _-warn-explicit-parallel-conflicts_ option.

`-no-warn-explicit-parallel-conflicts'
     Instructs `as' not to produce warning messages when questionable
     parallel instructions are encountered.

`-Wnp'
     This is a shorter synonym for the
     _-no-warn-explicit-parallel-conflicts_ option.



File: m68k-rtems-as.info,  Node: M32R-Warnings,  Prev: M32R-Opts,  Up: M32R-Dependent

M32R Warnings
-------------

There are several warning and error messages that can be produced by
`as' which are specific to the M32R:

`output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?'
     This message is only produced if warnings for explicit parallel
     conflicts have been enabled.  It indicates that the assembler has
     encountered a parallel instruction in which the destination
     register of the left hand instruction is used as an input register
     in the right hand instruction.  For example in this code fragment
     `mv r1, r2 || neg r3, r1' register r1 is the destination of the
     move instruction and the input to the neg instruction.

`output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?'
     This message is only produced if warnings for explicit parallel
     conflicts have been enabled.  It indicates that the assembler has
     encountered a parallel instruction in which the destination
     register of the right hand instruction is used as an input
     register in the left hand instruction.  For example in this code
     fragment `mv r1, r2 || neg r2, r3' register r2 is the destination
     of the neg instruction and the input to the move instruction.

`instruction `...' is for the M32RX only'
     This message is produced when the assembler encounters an
     instruction which is only supported by the M32Rx processor, and
     the `-m32rx' command line flag has not been specified to allow
     assembly of such instructions.

`unknown instruction `...''
     This message is produced when the assembler encounters an
     instruction which it doe snot recognise.

`only the NOP instruction can be issued in parallel on the m32r'
     This message is produced when the assembler encounters a parallel
     instruction which does not involve a NOP instruction and the
     `-m32rx' command line flag has not been specified.  Only the M32Rx
     processor is able to execute two instructions in parallel.

`instruction `...' cannot be executed in parallel.'
     This message is produced when the assembler encounters a parallel
     instruction which is made up of one or two instructions which
     cannot be executed in parallel.

`Instructions share the same execution pipeline'
     This message is produced when the assembler encounters a parallel
     instruction whoes components both use the same execution pipeline.

`Instructions write to the same destination register.'
     This message is produced when the assembler encounters a parallel
     instruction where both components attempt to modify the same
     register.  For example these code fragments will produce this
     message: `mv r1, r2 || neg r1, r3' `jl r0 || mv r14, r1' `st r2,
     @-r1 || mv r1, r3' `mv r1, r2 || ld r0, @r1+' `cmp r1, r2 || addx
     r3, r4' (Both write to the condition bit)



File: m68k-rtems-as.info,  Node: M68K-Dependent,  Next: M68HC11-Dependent,  Prev: M32R-Dependent,  Up: Machine Dependencies

M680x0 Dependent Features
=========================

* Menu:

* M68K-Opts::                   M680x0 Options
* M68K-Syntax::                 Syntax
* M68K-Moto-Syntax::            Motorola Syntax
* M68K-Float::                  Floating Point
* M68K-Directives::             680x0 Machine Directives
* M68K-opcodes::                Opcodes

