# Alliance VLSI CAD System
# Copyright (C) 1990, 2002 ASIM/LIP6/UPMC
#
# Home page          : http://asim.lip6.fr/alliance/
# E-mail             : mailto:alliance-users@asim.lip6.fr
# ftp site           : ftp://asim.lip6.fr/pub/alliance/
#

# What is this bench for ??
# ===================================================================
This bench constructs an amd2901 from the logical view to the
physical view (verifying each stage) whith ALLIANCE tools.
This bench is meant to run most of ALLIANCE tools to test them.
For more documentation about ALLIANCE, please read the tutorials
and the man pages.
If you are interested in ALLIANCE, subscribe to the
alliance-users@asim.lip6.fr mailing list.

# How to run this bench ? :
# ===================================================================
First of all, the ALLIANCE environment must be setted.
Depending on your shell, source the alc_env.csh or alc_env.sh
script.
This done, you can run the entire process by typing:
> make clean
> make

# Special targets
# ===================================================================
Run the following targets (make [target]):
view_ctl_logic:
	* generates amd2901_ctl.vst and visualizes it with xsch
view_dpt_physic:
	* generates amd2901_dpt.vst and amd2901_dpt.ap
	  and visualizes amd2901_dpt.ap with graal.
view_chip_physic:
	* generates amd2901_chip.ap and visualizes it with graal.
view_chip_simulation:
	* generates test_chip_final.pat and visualizes it with xpat.

Edit the Makefile for more targets ....

# What are the files coming with this bench ??
# ===================================================================
pattern.c:
	* test patterns of the amd2901 described in C and using the
	  genpat MACROS. Has to be processed with genpat to create
	  the pattern.pat file.
amd2901_ctl.vbe:  
	* Description of the amd2901 control part in vbe format.
	  Processed by boom (boolean optimization) -> amd2901_ctl_boom.vbe  
	  which is processed by boog (synthesis) -> amd2901_ctl_boog.vst
	  which is proceesed by loon (power optimization) -> amd2901_ctl.vst
amd2901_ctl.lax:
	* Parameter file for logic synthesis. Used by boom, boog and loon.
amd2901_dpt.c:
	* Description of the amd2901 data-path in genlib format.
	  Uses the data-path library dp_sxlib.
	  Has to be processed by genlib, to create:
		* amd2901_dpt.vst:
			* logical description of the amd2901 datapath
		* amd2901_dpt.ap:
			* physical description of the amd2901 datapath
amd2901_core.c:
	* Description of the amd2901 core in genlib format.
	  Has to be processed by genlib, to create
		* amd2901_core.vst:
			* logical description of amd2901 core which instanciates
			  amd2901_dpt.vst and amd2901_ctl.vst.
		* amd2901_core.ap:
			* physical description of amd2901 core which instanciates
			  amd2901_dpt.ap and expand the abutment box in order
			  to give enough room to place the control part.
amd2901_core.ioc:
	* amd2901_core connectors placement description, used by ocp.
amd2901_chip.c:
	* amd2901_chip description in genlib format.
	  instanciates amd2901_core.vst and the pads from the padlib
	  library.
amd2901_chip.rin:
	* pads placement file, used by ring.
bench.zsh:
	* simple zsh script, used for 'ad infinitum' use of this bench to detect
	  bugs ...
