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# LLVM 3.3 Release Notes

- Introduction
- Non-comprehensive list of changes in this release
  - AArch64 target
  - Loop Vectorizer
  - R600 Backend
- Additional Information

Warning

These are in-progress notes for the upcoming LLVM 3.3 release. You may prefer the LLVM 3.2 Release Notes.

## Introduction

This document contains the release notes for the LLVM Compiler Infrastructure, release 3.3. Here we describe the status of LLVM, including major improvements from the previous release, improvements in various subprojects of LLVM, and some of the current users of the code. All LLVM releases may be downloaded from the LLVM releases web site.

For more information about LLVM, including information about the latest release, please check out the main LLVM web site. If you have questions or comments, the LLVM Developer’s Mailing List is a good place to send them.

Note that if you are reading this file from a Subversion checkout or the main LLVM web page, this document applies to the next release, not the current one. To see the release notes for a specific release, please see the releases page.

## Non-comprehensive list of changes in this release

- The CellSPU port has been removed. It can still be found in older versions.
- The IR-level extended linker APIs (for example, to link bitcode files out of archives) have been removed. Any existing clients of these features should move to using a linker with integrated LTO support.
- LLVM and Clang’s documentation has been migrated to the Sphinx documentation generation system which uses easy-to-write reStructuredText. See llvm/docs/README.txt for more information.
- TargetTransformInfo (TTI) is a new interface that can be used by IR-level passes to obtain target-specific information, such as the costs of instructions. Only “Lowering” passes such as LSR and the vectorizer are allowed to use the TTI infrastructure.
- We’ve improved the X86 and ARM cost model.
- The Attributes classes have been completely rewritten and expanded. They now support not only enumerated attributes and alignments, but “string” attributes, which are useful for passing information to code generation. See How To Use Attributes for more details.
- ... next change ...

### AArch64 target

We’ve added support for AArch64, ARM’s 64-bit architecture. Development is still in fairly early stages, but we expect successful compilation when:

- compiling standard compliant C99 and C++03 with Clang;
- using Linux as a target platform;
- where code + static data doesn’t exceed 4GB in size (heap allocated data has no limitation).

Some additional functionality is also implemented, notably DWARF debugging, GNU-style thread local storage and inline assembly.

### Loop Vectorizer

We’ve continued the work on the loop vectorizer. The loop vectorizer now has the following features:

- Loops with unknown trip count.
- Runtime checks of pointers
- Reductions, Inductions
- If Conversion
- Pointer induction variables
- Reverse iterators
- Vectorization of mixed types
- Vectorization of function calls
- Partial unrolling during vectorization

### R600 Backend

The R600 backend was added in this release, it supports AMD GPUs (HD2XXX - HD7XXX). This backend is used in AMD’s Open Source graphics / compute drivers which are developed as part of the Mesa3D project.

## Additional Information

A wide variety of additional information is available on the LLVM web page, in particular in the documentation section. The web page also contains versions of the API documentation which is up-to-date with the Subversion version of the source code. You can access versions of these documents specific to this release by going into the `llvm/docs/` directory in the LLVM tree.

If you have any questions or comments about LLVM, please feel free to contact us via the mailing lists.

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