# This file was automatically generated by SWIG (http://www.swig.org).
# Version 1.3.40
#
# Do not make changes to this file unless you know what you are doing--modify
# the SWIG interface file instead.

from sys import version_info
if version_info >= (2,6,0):
    def swig_import_helper():
        from os.path import dirname
        import imp
        fp = None
        try:
            fp, pathname, description = imp.find_module('_usrp_prims', [dirname(__file__)])
        except ImportError:
            import _usrp_prims
            return _usrp_prims
        if fp is not None:
            try:
                _mod = imp.load_module('_usrp_prims', fp, pathname, description)
            finally:
                fp.close()
            return _mod
    _usrp_prims = swig_import_helper()
    del swig_import_helper
else:
    import _usrp_prims
del version_info
try:
    _swig_property = property
except NameError:
    pass # Python < 2.2 doesn't have 'property'.
def _swig_setattr_nondynamic(self,class_type,name,value,static=1):
    if (name == "thisown"): return self.this.own(value)
    if (name == "this"):
        if type(value).__name__ == 'SwigPyObject':
            self.__dict__[name] = value
            return
    method = class_type.__swig_setmethods__.get(name,None)
    if method: return method(self,value)
    if (not static) or hasattr(self,name):
        self.__dict__[name] = value
    else:
        raise AttributeError("You cannot add attributes to %s" % self)

def _swig_setattr(self,class_type,name,value):
    return _swig_setattr_nondynamic(self,class_type,name,value,0)

def _swig_getattr(self,class_type,name):
    if (name == "thisown"): return self.this.own()
    method = class_type.__swig_getmethods__.get(name,None)
    if method: return method(self)
    raise AttributeError(name)

def _swig_repr(self):
    try: strthis = "proxy of " + self.this.__repr__()
    except: strthis = ""
    return "<%s.%s; %s >" % (self.__class__.__module__, self.__class__.__name__, strthis,)

try:
    _object = object
    _newclass = 1
except AttributeError:
    class _object : pass
    _newclass = 0


def _swig_setattr_nondynamic_method(set):
    def set_attr(self,name,value):
        if (name == "thisown"): return self.this.own(value)
        if hasattr(self,name) or (name == "this"):
            set(self,name,value)
        else:
            raise AttributeError("You cannot add attributes to %s" % self)
    return set_attr


class SwigPyIterator(object):
    thisown = _swig_property(lambda x: x.this.own(), lambda x, v: x.this.own(v), doc='The membership flag')
    def __init__(self, *args, **kwargs): raise AttributeError("No constructor defined - class is abstract")
    __repr__ = _swig_repr
    __swig_destroy__ = _usrp_prims.delete_SwigPyIterator
    __del__ = lambda self : None;
    def value(self): return _usrp_prims.SwigPyIterator_value(self)
    def incr(self, n = 1): return _usrp_prims.SwigPyIterator_incr(self, n)
    def decr(self, n = 1): return _usrp_prims.SwigPyIterator_decr(self, n)
    def distance(self, *args, **kwargs): return _usrp_prims.SwigPyIterator_distance(self, *args, **kwargs)
    def equal(self, *args, **kwargs): return _usrp_prims.SwigPyIterator_equal(self, *args, **kwargs)
    def copy(self): return _usrp_prims.SwigPyIterator_copy(self)
    def next(self): return _usrp_prims.SwigPyIterator_next(self)
    def __next__(self): return _usrp_prims.SwigPyIterator___next__(self)
    def previous(self): return _usrp_prims.SwigPyIterator_previous(self)
    def advance(self, *args, **kwargs): return _usrp_prims.SwigPyIterator_advance(self, *args, **kwargs)
    def __eq__(self, *args, **kwargs): return _usrp_prims.SwigPyIterator___eq__(self, *args, **kwargs)
    def __ne__(self, *args, **kwargs): return _usrp_prims.SwigPyIterator___ne__(self, *args, **kwargs)
    def __iadd__(self, *args, **kwargs): return _usrp_prims.SwigPyIterator___iadd__(self, *args, **kwargs)
    def __isub__(self, *args, **kwargs): return _usrp_prims.SwigPyIterator___isub__(self, *args, **kwargs)
    def __add__(self, *args, **kwargs): return _usrp_prims.SwigPyIterator___add__(self, *args, **kwargs)
    def __sub__(self, *args): return _usrp_prims.SwigPyIterator___sub__(self, *args)
    def __iter__(self): return self
SwigPyIterator_swigregister = _usrp_prims.SwigPyIterator_swigregister
SwigPyIterator_swigregister(SwigPyIterator)

ULS_ERROR = _usrp_prims.ULS_ERROR
ULS_OK = _usrp_prims.ULS_OK
ULS_ALREADY_LOADED = _usrp_prims.ULS_ALREADY_LOADED

def usrp_one_time_init():
  return _usrp_prims.usrp_one_time_init()
usrp_one_time_init = _usrp_prims.usrp_one_time_init

def usrp_rescan():
  return _usrp_prims.usrp_rescan()
usrp_rescan = _usrp_prims.usrp_rescan

def usrp_find_device(*args, **kwargs):
  return _usrp_prims.usrp_find_device(*args, **kwargs)
usrp_find_device = _usrp_prims.usrp_find_device

def usrp_usrp_p(*args, **kwargs):
  return _usrp_prims.usrp_usrp_p(*args, **kwargs)
usrp_usrp_p = _usrp_prims.usrp_usrp_p

def usrp_usrp0_p(*args, **kwargs):
  return _usrp_prims.usrp_usrp0_p(*args, **kwargs)
usrp_usrp0_p = _usrp_prims.usrp_usrp0_p

def usrp_usrp1_p(*args, **kwargs):
  return _usrp_prims.usrp_usrp1_p(*args, **kwargs)
usrp_usrp1_p = _usrp_prims.usrp_usrp1_p

def usrp_usrp2_p(*args, **kwargs):
  return _usrp_prims.usrp_usrp2_p(*args, **kwargs)
usrp_usrp2_p = _usrp_prims.usrp_usrp2_p

def usrp_hw_rev(*args, **kwargs):
  return _usrp_prims.usrp_hw_rev(*args, **kwargs)
usrp_hw_rev = _usrp_prims.usrp_hw_rev

def usrp_fx2_p(*args, **kwargs):
  return _usrp_prims.usrp_fx2_p(*args, **kwargs)
usrp_fx2_p = _usrp_prims.usrp_fx2_p

def usrp_unconfigured_usrp_p(*args, **kwargs):
  return _usrp_prims.usrp_unconfigured_usrp_p(*args, **kwargs)
usrp_unconfigured_usrp_p = _usrp_prims.usrp_unconfigured_usrp_p

def usrp_configured_usrp_p(*args, **kwargs):
  return _usrp_prims.usrp_configured_usrp_p(*args, **kwargs)
usrp_configured_usrp_p = _usrp_prims.usrp_configured_usrp_p

def usrp_open_cmd_interface(*args, **kwargs):
  return _usrp_prims.usrp_open_cmd_interface(*args, **kwargs)
usrp_open_cmd_interface = _usrp_prims.usrp_open_cmd_interface

def usrp_open_rx_interface(*args, **kwargs):
  return _usrp_prims.usrp_open_rx_interface(*args, **kwargs)
usrp_open_rx_interface = _usrp_prims.usrp_open_rx_interface

def usrp_open_tx_interface(*args, **kwargs):
  return _usrp_prims.usrp_open_tx_interface(*args, **kwargs)
usrp_open_tx_interface = _usrp_prims.usrp_open_tx_interface

def usrp_close_interface(*args, **kwargs):
  return _usrp_prims.usrp_close_interface(*args, **kwargs)
usrp_close_interface = _usrp_prims.usrp_close_interface

def usrp_load_firmware(*args, **kwargs):
  return _usrp_prims.usrp_load_firmware(*args, **kwargs)
usrp_load_firmware = _usrp_prims.usrp_load_firmware

def usrp_load_firmware_nth(*args, **kwargs):
  return _usrp_prims.usrp_load_firmware_nth(*args, **kwargs)
usrp_load_firmware_nth = _usrp_prims.usrp_load_firmware_nth

def usrp_load_fpga(*args, **kwargs):
  return _usrp_prims.usrp_load_fpga(*args, **kwargs)
usrp_load_fpga = _usrp_prims.usrp_load_fpga

def usrp_load_standard_bits(*args, **kwargs):
  return _usrp_prims.usrp_load_standard_bits(*args, **kwargs)
usrp_load_standard_bits = _usrp_prims.usrp_load_standard_bits
FR_TX_SAMPLE_RATE_DIV = _usrp_prims.FR_TX_SAMPLE_RATE_DIV
FR_RX_SAMPLE_RATE_DIV = _usrp_prims.FR_RX_SAMPLE_RATE_DIV
FR_MASTER_CTRL = _usrp_prims.FR_MASTER_CTRL
bmFR_MC_ENABLE_TX = _usrp_prims.bmFR_MC_ENABLE_TX
bmFR_MC_ENABLE_RX = _usrp_prims.bmFR_MC_ENABLE_RX
bmFR_MC_RESET_TX = _usrp_prims.bmFR_MC_RESET_TX
bmFR_MC_RESET_RX = _usrp_prims.bmFR_MC_RESET_RX
FR_OE_0 = _usrp_prims.FR_OE_0
FR_OE_1 = _usrp_prims.FR_OE_1
FR_OE_2 = _usrp_prims.FR_OE_2
FR_OE_3 = _usrp_prims.FR_OE_3
FR_IO_0 = _usrp_prims.FR_IO_0
FR_IO_1 = _usrp_prims.FR_IO_1
FR_IO_2 = _usrp_prims.FR_IO_2
FR_IO_3 = _usrp_prims.FR_IO_3
FR_MODE = _usrp_prims.FR_MODE
bmFR_MODE_NORMAL = _usrp_prims.bmFR_MODE_NORMAL
bmFR_MODE_LOOPBACK = _usrp_prims.bmFR_MODE_LOOPBACK
bmFR_MODE_RX_COUNTING = _usrp_prims.bmFR_MODE_RX_COUNTING
bmFR_MODE_RX_COUNTING_32BIT = _usrp_prims.bmFR_MODE_RX_COUNTING_32BIT
FR_DEBUG_EN = _usrp_prims.FR_DEBUG_EN
bmFR_DEBUG_EN_TX_A = _usrp_prims.bmFR_DEBUG_EN_TX_A
bmFR_DEBUG_EN_RX_A = _usrp_prims.bmFR_DEBUG_EN_RX_A
bmFR_DEBUG_EN_TX_B = _usrp_prims.bmFR_DEBUG_EN_TX_B
bmFR_DEBUG_EN_RX_B = _usrp_prims.bmFR_DEBUG_EN_RX_B
FR_DC_OFFSET_CL_EN = _usrp_prims.FR_DC_OFFSET_CL_EN
FR_ADC_OFFSET_0 = _usrp_prims.FR_ADC_OFFSET_0
FR_ADC_OFFSET_1 = _usrp_prims.FR_ADC_OFFSET_1
FR_ADC_OFFSET_2 = _usrp_prims.FR_ADC_OFFSET_2
FR_ADC_OFFSET_3 = _usrp_prims.FR_ADC_OFFSET_3
FR_ATR_MASK_0 = _usrp_prims.FR_ATR_MASK_0
FR_ATR_TXVAL_0 = _usrp_prims.FR_ATR_TXVAL_0
FR_ATR_RXVAL_0 = _usrp_prims.FR_ATR_RXVAL_0
FR_ATR_MASK_1 = _usrp_prims.FR_ATR_MASK_1
FR_ATR_TXVAL_1 = _usrp_prims.FR_ATR_TXVAL_1
FR_ATR_RXVAL_1 = _usrp_prims.FR_ATR_RXVAL_1
FR_ATR_MASK_2 = _usrp_prims.FR_ATR_MASK_2
FR_ATR_TXVAL_2 = _usrp_prims.FR_ATR_TXVAL_2
FR_ATR_RXVAL_2 = _usrp_prims.FR_ATR_RXVAL_2
FR_ATR_MASK_3 = _usrp_prims.FR_ATR_MASK_3
FR_ATR_TXVAL_3 = _usrp_prims.FR_ATR_TXVAL_3
FR_ATR_RXVAL_3 = _usrp_prims.FR_ATR_RXVAL_3
FR_ATR_TX_DELAY = _usrp_prims.FR_ATR_TX_DELAY
FR_ATR_RX_DELAY = _usrp_prims.FR_ATR_RX_DELAY
FR_INTERP_RATE = _usrp_prims.FR_INTERP_RATE
FR_DECIM_RATE = _usrp_prims.FR_DECIM_RATE
FR_RX_FREQ_0 = _usrp_prims.FR_RX_FREQ_0
FR_RX_FREQ_1 = _usrp_prims.FR_RX_FREQ_1
FR_RX_FREQ_2 = _usrp_prims.FR_RX_FREQ_2
FR_RX_FREQ_3 = _usrp_prims.FR_RX_FREQ_3
FR_RX_MUX = _usrp_prims.FR_RX_MUX
FR_TX_MUX = _usrp_prims.FR_TX_MUX
FR_TX_A_REFCLK = _usrp_prims.FR_TX_A_REFCLK
FR_RX_A_REFCLK = _usrp_prims.FR_RX_A_REFCLK
FR_TX_B_REFCLK = _usrp_prims.FR_TX_B_REFCLK
FR_RX_B_REFCLK = _usrp_prims.FR_RX_B_REFCLK
bmFR_REFCLK_EN = _usrp_prims.bmFR_REFCLK_EN
bmFR_REFCLK_DIVISOR_MASK = _usrp_prims.bmFR_REFCLK_DIVISOR_MASK
FR_RX_PHASE_0 = _usrp_prims.FR_RX_PHASE_0
FR_RX_PHASE_1 = _usrp_prims.FR_RX_PHASE_1
FR_RX_PHASE_2 = _usrp_prims.FR_RX_PHASE_2
FR_RX_PHASE_3 = _usrp_prims.FR_RX_PHASE_3
FR_TX_FORMAT = _usrp_prims.FR_TX_FORMAT
bmFR_TX_FORMAT_16_IQ = _usrp_prims.bmFR_TX_FORMAT_16_IQ
FR_RX_FORMAT = _usrp_prims.FR_RX_FORMAT
bmFR_RX_FORMAT_SHIFT_MASK = _usrp_prims.bmFR_RX_FORMAT_SHIFT_MASK
bmFR_RX_FORMAT_SHIFT_SHIFT = _usrp_prims.bmFR_RX_FORMAT_SHIFT_SHIFT
bmFR_RX_FORMAT_WIDTH_MASK = _usrp_prims.bmFR_RX_FORMAT_WIDTH_MASK
bmFR_RX_FORMAT_WIDTH_SHIFT = _usrp_prims.bmFR_RX_FORMAT_WIDTH_SHIFT
bmFR_RX_FORMAT_WANT_Q = _usrp_prims.bmFR_RX_FORMAT_WANT_Q
bmFR_RX_FORMAT_BYPASS_HB = _usrp_prims.bmFR_RX_FORMAT_BYPASS_HB
FR_USER_0 = _usrp_prims.FR_USER_0
FR_USER_1 = _usrp_prims.FR_USER_1
FR_USER_2 = _usrp_prims.FR_USER_2
FR_USER_3 = _usrp_prims.FR_USER_3
FR_USER_4 = _usrp_prims.FR_USER_4
FR_USER_5 = _usrp_prims.FR_USER_5
FR_USER_6 = _usrp_prims.FR_USER_6
FR_USER_7 = _usrp_prims.FR_USER_7
FR_USER_8 = _usrp_prims.FR_USER_8
FR_USER_9 = _usrp_prims.FR_USER_9
FR_USER_10 = _usrp_prims.FR_USER_10
FR_USER_11 = _usrp_prims.FR_USER_11
FR_USER_12 = _usrp_prims.FR_USER_12
FR_USER_13 = _usrp_prims.FR_USER_13
FR_USER_14 = _usrp_prims.FR_USER_14
FR_USER_15 = _usrp_prims.FR_USER_15
FR_USER_16 = _usrp_prims.FR_USER_16
FR_USER_17 = _usrp_prims.FR_USER_17
FR_USER_18 = _usrp_prims.FR_USER_18
FR_USER_19 = _usrp_prims.FR_USER_19
FR_USER_20 = _usrp_prims.FR_USER_20
FR_USER_21 = _usrp_prims.FR_USER_21
FR_USER_22 = _usrp_prims.FR_USER_22
FR_USER_23 = _usrp_prims.FR_USER_23
FR_USER_24 = _usrp_prims.FR_USER_24
FR_USER_25 = _usrp_prims.FR_USER_25
FR_USER_26 = _usrp_prims.FR_USER_26
FR_USER_27 = _usrp_prims.FR_USER_27
FR_USER_28 = _usrp_prims.FR_USER_28
FR_USER_29 = _usrp_prims.FR_USER_29
FR_USER_30 = _usrp_prims.FR_USER_30
FR_USER_31 = _usrp_prims.FR_USER_31
FR_RX_MASTER_SLAVE = _usrp_prims.FR_RX_MASTER_SLAVE
bitnoFR_RX_SYNC = _usrp_prims.bitnoFR_RX_SYNC
bitnoFR_RX_SYNC_MASTER = _usrp_prims.bitnoFR_RX_SYNC_MASTER
bitnoFR_RX_SYNC_SLAVE = _usrp_prims.bitnoFR_RX_SYNC_SLAVE
bmFR_RX_SYNC = _usrp_prims.bmFR_RX_SYNC
bmFR_RX_SYNC_MASTER = _usrp_prims.bmFR_RX_SYNC_MASTER
bmFR_RX_SYNC_SLAVE = _usrp_prims.bmFR_RX_SYNC_SLAVE
bitnoFR_RX_SYNC_INPUT_IOPIN = _usrp_prims.bitnoFR_RX_SYNC_INPUT_IOPIN
bmFR_RX_SYNC_INPUT_IOPIN = _usrp_prims.bmFR_RX_SYNC_INPUT_IOPIN
bitnoFR_RX_SYNC_OUTPUT_IOPIN = _usrp_prims.bitnoFR_RX_SYNC_OUTPUT_IOPIN
bmFR_RX_SYNC_OUTPUT_IOPIN = _usrp_prims.bmFR_RX_SYNC_OUTPUT_IOPIN
FR_RB_IO_RX_A_IO_TX_A = _usrp_prims.FR_RB_IO_RX_A_IO_TX_A
FR_RB_IO_RX_B_IO_TX_B = _usrp_prims.FR_RB_IO_RX_B_IO_TX_B
FR_RB_CAPS = _usrp_prims.FR_RB_CAPS
bmFR_RB_CAPS_NDDC_MASK = _usrp_prims.bmFR_RB_CAPS_NDDC_MASK
bmFR_RB_CAPS_NDDC_SHIFT = _usrp_prims.bmFR_RB_CAPS_NDDC_SHIFT
bmFR_RB_CAPS_RX_HAS_HALFBAND = _usrp_prims.bmFR_RB_CAPS_RX_HAS_HALFBAND
bmFR_RB_CAPS_NDUC_MASK = _usrp_prims.bmFR_RB_CAPS_NDUC_MASK
bmFR_RB_CAPS_NDUC_SHIFT = _usrp_prims.bmFR_RB_CAPS_NDUC_SHIFT
bmFR_RB_CAPS_TX_HAS_HALFBAND = _usrp_prims.bmFR_RB_CAPS_TX_HAS_HALFBAND

def usrp_write_fpga_reg(*args, **kwargs):
  return _usrp_prims.usrp_write_fpga_reg(*args, **kwargs)
usrp_write_fpga_reg = _usrp_prims.usrp_write_fpga_reg

def usrp_read_fpga_reg(*args, **kwargs):
  return _usrp_prims.usrp_read_fpga_reg(*args, **kwargs)
usrp_read_fpga_reg = _usrp_prims.usrp_read_fpga_reg

def usrp_set_fpga_reset(*args, **kwargs):
  return _usrp_prims.usrp_set_fpga_reset(*args, **kwargs)
usrp_set_fpga_reset = _usrp_prims.usrp_set_fpga_reset

def usrp_set_fpga_tx_enable(*args, **kwargs):
  return _usrp_prims.usrp_set_fpga_tx_enable(*args, **kwargs)
usrp_set_fpga_tx_enable = _usrp_prims.usrp_set_fpga_tx_enable

def usrp_set_fpga_rx_enable(*args, **kwargs):
  return _usrp_prims.usrp_set_fpga_rx_enable(*args, **kwargs)
usrp_set_fpga_rx_enable = _usrp_prims.usrp_set_fpga_rx_enable

def usrp_set_fpga_tx_reset(*args, **kwargs):
  return _usrp_prims.usrp_set_fpga_tx_reset(*args, **kwargs)
usrp_set_fpga_tx_reset = _usrp_prims.usrp_set_fpga_tx_reset

def usrp_set_fpga_rx_reset(*args, **kwargs):
  return _usrp_prims.usrp_set_fpga_rx_reset(*args, **kwargs)
usrp_set_fpga_rx_reset = _usrp_prims.usrp_set_fpga_rx_reset

def usrp_set_led(*args, **kwargs):
  return _usrp_prims.usrp_set_led(*args, **kwargs)
usrp_set_led = _usrp_prims.usrp_set_led

def usrp_check_rx_overrun(*args, **kwargs):
  return _usrp_prims.usrp_check_rx_overrun(*args, **kwargs)
usrp_check_rx_overrun = _usrp_prims.usrp_check_rx_overrun

def usrp_check_tx_underrun(*args, **kwargs):
  return _usrp_prims.usrp_check_tx_underrun(*args, **kwargs)
usrp_check_tx_underrun = _usrp_prims.usrp_check_tx_underrun

def usrp_i2c_write(*args, **kwargs):
  return _usrp_prims.usrp_i2c_write(*args, **kwargs)
usrp_i2c_write = _usrp_prims.usrp_i2c_write

def usrp_i2c_read(*args, **kwargs):
  return _usrp_prims.usrp_i2c_read(*args, **kwargs)
usrp_i2c_read = _usrp_prims.usrp_i2c_read

def usrp_spi_write(*args, **kwargs):
  return _usrp_prims.usrp_spi_write(*args, **kwargs)
usrp_spi_write = _usrp_prims.usrp_spi_write

def usrp_spi_read(*args, **kwargs):
  return _usrp_prims.usrp_spi_read(*args, **kwargs)
usrp_spi_read = _usrp_prims.usrp_spi_read

def usrp_9862_write(*args, **kwargs):
  return _usrp_prims.usrp_9862_write(*args, **kwargs)
usrp_9862_write = _usrp_prims.usrp_9862_write

def usrp_9862_read(*args, **kwargs):
  return _usrp_prims.usrp_9862_read(*args, **kwargs)
usrp_9862_read = _usrp_prims.usrp_9862_read

def usrp_eeprom_write(*args, **kwargs):
  return _usrp_prims.usrp_eeprom_write(*args, **kwargs)
usrp_eeprom_write = _usrp_prims.usrp_eeprom_write

def usrp_eeprom_read(*args, **kwargs):
  return _usrp_prims.usrp_eeprom_read(*args, **kwargs)
usrp_eeprom_read = _usrp_prims.usrp_eeprom_read

def usrp_write_aux_dac(*args, **kwargs):
  return _usrp_prims.usrp_write_aux_dac(*args, **kwargs)
usrp_write_aux_dac = _usrp_prims.usrp_write_aux_dac

def usrp_read_aux_adc(*args, **kwargs):
  return _usrp_prims.usrp_read_aux_adc(*args, **kwargs)
usrp_read_aux_adc = _usrp_prims.usrp_read_aux_adc

def usrp_serial_number(*args, **kwargs):
  return _usrp_prims.usrp_serial_number(*args, **kwargs)
usrp_serial_number = _usrp_prims.usrp_serial_number

def usrp_dbid_to_string(*args, **kwargs):
  return _usrp_prims.usrp_dbid_to_string(*args, **kwargs)
usrp_dbid_to_string = _usrp_prims.usrp_dbid_to_string


