;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.5.0 #1020 (Oct 16 2005)
; This file generated Sun Oct 16 22:33:24 2005
;--------------------------------------------------------
	.module sincosf
	.optsdcc -mmcs51 --model-small
	
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _sincosf
	.globl _sincosf_PARM_2
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
	.area RSEG    (DATA)
;--------------------------------------------------------
; special function bits 
;--------------------------------------------------------
	.area RSEG    (DATA)
;--------------------------------------------------------
; overlayable register banks 
;--------------------------------------------------------
	.area REG_BANK_0	(REL,OVR,DATA)
	.ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
	.area DSEG    (DATA)
_sincosf_PARM_2::
	.ds 2
_sincosf_x_1_1::
	.ds 4
_sincosf_f_1_1::
	.ds 4
_sincosf_r_1_1::
	.ds 4
_sincosf_XN_1_1::
	.ds 4
;--------------------------------------------------------
; overlayable items in internal ram 
;--------------------------------------------------------
	.area OSEG    (OVR,DATA)
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
	.area ISEG    (DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
	.area BSEG    (BIT)
_sincosf_sign_1_1::
	.ds 1
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
	.area PSEG    (PAG,XDATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
	.area XSEG    (XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
	.area XISEG   (XDATA)
	.area CSEG    (CODE)
	.area GSINIT0 (CODE)
	.area GSINIT1 (CODE)
	.area GSINIT2 (CODE)
	.area GSINIT3 (CODE)
	.area GSINIT4 (CODE)
	.area GSINIT5 (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area CSEG    (CODE)
	.area GSINIT  (CODE)
	.area GSFINAL (CODE)
	.area GSINIT  (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME    (CODE)
	.area CSEG    (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG    (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'sincosf'
;------------------------------------------------------------
;iscos                     Allocated with name '_sincosf_PARM_2'
;x                         Allocated with name '_sincosf_x_1_1'
;y                         Allocated to registers r6 r7 r0 r1 
;f                         Allocated with name '_sincosf_f_1_1'
;r                         Allocated with name '_sincosf_r_1_1'
;g                         Allocated to registers r6 r7 r0 r1 
;XN                        Allocated with name '_sincosf_XN_1_1'
;N                         Allocated to registers r2 r3 
;sloc0                     Allocated with name '_sincosf_sloc0_1_0'
;------------------------------------------------------------
;sincosf.c:40: float sincosf(const float x, const int iscos)
;	-----------------------------------------
;	 function sincosf
;	-----------------------------------------
_sincosf:
	ar2 = 0x02
	ar3 = 0x03
	ar4 = 0x04
	ar5 = 0x05
	ar6 = 0x06
	ar7 = 0x07
	ar0 = 0x00
	ar1 = 0x01
;     genReceive
	mov	_sincosf_x_1_1,dpl
	mov	(_sincosf_x_1_1 + 1),dph
	mov	(_sincosf_x_1_1 + 2),b
	mov	(_sincosf_x_1_1 + 3),a
;sincosf.c:46: if(iscos)
;     genIfx
	mov	a,_sincosf_PARM_2
	orl	a,(_sincosf_PARM_2 + 1)
;     genIfxJump
;	Peephole 110	removed ljmp by inverse jump logic
	jz	00105$
00126$:
;sincosf.c:48: y=fabsf(x)+HALF_PI;
;     genCall
	mov	dpl,_sincosf_x_1_1
	mov	dph,(_sincosf_x_1_1 + 1)
	mov	b,(_sincosf_x_1_1 + 2)
	mov	a,(_sincosf_x_1_1 + 3)
	lcall	_fabsf
	mov	r6,dpl
	mov	r7,dph
	mov	r0,b
	mov	r1,a
;     genIpush
	mov	a,#0xDB
	push	acc
	mov	a,#0x0F
	push	acc
	mov	a,#0xC9
	push	acc
	mov	a,#0x3F
	push	acc
;     genCall
	mov	dpl,r6
	mov	dph,r7
	mov	b,r0
	mov	a,r1
	lcall	___fsadd
	mov	r6,dpl
	mov	r7,dph
	mov	r0,b
	mov	r1,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
;sincosf.c:49: sign=0;
;     genAssign
	clr	_sincosf_sign_1_1
;	Peephole 112.b	changed ljmp to sjmp
	sjmp	00106$
00105$:
;sincosf.c:53: if(x<0.0)
;     genIpush
;	Peephole 181	changed mov to clr
	clr	a
	push	acc
;	Peephole 181	changed mov to clr
	clr	a
	push	acc
;	Peephole 181	changed mov to clr
	clr	a
	push	acc
;	Peephole 181	changed mov to clr
	clr	a
	push	acc
;     genCall
	mov	dpl,_sincosf_x_1_1
	mov	dph,(_sincosf_x_1_1 + 1)
	mov	b,(_sincosf_x_1_1 + 2)
	mov	a,(_sincosf_x_1_1 + 3)
	lcall	___fslt
	mov	r2,dpl
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
;     genIfx
	mov	a,r2
;     genIfxJump
;	Peephole 110	removed ljmp by inverse jump logic
	jz	00102$
00127$:
;sincosf.c:54: { y=-x; sign=1; }
;     genUminus
;     genUminusFloat
	mov	r6,_sincosf_x_1_1
	mov	r7,(_sincosf_x_1_1 + 1)
	mov	r0,(_sincosf_x_1_1 + 2)
	mov	a,(_sincosf_x_1_1 + 3)
	cpl	acc.7
	mov	r1,a
;     genAssign
	setb	_sincosf_sign_1_1
;	Peephole 112.b	changed ljmp to sjmp
	sjmp	00106$
00102$:
;sincosf.c:56: { y=x; sign=0; }
;     genAssign
	mov	r6,_sincosf_x_1_1
	mov	r7,(_sincosf_x_1_1 + 1)
	mov	r0,(_sincosf_x_1_1 + 2)
	mov	r1,(_sincosf_x_1_1 + 3)
;     genAssign
	clr	_sincosf_sign_1_1
00106$:
;sincosf.c:59: if(y>YMAX)
;     genIpush
	push	ar6
	push	ar7
	push	ar0
	push	ar1
;	Peephole 181	changed mov to clr
	clr	a
	push	acc
	mov	a,#0x0C
	push	acc
	mov	a,#0x49
	push	acc
	mov	a,#0x46
	push	acc
;     genCall
	mov	dpl,r6
	mov	dph,r7
	mov	b,r0
	mov	a,r1
	lcall	___fsgt
	mov	r2,dpl
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
	pop	ar1
	pop	ar0
	pop	ar7
	pop	ar6
;     genIfx
	mov	a,r2
;     genIfxJump
;	Peephole 110	removed ljmp by inverse jump logic
	jz	00108$
00128$:
;sincosf.c:61: errno=ERANGE;
;     genAssign
	mov	_errno,#0x22
	clr	a
	mov	(_errno + 1),a
;sincosf.c:62: return 0.0;
;     genRet
;	Peephole 3.a	changed mov to clr
;	Peephole 3.b	changed mov to clr
;	Peephole 182.d	used 16 bit load of dptr
	mov	dptr,#(0x00&0x00ff)
	clr	a
	mov	b,a
;	Peephole 251.a	replaced ljmp to ret with ret
	ret
00108$:
;sincosf.c:66: N=((y*iPI)+0.5); /*y is positive*/
;     genIpush
	mov	a,#0x83
	push	acc
	mov	a,#0xF9
	push	acc
	mov	a,#0xA2
	push	acc
	mov	a,#0x3E
	push	acc
;     genCall
	mov	dpl,r6
	mov	dph,r7
	mov	b,r0
	mov	a,r1
	lcall	___fsmul
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
;     genIpush
;	Peephole 181	changed mov to clr
	clr	a
	push	acc
;	Peephole 181	changed mov to clr
	clr	a
	push	acc
;	Peephole 181	changed mov to clr
	clr	a
	push	acc
	mov	a,#0x3F
	push	acc
;     genCall
	mov	dpl,r2
	mov	dph,r3
	mov	b,r4
	mov	a,r5
	lcall	___fsadd
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
;     genCall
	mov	dpl,r2
	mov	dph,r3
	mov	b,r4
	mov	a,r5
	lcall	___fs2sint
	mov	r2,dpl
	mov	r3,dph
;sincosf.c:69: if(N&1) sign=!sign;
;     genAnd
	mov	a,r2
;     genIfxJump
;	Peephole 111	removed ljmp by inverse jump logic
	jnb	acc.0,00110$
00129$:
;     genNot
;	Peephole 167	removed redundant bit moves (c not set to _sincosf_sign_1_1)
	cpl	_sincosf_sign_1_1
00110$:
;sincosf.c:71: XN=N;
;     genCall
	mov	dpl,r2
	mov	dph,r3
	lcall	___sint2fs
	mov	_sincosf_XN_1_1,dpl
	mov	(_sincosf_XN_1_1 + 1),dph
	mov	(_sincosf_XN_1_1 + 2),b
	mov	(_sincosf_XN_1_1 + 3),a
;sincosf.c:73: if(iscos) XN-=0.5;
;     genIfx
	mov	a,_sincosf_PARM_2
	orl	a,(_sincosf_PARM_2 + 1)
;     genIfxJump
;	Peephole 110	removed ljmp by inverse jump logic
	jz	00112$
00130$:
;     genIpush
;	Peephole 181	changed mov to clr
	clr	a
	push	acc
;	Peephole 181	changed mov to clr
	clr	a
	push	acc
;	Peephole 181	changed mov to clr
	clr	a
	push	acc
	mov	a,#0x3F
	push	acc
;     genCall
	mov	dpl,_sincosf_XN_1_1
	mov	dph,(_sincosf_XN_1_1 + 1)
	mov	b,(_sincosf_XN_1_1 + 2)
	mov	a,(_sincosf_XN_1_1 + 3)
	lcall	___fssub
	mov	_sincosf_XN_1_1,dpl
	mov	(_sincosf_XN_1_1 + 1),dph
	mov	(_sincosf_XN_1_1 + 2),b
	mov	(_sincosf_XN_1_1 + 3),a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
00112$:
;sincosf.c:75: y=fabsf(x);
;     genCall
	mov	dpl,_sincosf_x_1_1
	mov	dph,(_sincosf_x_1_1 + 1)
	mov	b,(_sincosf_x_1_1 + 2)
	mov	a,(_sincosf_x_1_1 + 3)
	lcall	_fabsf
;sincosf.c:76: r=(int)y;
;     genCall
;	Peephole 191	removed redundant mov
	mov	r6,dpl
	mov	r7,dph
	mov	r0,b
	mov	r1,a
;	Peephole 238.b	removed 3 redundant moves
	push	ar6
	push	ar7
	push	ar0
	push	ar1
	lcall	___fs2sint
	mov	r2,dpl
	mov	r3,dph
	pop	ar1
	pop	ar0
	pop	ar7
	pop	ar6
;     genCall
	mov	dpl,r2
	mov	dph,r3
	push	ar6
	push	ar7
	push	ar0
	push	ar1
	lcall	___sint2fs
	mov	_sincosf_r_1_1,dpl
	mov	(_sincosf_r_1_1 + 1),dph
	mov	(_sincosf_r_1_1 + 2),b
	mov	(_sincosf_r_1_1 + 3),a
	pop	ar1
	pop	ar0
	pop	ar7
	pop	ar6
;sincosf.c:77: g=y-r;
;     genIpush
	push	_sincosf_r_1_1
	push	(_sincosf_r_1_1 + 1)
	push	(_sincosf_r_1_1 + 2)
	push	(_sincosf_r_1_1 + 3)
;     genCall
	mov	dpl,r6
	mov	dph,r7
	mov	b,r0
	mov	a,r1
	lcall	___fssub
	mov	r6,dpl
	mov	r7,dph
	mov	r0,b
	mov	r1,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
;sincosf.c:78: f=((r-XN*C1)+g)-XN*C2;
;     genIpush
	push	ar6
	push	ar7
	push	ar0
	push	ar1
;	Peephole 181	changed mov to clr
	clr	a
	push	acc
;	Peephole 181	changed mov to clr
	clr	a
	push	acc
	mov	a,#0x49
	push	acc
	mov	a,#0x40
	push	acc
;     genCall
	mov	dpl,_sincosf_XN_1_1
	mov	dph,(_sincosf_XN_1_1 + 1)
	mov	b,(_sincosf_XN_1_1 + 2)
	mov	a,(_sincosf_XN_1_1 + 3)
	lcall	___fsmul
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
	pop	ar1
	pop	ar0
	pop	ar7
	pop	ar6
;     genIpush
	push	ar6
	push	ar7
	push	ar0
	push	ar1
	push	ar2
	push	ar3
	push	ar4
	push	ar5
;     genCall
	mov	dpl,_sincosf_r_1_1
	mov	dph,(_sincosf_r_1_1 + 1)
	mov	b,(_sincosf_r_1_1 + 2)
	mov	a,(_sincosf_r_1_1 + 3)
	lcall	___fssub
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
	pop	ar1
	pop	ar0
	pop	ar7
	pop	ar6
;     genIpush
	push	ar6
	push	ar7
	push	ar0
	push	ar1
;     genCall
	mov	dpl,r2
	mov	dph,r3
	mov	b,r4
	mov	a,r5
	lcall	___fsadd
	mov	r6,dpl
	mov	r7,dph
	mov	r0,b
	mov	r1,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
;     genIpush
	push	ar6
	push	ar7
	push	ar0
	push	ar1
	mov	a,#0x22
	push	acc
	mov	a,#0xAA
	push	acc
	mov	a,#0x7D
	push	acc
	mov	a,#0x3A
	push	acc
;     genCall
	mov	dpl,_sincosf_XN_1_1
	mov	dph,(_sincosf_XN_1_1 + 1)
	mov	b,(_sincosf_XN_1_1 + 2)
	mov	a,(_sincosf_XN_1_1 + 3)
	lcall	___fsmul
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
	pop	ar1
	pop	ar0
	pop	ar7
	pop	ar6
;     genIpush
	push	ar2
	push	ar3
	push	ar4
	push	ar5
;     genCall
	mov	dpl,r6
	mov	dph,r7
	mov	b,r0
	mov	a,r1
	lcall	___fssub
	mov	_sincosf_f_1_1,dpl
	mov	(_sincosf_f_1_1 + 1),dph
	mov	(_sincosf_f_1_1 + 2),b
	mov	(_sincosf_f_1_1 + 3),a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
;sincosf.c:80: g=f*f;
;     genIpush
	push	_sincosf_f_1_1
	push	(_sincosf_f_1_1 + 1)
	push	(_sincosf_f_1_1 + 2)
	push	(_sincosf_f_1_1 + 3)
;     genCall
	mov	dpl,_sincosf_f_1_1
	mov	dph,(_sincosf_f_1_1 + 1)
	mov	b,(_sincosf_f_1_1 + 2)
	mov	a,(_sincosf_f_1_1 + 3)
	lcall	___fsmul
	mov	r6,dpl
	mov	r7,dph
	mov	r0,b
	mov	r1,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
;sincosf.c:81: if(g>EPS2) //Used to be if(fabsf(f)>EPS)
;     genIpush
	push	ar6
	push	ar7
	push	ar0
	push	ar1
	mov	a,#0xF3
	push	acc
	mov	a,#0xFF
	push	acc
	mov	a,#0x7F
	push	acc
	mov	a,#0x33
	push	acc
;     genCall
	mov	dpl,r6
	mov	dph,r7
	mov	b,r0
	mov	a,r1
	lcall	___fsgt
	mov	r2,dpl
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
	pop	ar1
	pop	ar0
	pop	ar7
	pop	ar6
;     genIfx
	mov	a,r2
;     genIfxJump
	jnz	00131$
	ljmp	00114$
00131$:
;sincosf.c:83: r=(((r4*g+r3)*g+r2)*g+r1)*g;
;     genIpush
	push	ar6
	push	ar7
	push	ar0
	push	ar1
	mov	a,#0x5B
	push	acc
	mov	a,#0x9C
	push	acc
	mov	a,#0x2E
	push	acc
	mov	a,#0x36
	push	acc
;     genCall
	mov	dpl,r6
	mov	dph,r7
	mov	b,r0
	mov	a,r1
	lcall	___fsmul
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
	pop	ar1
	pop	ar0
	pop	ar7
	pop	ar6
;     genIpush
	push	ar6
	push	ar7
	push	ar0
	push	ar1
	mov	a,#0x22
	push	acc
	mov	a,#0xB2
	push	acc
	mov	a,#0x4F
	push	acc
	mov	a,#0xB9
	push	acc
;     genCall
	mov	dpl,r2
	mov	dph,r3
	mov	b,r4
	mov	a,r5
	lcall	___fsadd
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
	pop	ar1
	pop	ar0
	pop	ar7
	pop	ar6
;     genIpush
	push	ar6
	push	ar7
	push	ar0
	push	ar1
	push	ar6
	push	ar7
	push	ar0
	push	ar1
;     genCall
	mov	dpl,r2
	mov	dph,r3
	mov	b,r4
	mov	a,r5
	lcall	___fsmul
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
	pop	ar1
	pop	ar0
	pop	ar7
	pop	ar6
;     genIpush
	push	ar6
	push	ar7
	push	ar0
	push	ar1
	mov	a,#0x3E
	push	acc
	mov	a,#0x87
	push	acc
	mov	a,#0x08
	push	acc
	mov	a,#0x3C
	push	acc
;     genCall
	mov	dpl,r2
	mov	dph,r3
	mov	b,r4
	mov	a,r5
	lcall	___fsadd
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
	pop	ar1
	pop	ar0
	pop	ar7
	pop	ar6
;     genIpush
	push	ar6
	push	ar7
	push	ar0
	push	ar1
	push	ar6
	push	ar7
	push	ar0
	push	ar1
;     genCall
	mov	dpl,r2
	mov	dph,r3
	mov	b,r4
	mov	a,r5
	lcall	___fsmul
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
	pop	ar1
	pop	ar0
	pop	ar7
	pop	ar6
;     genIpush
	push	ar6
	push	ar7
	push	ar0
	push	ar1
	mov	a,#0xA4
	push	acc
	mov	a,#0xAA
	push	acc
	mov	a,#0x2A
	push	acc
	mov	a,#0xBE
	push	acc
;     genCall
	mov	dpl,r2
	mov	dph,r3
	mov	b,r4
	mov	a,r5
	lcall	___fsadd
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
	pop	ar1
	pop	ar0
	pop	ar7
	pop	ar6
;     genIpush
	push	ar6
	push	ar7
	push	ar0
	push	ar1
;     genCall
	mov	dpl,r2
	mov	dph,r3
	mov	b,r4
	mov	a,r5
	lcall	___fsmul
	mov	_sincosf_r_1_1,dpl
	mov	(_sincosf_r_1_1 + 1),dph
	mov	(_sincosf_r_1_1 + 2),b
	mov	(_sincosf_r_1_1 + 3),a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
;sincosf.c:84: f+=f*r;
;     genIpush
	push	_sincosf_r_1_1
	push	(_sincosf_r_1_1 + 1)
	push	(_sincosf_r_1_1 + 2)
	push	(_sincosf_r_1_1 + 3)
;     genCall
	mov	dpl,_sincosf_f_1_1
	mov	dph,(_sincosf_f_1_1 + 1)
	mov	b,(_sincosf_f_1_1 + 2)
	mov	a,(_sincosf_f_1_1 + 3)
	lcall	___fsmul
	mov	r2,dpl
	mov	r3,dph
	mov	r4,b
	mov	r5,a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
;     genIpush
	push	ar2
	push	ar3
	push	ar4
	push	ar5
;     genCall
	mov	dpl,_sincosf_f_1_1
	mov	dph,(_sincosf_f_1_1 + 1)
	mov	b,(_sincosf_f_1_1 + 2)
	mov	a,(_sincosf_f_1_1 + 3)
	lcall	___fsadd
	mov	_sincosf_f_1_1,dpl
	mov	(_sincosf_f_1_1 + 1),dph
	mov	(_sincosf_f_1_1 + 2),b
	mov	(_sincosf_f_1_1 + 3),a
	mov	a,sp
	add	a,#0xfc
	mov	sp,a
00114$:
;sincosf.c:86: return (sign?-f:f);
;     genIfx
;     genIfxJump
;	Peephole 111	removed ljmp by inverse jump logic
	jnb	_sincosf_sign_1_1,00117$
00132$:
;     genUminus
;     genUminusFloat
	mov	r2,_sincosf_f_1_1
	mov	r3,(_sincosf_f_1_1 + 1)
	mov	r4,(_sincosf_f_1_1 + 2)
	mov	a,(_sincosf_f_1_1 + 3)
	cpl	acc.7
	mov	r5,a
;	Peephole 112.b	changed ljmp to sjmp
	sjmp	00118$
00117$:
;     genAssign
	mov	r2,_sincosf_f_1_1
	mov	r3,(_sincosf_f_1_1 + 1)
	mov	r4,(_sincosf_f_1_1 + 2)
	mov	r5,(_sincosf_f_1_1 + 3)
00118$:
;     genRet
	mov	dpl,r2
	mov	dph,r3
	mov	b,r4
	mov	a,r5
00115$:
	ret
	.area CSEG    (CODE)
	.area XINIT   (CODE)
