;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.5.4 #1153 (Feb 26 2006)
; This file generated Sun Feb 26 21:10:10 2006
;--------------------------------------------------------
	.module _atoi
	.optsdcc -mmcs51 --model-medium
	
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _atoi
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
	.area RSEG    (DATA)
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
	.area RSEG    (DATA)
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
	.area REG_BANK_0	(REL,OVR,DATA)
	.ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
	.area DSEG    (DATA)
_atoi_sloc1_1_0::
	.ds 3
;--------------------------------------------------------
; overlayable items in internal ram 
;--------------------------------------------------------
	.area OSEG    (OVR,DATA)
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
	.area ISEG    (DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
	.area BSEG    (BIT)
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
	.area PSEG    (PAG,XDATA)
_atoi_s_1_1::
	.ds 3
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
	.area XSEG    (XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
	.area XISEG   (XDATA)
	.area HOME    (CODE)
	.area GSINIT0 (CODE)
	.area GSINIT1 (CODE)
	.area GSINIT2 (CODE)
	.area GSINIT3 (CODE)
	.area GSINIT4 (CODE)
	.area GSINIT5 (CODE)
	.area GSINIT  (CODE)
	.area GSFINAL (CODE)
	.area CSEG    (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area HOME    (CODE)
	.area GSINIT  (CODE)
	.area GSFINAL (CODE)
	.area GSINIT  (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME    (CODE)
	.area CSEG    (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG    (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'atoi'
;------------------------------------------------------------
;sloc0                     Allocated with name '_atoi_sloc0_1_0'
;sloc1                     Allocated with name '_atoi_sloc1_1_0'
;------------------------------------------------------------
;_atoi.c:25: int atoi(char * s)
;	-----------------------------------------
;	 function atoi
;	-----------------------------------------
_atoi:
	ar2 = 0x02
	ar3 = 0x03
	ar4 = 0x04
	ar5 = 0x05
	ar6 = 0x06
	ar7 = 0x07
	ar0 = 0x00
	ar1 = 0x01
;     genReceive
	mov	r2,b
	mov	r3,dph
	mov	a,dpl
	mov	r0,#_atoi_s_1_1
	movx	@r0,a
	inc	r0
	mov	a,r3
	movx	@r0,a
	inc	r0
	mov	a,r2
	movx	@r0,a
;_atoi.c:27: register int rv=0; 
;     genAssign
	mov	r5,#0x00
	mov	r6,#0x00
;_atoi.c:31: while (*s) {
;     genAssign
	mov	r0,#_atoi_s_1_1
	movx	a,@r0
	mov	r7,a
	inc	r0
	movx	a,@r0
	mov	r2,a
	inc	r0
	movx	a,@r0
	mov	r3,a
00107$:
;     genPointerGet
;     genGenPointerGet
	mov	dpl,r7
	mov	dph,r2
	mov	b,r3
	lcall	__gptrget
;     genIfx
	mov	r4,a
;	Peephole 105	removed redundant mov
;     genIfxJump
;	Peephole 108.c	removed ljmp by inverse jump logic
	jz	00109$
;	Peephole 300	removed redundant label 00133$
;_atoi.c:32: if (*s <= '9' && *s >= '0')
;     genCmpGt
;     genCmp
	clr	c
;	Peephole 159	avoided xrl during execution
	mov	a,#(0x39 ^ 0x80)
	mov	b,r4
	xrl	b,#0x80
	subb	a,b
;     genIfxJump
;	Peephole 112.b	changed ljmp to sjmp
;	Peephole 160.a	removed sjmp by inverse jump logic
	jc	00102$
00134$:
;     genCmpLt
;     genCmp
	clr	c
	mov	a,r4
	xrl	a,#0x80
	subb	a,#0xb0
;     genIfxJump
;	Peephole 108.a	removed ljmp by inverse jump logic
	jnc	00109$
;	Peephole 300	removed redundant label 00135$
;_atoi.c:33: break;
00102$:
;_atoi.c:34: if (*s == '-' || *s == '+') 
;     genPointerGet
;     genGenPointerGet
	mov	dpl,r7
	mov	dph,r2
	mov	b,r3
	lcall	__gptrget
	mov	r4,a
;     genCmpEq
	cjne	r4,#0x2D,00136$
;	Peephole 112.b	changed ljmp to sjmp
	sjmp	00109$
00136$:
;     genCmpEq
	cjne	r4,#0x2B,00137$
;	Peephole 112.b	changed ljmp to sjmp
	sjmp	00109$
00137$:
;_atoi.c:36: s++;
;     genPlus
;     genPlusIncr
	inc	r7
;	Peephole 112.b	changed ljmp to sjmp
;	Peephole 243	avoided branch to sjmp
	cjne	r7,#0x00,00107$
	inc	r2
;	Peephole 300	removed redundant label 00138$
	sjmp	00107$
00109$:
;_atoi.c:39: sign = (*s == '-');
;     genAssign
	mov	r0,#_atoi_s_1_1
	mov	a,r7
	movx	@r0,a
	inc	r0
	mov	a,r2
	movx	@r0,a
	inc	r0
	mov	a,r3
	movx	@r0,a
;     genPointerGet
;     genGenPointerGet
	mov	dpl,r7
	mov	dph,r2
	mov	b,r3
	lcall	__gptrget
	mov	r2,a
;     genCmpEq
;	Peephole 241.d	optimized compare
	clr	a
	cjne	r2,#0x2D,00139$
	inc	a
00139$:
00140$:
;     genAssign
;_atoi.c:40: if (*s == '-' || *s == '+') s++;
;     genIfx
	mov	r3,a
	mov	ar4,r3
;	Peephole 166	removed redundant mov
;     genIfxJump
;	Peephole 108.b	removed ljmp by inverse jump logic
	jnz	00110$
;	Peephole 300	removed redundant label 00141$
;     genCmpEq
;	Peephole 112.b	changed ljmp to sjmp
;	Peephole 198.b	optimized misc jump sequence
	cjne	r2,#0x2B,00131$
;	Peephole 200.b	removed redundant sjmp
;	Peephole 300	removed redundant label 00142$
00143$:
00110$:
;     genPlus
	mov	r0,#_atoi_s_1_1
	movx	a,@r0
	add	a,#0x01
	movx	@r0,a
	inc	r0
	movx	a,@r0
	addc	a,#0x00
	movx	@r0,a
;_atoi.c:42: while (*s && *s >= '0' && *s <= '9') {
00131$:
;     genAssign
	mov	r0,#_atoi_s_1_1
	movx	a,@r0
	mov	_atoi_sloc1_1_0,a
	inc	r0
	movx	a,@r0
	mov	(_atoi_sloc1_1_0 + 1),a
	inc	r0
	movx	a,@r0
	mov	(_atoi_sloc1_1_0 + 2),a
00115$:
;     genPointerGet
;     genGenPointerGet
	mov	dpl,_atoi_sloc1_1_0
	mov	dph,(_atoi_sloc1_1_0 + 1)
	mov	b,(_atoi_sloc1_1_0 + 2)
	lcall	__gptrget
;     genIfx
	mov	r3,a
;	Peephole 105	removed redundant mov
;     genIfxJump
;	Peephole 108.c	removed ljmp by inverse jump logic
	jz	00117$
;	Peephole 300	removed redundant label 00144$
;     genCmpLt
;     genCmp
	clr	c
	mov	a,r3
	xrl	a,#0x80
	subb	a,#0xb0
;     genIfxJump
;	Peephole 112.b	changed ljmp to sjmp
;	Peephole 160.a	removed sjmp by inverse jump logic
	jc	00117$
00145$:
;     genCmpGt
;     genCmp
	clr	c
;	Peephole 159	avoided xrl during execution
	mov	a,#(0x39 ^ 0x80)
	mov	b,r3
	xrl	b,#0x80
	subb	a,b
;     genIfxJump
;	Peephole 112.b	changed ljmp to sjmp
;	Peephole 160.a	removed sjmp by inverse jump logic
	jc	00117$
00146$:
;_atoi.c:43: rv = (rv * 10) + (*s - '0');
;     genIpush
	push	ar4
;     genAssign
	mov	r0,#__mulint_PARM_2
	mov	a,#0x0A
	movx	@r0,a
	clr	a
	inc	r0
	movx	@r0,a
;     genCall
	mov	dpl,r5
	mov	dph,r6
	push	ar3
	lcall	__mulint
	mov	r4,dpl
	mov	r2,dph
	pop	ar3
;     genCast
	mov	a,r3
	rlc	a
	subb	a,acc
	mov	r7,a
;     genMinus
	mov	a,r3
	add	a,#0xd0
	mov	r3,a
	mov	a,r7
	addc	a,#0xff
	mov	r7,a
;     genPlus
;	Peephole 236.g	used r3 instead of ar3
	mov	a,r3
;	Peephole 236.a	used r4 instead of ar4
	add	a,r4
	mov	r5,a
;	Peephole 236.g	used r7 instead of ar7
	mov	a,r7
;	Peephole 236.b	used r2 instead of ar2
	addc	a,r2
	mov	r6,a
;_atoi.c:44: s++;
;     genPlus
;     genPlusIncr
	inc	_atoi_sloc1_1_0
	clr	a
	cjne	a,_atoi_sloc1_1_0,00147$
	inc	(_atoi_sloc1_1_0 + 1)
00147$:
;     genIpop
	pop	ar4
;	Peephole 112.b	changed ljmp to sjmp
	sjmp	00115$
00117$:
;_atoi.c:47: return (sign ? -rv : rv);
;     genIfx
	mov	a,r4
;     genIfxJump
;	Peephole 108.c	removed ljmp by inverse jump logic
	jz	00120$
;	Peephole 300	removed redundant label 00148$
;     genUminus
	clr	c
	clr	a
	subb	a,r5
	mov	r2,a
	clr	a
	subb	a,r6
	mov	r3,a
;	Peephole 112.b	changed ljmp to sjmp
	sjmp	00121$
00120$:
;     genAssign
	mov	ar2,r5
	mov	ar3,r6
00121$:
;     genRet
	mov	dpl,r2
	mov	dph,r3
;	Peephole 300	removed redundant label 00118$
	ret
	.area CSEG    (CODE)
	.area CONST   (CODE)
	.area XINIT   (CODE)
